Rev Age Author Path Log message Diff
1781 4860 d 18 h kaklik / Zalozena nоvá třída modulů pro převod signálových úrovní. Diff
1780 4861 d 12 h kaklik / vytvoren modul pro vlhkostni cidlo. Diff
1779 4861 d 13 h kaklik /Modules/Sensors/HUM01A/PCB/ zakladni verze PCB Diff
1778 4861 d 15 h kaklik /Modules/ zalozen novy modul - na mereni vlhkosti. Diff
1775 4864 d 16 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ TDC nwmwri ani v modu 1 Diff
1774 4864 d 21 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ pridani mereni teploty pomoci ccidla DS18B20 Diff
1767 4865 d 15 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ pridani zdrojaku pro teplomer Diff
1766 4868 d 19 h kaklik /Modules/ARM/STM32F10xRxT/ dokonceni uprav PCB pro vyrobu. Diff
1765 4868 d 23 h kaklik /Modules/ARM/STM32F10xRxT/PCB/ pridani technologickych znacek. Diff
1764 4869 d 10 h kaklik /Modules/ARM/STM32F10xRxT/ aktualizace oprav chyb Diff
1763 4869 d 12 h kaklik /Modules/ARM/STM32F10xRxT/ přegenerování technologických výstupů Diff
1762 4869 d 12 h kaklik /Modules/ARM/STM32F10xRxT/ uklid ve slozkach modulu. Diff
1760 4869 d 12 h kaklik /Modules/TDC/GP201A/SW/PICinterface/ zmena absolutnich cest v projektu na relativni. Diff
1759 4870 d 10 h kakl /Modules/TDC/GP201A/SW/PICinterface/ implementace MR2. TDC ale nereaguje na stop impuls. Diff
1758 4870 d 13 h kakl /Modules/TDC/GP201A/SW/PICinterface/ znicializovany nastaveni registru Diff
1757 4870 d 15 h kakl /Modules/TDC/GP201A/SW/PICinterface/ po nadefinovani struktur pro registry se ukazalo ze nejvetsi velikost olozky struktury je 8bit. Diff
1756 4870 d 17 h kakl /Modules/TDC/GP201A/SW/PICinterface/ Diff
1755 4870 d 19 h kakl /Modules/TDC/GP201A/SW/PICinterface/ Opsano nastavebi vetsiny registru Diff
1754 4870 d 22 h kakl /Modules/ Diff
1753 4871 d 16 h kakl /Modules/TDC/GP201A/SW/PICinterface/ zakonzervovani kodu pred vytvorenim funkci pro nastaveni TDC. Diff
1751 4873 d 15 h kaklik / zaznam nalezenych chyb Diff
1745 4876 d 17 h kakl /Modules/TDC/GP201A/SW/PICinterface/ prvni verze funkcni komunikace s TDC. Zbyva doresit nastavovani registru. Diff
1744 4877 d 9 h kakl /Modules/TDC/GP201A/ opravena chyba v popisu napajeni. zacatek psani firmwaru Diff
1743 4878 d 9 h kakl /Modules/CommSerial/ETH01A/ Vytvořena první část schéma pro Ethernet modul. Chybí PoE část a dokreslení ETH konektoru. Diff
1742 4878 d 20 h kaklik /Modules/ADconverters/ADCmonoPPI01A/ nalezene chyby Diff
1741 4878 d 22 h kakl /Modules/PIC/PIC18F8xTQ8001A/ vylepseni osazovaku Diff
1740 4879 d 18 h kakl /Modules/ opravy PCB Diff
1739 4880 d 10 h kakl /Modules/ARM/STM32F10xRxT/ Uprava PCB Diff
1738 4881 d 10 h kaklik /Modules/ARM/STM32F10xRxT/PCB/ zbyva vyhazet nove zmrsene cesty. Diff
1737 4881 d 11 h kaklik /Modules/ARM/STM32F10xRxT/ Diff
1736 4881 d 12 h kaklik /Modules/ARM/STM32F10xRxT/ meziverze se synchronizaci schematu a PCB. Diff
1727 4883 d 19 h kaklik /Modules/ARM/STM32F10xRxT/ vylepseni dokumentace. Diff
1718 4893 d 16 h kaklik / Opravy a doplneni Diff
1717 4894 d 11 h kaklik /Modules/PIC/PIC18F8xTQ8001A/ oprava potisku Diff
1715 4894 d 17 h kaklik /Modules/Clock/CLKGEN01A/ Diff
1714 4895 d 1 h kaklik /Modules/ARM/STM32F10xRxT/ priprava novych modulu. Diff
1713 4895 d 20 h kaklik / priprava novych modulu. Diff
1712 4896 d 10 h kaklik /Modules/Clock/CLKGEN01B/ Diff
1711 4896 d 10 h kaklik /Modules/Clock/CLKGEN01B/ uprava zemeni a rozlozeni soucastek Diff
1708 4897 d 19 h mija /Modules/ARM/STM32F10xRxT/ Diff