Rev Age Author Path Log message Diff
1870 4814 d 11 h kaklik /Modules/PIC/PIC16F87xTQ4401B/ pridani spravne cesty Diff
1866 4814 d 12 h kaklik / vytvořena buňka s okkazem do obchodu. Diff
1863 4814 d 20 h kaklik /Modules/Clock/CLKGEN01B/DOC/ napsan clanek o pripojeni CLKGEN k pocitaci. Diff
1856 4816 d 17 h kaklik /Modules/ARM/STM32F10xRxT/ pridani fotky ARMu Diff
1855 4818 d 9 h kaklik /Modules/CommSerial/ETH01A/PCB/ Dokončena hlavní část návrhu PCB. Diff
1854 4818 d 21 h kaklik / drobná SEO oprimalizace podle návrhu google. Diff
1852 4819 d 10 h kaklik /Modules/CommSerial/ETH01A/SCH/ Diff
1851 4819 d 10 h kaklik /Modules/CommSerial/ETH01A/ pokracovani v navrhu PCB pro ethernet. Diff
1850 4819 d 11 h kaklik /Modules/CommSerial/ETH01A/PCB/ Diff
1849 4819 d 11 h kaklik /Modules/CommSerial/ETH01A/PCB/ pokracovani v navrhu PCB pro ethernet. Diff
1848 4819 d 12 h kaklik /Modules/CommSerial/ETH01A/ vyreseno krizeni spoju Diff
1847 4819 d 12 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1846 4819 d 14 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1845 4819 d 14 h kaklik /Modules/CommSerial/ETH01A/ navrh PCB pro ethernet. Diff
1844 4819 d 15 h kaklik /Modules/ Diff
1843 4819 d 16 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1842 4819 d 16 h kaklik /Modules/CommSerial/ETH01A/PCB/ navrh PCB pro ethernet. Diff
1841 4820 d 9 h kaklik /Modules/Clock/CLKGEN01B/DOC/ aktualizace dokumentce. Diff
1840 4820 d 9 h kaklik / aktualizace dokumentce. Diff
1839 4820 d 14 h kaklik /Modules/Clock/CLKGEN01B/ zacatek dokumentace Diff