Last modification
Rev 1896 – miho – 4977 d 22 h
Log message
S3AN01A opravy schématu (doplnění Errata) a přenesení změn do PCB.
Path Blame Diff Log
/Modules/CPLD_FPGA/S3AN01A/PCB/S3AN01A.pcb Blame Diff Log
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.ASC Blame Diff Log
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A.DSN Blame Diff Log
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_BOM.xls Blame Diff Log
/Modules/CPLD_FPGA/S3AN01A/SCH/S3AN01A_SCH.pdf Blame Diff Log