Last modification
Rev 0 – kaklik – 3895 d 12 h
Log message
prvni optimalizace differencnich spoju. A prohozeni polarity vstupu ADC.
Path Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual-cache.lib Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.bak Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.cmp Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.kicad_pcb Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.pro Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.sch Blame Diff Log