Last modification
Rev 3563 – kaklik – 3881 d 19 h
Log message
zaroutovani vetsiny spoju a vyliti medi.
Path Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual-cache.lib Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.bak Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.cmp Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.kicad_pcb Blame Diff Log
/Modules/ADconverters/ADCdual01A/SCH_PCB/ADCdual.sch Blame Diff Log