Last modification
Rev 0 – kaklik – 3900 d 22 h
Log message
prvni celkem rozumny plosny spoj.
Path Blame Diff Log
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF-cache.lib Blame Diff Log
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.kicad_pcb Blame Diff Log
/Modules/Universal/FMC2DIFF01A/SCH_PCB/FMC2DIFF.net Blame Diff Log
/Modules/Universal/FMC2DIFF01A/SCH_PCB/konektory.lib Blame Diff Log
/Modules/Universal/FMC2DIFF01A/SCH_PCB/miniSAS.sch Blame Diff Log
/Modules/Universal/FMC2DIFF01A/SCH_PCB/SATA.sch Blame Diff Log