Last modification
Rev 4197 – kaklik – 3332 d 2 h
Log message
zacatek navrhu noveho PCB pro modul vykonoveho zesilovace.
Path Blame Diff Log
/Modules/Audio/POWERDAC01A/SCH_PCB/POWERDAC-cache.lib Blame Diff Log
/Modules/Audio/POWERDAC01A/SCH_PCB/POWERDAC.kicad_pcb Blame Diff Log
/Modules/Audio/POWERDAC01A/SCH_PCB/POWERDAC.net Log
/Modules/Audio/POWERDAC01A/SCH_PCB/POWERDAC.sch Blame Diff Log