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Blame information for rev 3

Line No.	Rev	Author	Line
1	3	kaklik	`#nolist`
2			`//`
3			`// Komplete definition of all Special Feature Registers for CCS C compiler`
4			`//`
5			`// PIC16F83`
6			`// PIC16F84`
7			`//`
8			`// (c)miho 2005`
9			`//`
10			`// History:`
11			`//`
12			`// 1.00 First Version, not verified yet`
13
14
15			`// SFR Registers in Memory Bank 0`
16			`//`
17			`#byte INDF = 0x00`
18			`#byte TMR0 = 0x01`
19			`#byte PCL = 0x02`
20			`#byte STATUS = 0x03`
21			`#bit IRP = STATUS.7`
22			`#bit RP1 = STATUS.6`
23			`#bit RP0 = STATUS.5`
24			`#bit TO = STATUS.4`
25			`#bit PD = STATUS.3`
26			`#bit Z = STATUS.2`
27			`#bit DC = STATUS.1`
28			`#bit C = STATUS.0`
29			`#byte FSR = 0x04`
30			`#byte PORTA = 0x05`
31			`#byte PORTB = 0x06`
32			`#byte EEDATA = 0x08`
33			`#byte EEADR = 0x09`
34			`#byte PCLATH = 0x0A`
35			`#byte INTCON = 0x0B`
36			`#bit GIE = INTCON.7`
37			`#bit EEIE = INTCON.6`
38			`#bit T0IE = INTCON.5`
39			`#bit INTE = INTCON.4`
40			`#bit RBIE = INTCON.3`
41			`#bit T0IF = INTCON.2`
42			`#bit INTF = INTCON.1`
43			`#bit RBIF = INTCON.0`
44
45
46			`// SFR Registers in Memory Bank 1`
47			`//`
48			`#byte INDF_1 = 0x80 // miror`
49			`#byte OPTION = 0x81`
50			`#bit RBPU = OPTION.7`
51			`#bit INTEDG = OPTION.6`
52			`#bit T0CS = OPTION.5`
53			`#bit T0SE = OPTION.4`
54			`#bit PSA = OPTION.3`
55			`#bit PS2 = OPTION.2`
56			`#bit PS1 = OPTION.1`
57			`#bit PS0 = OPTION.0`
58			`#byte PCL_1 = 0x82 // mirror`
59			`#byte STATUS_1 = 0x83 // mirror`
60			`#bit IRP_1 = STATUS_1.7`
61			`#bit RP1_1 = STATUS_1.6`
62			`#bit RP0_1 = STATUS_1.5`
63			`#bit TO_1 = STATUS_1.4`
64			`#bit PD_1 = STATUS_1.3`
65			`#bit Z_1 = STATUS_1.2`
66			`#bit DC_1 = STATUS_1.1`
67			`#bit C_1 = STATUS_1.0`
68			`#byte FSR_1 = 0x84 // mirror`
69			`#byte TRISA = 0x85`
70			`#byte TRISB = 0x86`
71			`#byte EECON1 = 0x88`
72			`#byte EECON2 = 0x89`
73			`#byte PCLATH_1 = 0x8A // mirror`
74			`#byte INTCON_1 = 0x8B // mirror`
75			`#bit GIE_1 = INTCON_1.7`
76			`#bit EEIE_1 = INTCON_1.6`
77			`#bit T0IE_1 = INTCON_1.5`
78			`#bit INTE_1 = INTCON_1.4`
79			`#bit RBIE_1 = INTCON_1.3`
80			`#bit T0IF_1 = INTCON_1.2`
81			`#bit INTF_1 = INTCON_1.1`
82			`#bit RBIF_1 = INTCON_1.0`
83
84
85			`#list`