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1 32 kaklik /*********************************************************************
2 *
3 * ENC28J60 registers/bits
4 *
5 *********************************************************************
6 * FileName: ENC28J60.h
7 * Dependencies: None
8 * Processor: PIC18, PIC24F, PIC24H, dsPIC30F, dsPIC33F, PIC32
9 * Compiler: Microchip C32 v1.05 or higher
10 * Microchip C30 v3.12 or higher
11 * Microchip C18 v3.30 or higher
12 * HI-TECH PICC-18 PRO 9.63PL2 or higher
13 * Company: Microchip Technology, Inc.
14 *
15 * Software License Agreement
16 *
17 * Copyright (C) 2002-2009 Microchip Technology Inc. All rights
18 * reserved.
19 *
20 * Microchip licenses to you the right to use, modify, copy, and
21 * distribute:
22 * (i) the Software when embedded on a Microchip microcontroller or
23 * digital signal controller product ("Device") which is
24 * integrated into Licensee's product; or
25 * (ii) ONLY the Software driver source files ENC28J60.c, ENC28J60.h,
26 * ENCX24J600.c and ENCX24J600.h ported to a non-Microchip device
27 * used in conjunction with a Microchip ethernet controller for
28 * the sole purpose of interfacing with the ethernet controller.
29 *
30 * You should refer to the license agreement accompanying this
31 * Software for additional information regarding your rights and
32 * obligations.
33 *
34 * THE SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT
35 * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT
36 * LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A
37 * PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL
38 * MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR
39 * CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF
40 * PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS
41 * BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE
42 * THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER
43 * SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT
44 * (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE.
45 *
46 *
47 * Author Date Comment
48 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
49 * Howard Schlunder 06/01/04 Original
50 * Howard Schlunder 06/29/04 Fixed byte boundary problems on a
51 * couple of PHY register structs.
52 * Howard Schlunder 09/29/04 Matched with data sheet
53 * Howard Schlunder 01/04/06 Matched with new data sheet
54 * Howard Schlunder 06/29/06 Changed MACON3.PHDRLEN to PHDREN
55 * Howard Schlunder 07/21/06 Several bits removed to match now
56 * reserved bits in rev. B data sheet
57 * (DS39662B)
58 ********************************************************************/
59  
60 #ifndef __ENC28J60_H
61 #define __ENC28J60_H
62 #include "GenericTypeDefs.h"
63  
64 typedef union {
65 BYTE v[7];
66 struct {
67 WORD ByteCount;
68 unsigned char CollisionCount:4;
69 unsigned char CRCError:1;
70 unsigned char LengthCheckError:1;
71 unsigned char LengthOutOfRange:1;
72 unsigned char Done:1;
73 unsigned char Multicast:1;
74 unsigned char Broadcast:1;
75 unsigned char PacketDefer:1;
76 unsigned char ExcessiveDefer:1;
77 unsigned char MaximumCollisions:1;
78 unsigned char LateCollision:1;
79 unsigned char Giant:1;
80 unsigned char Underrun:1;
81 WORD BytesTransmittedOnWire;
82 unsigned char ControlFrame:1;
83 unsigned char PAUSEControlFrame:1;
84 unsigned char BackpressureApplied:1;
85 unsigned char VLANTaggedFrame:1;
86 unsigned char Zeros:4;
87 } bits;
88 } TXSTATUS;
89  
90 typedef union {
91 BYTE v[4];
92 struct {
93 WORD ByteCount;
94 unsigned char PreviouslyIgnored:1;
95 unsigned char RXDCPreviouslySeen:1;
96 unsigned char CarrierPreviouslySeen:1;
97 unsigned char CodeViolation:1;
98 unsigned char CRCError:1;
99 unsigned char LengthCheckError:1;
100 unsigned char LengthOutOfRange:1;
101 unsigned char ReceiveOk:1;
102 unsigned char Multicast:1;
103 unsigned char Broadcast:1;
104 unsigned char DribbleNibble:1;
105 unsigned char ControlFrame:1;
106 unsigned char PauseControlFrame:1;
107 unsigned char UnsupportedOpcode:1;
108 unsigned char VLANType:1;
109 unsigned char Zero:1;
110 } bits;
111 } RXSTATUS;
112  
113 /******************************************************************************
114 * Register locations
115 ******************************************************************************/
116 // Bank 0 registers --------
117 #define ERDPTL 0x00
118 #define ERDPTH 0x01
119 #define EWRPTL 0x02
120 #define EWRPTH 0x03
121 #define ETXSTL 0x04
122 #define ETXSTH 0x05
123 #define ETXNDL 0x06
124 #define ETXNDH 0x07
125 #define ERXSTL 0x08
126 #define ERXSTH 0x09
127 #define ERXNDL 0x0A
128 #define ERXNDH 0x0B
129 #define ERXRDPTL 0x0C
130 #define ERXRDPTH 0x0D
131 #define ERXWRPTL 0x0E
132 #define ERXWRPTH 0x0F
133 #define EDMASTL 0x10
134 #define EDMASTH 0x11
135 #define EDMANDL 0x12
136 #define EDMANDH 0x13
137 #define EDMADSTL 0x14
138 #define EDMADSTH 0x15
139 #define EDMACSL 0x16
140 #define EDMACSH 0x17
141 //#define 0x18
142 //#define 0x19
143 //#define r 0x1A
144 #define EIE 0x1B
145 #define EIR 0x1C
146 #define ESTAT 0x1D
147 #define ECON2 0x1E
148 #define ECON1 0x1F
149  
150 // Bank 1 registers -----
151 #define EHT0 0x100
152 #define EHT1 0x101
153 #define EHT2 0x102
154 #define EHT3 0x103
155 #define EHT4 0x104
156 #define EHT5 0x105
157 #define EHT6 0x106
158 #define EHT7 0x107
159 #define EPMM0 0x108
160 #define EPMM1 0x109
161 #define EPMM2 0x10A
162 #define EPMM3 0x10B
163 #define EPMM4 0x10C
164 #define EPMM5 0x10D
165 #define EPMM6 0x10E
166 #define EPMM7 0x10F
167 #define EPMCSL 0x110
168 #define EPMCSH 0x111
169 //#define 0x112
170 //#define 0x113
171 #define EPMOL 0x114
172 #define EPMOH 0x115
173 //#define r 0x116
174 //#define r 0x117
175 #define ERXFCON 0x118
176 #define EPKTCNT 0x119
177 //#define r 0x11A
178 //#define EIE 0x11B
179 //#define EIR 0x11C
180 //#define ESTAT 0x11D
181 //#define ECON2 0x11E
182 //#define ECON1 0x11F
183  
184 // Bank 2 registers -----
185 #define MACON1 0x200
186 //#define r 0x201
187 #define MACON3 0x202
188 #define MACON4 0x203
189 #define MABBIPG 0x204
190 //#define 0x205
191 #define MAIPGL 0x206
192 #define MAIPGH 0x207
193 #define MACLCON1 0x208
194 #define MACLCON2 0x209
195 #define MAMXFLL 0x20A
196 #define MAMXFLH 0x20B
197 //#define r 0x20C
198 //#define r 0x20D
199 //#define r 0x20E
200 //#define 0x20F
201 //#define r 0x210
202 //#define r 0x211
203 #define MICMD 0x212
204 //#define r 0x213
205 #define MIREGADR 0x214
206 //#define r 0x215
207 #define MIWRL 0x216
208 #define MIWRH 0x217
209 #define MIRDL 0x218
210 #define MIRDH 0x219
211 //#define r 0x21A
212 //#define EIE 0x21B
213 //#define EIR 0x21C
214 //#define ESTAT 0x21D
215 //#define ECON2 0x21E
216 //#define ECON1 0x21F
217  
218 // Bank 3 registers -----
219 #define MAADR5 0x300
220 #define MAADR6 0x301
221 #define MAADR3 0x302
222 #define MAADR4 0x303
223 #define MAADR1 0x304
224 #define MAADR2 0x305
225 #define EBSTSD 0x306
226 #define EBSTCON 0x307
227 #define EBSTCSL 0x308
228 #define EBSTCSH 0x309
229 #define MISTAT 0x30A
230 //#define 0x30B
231 //#define 0x30C
232 //#define 0x30D
233 //#define 0x30E
234 //#define 0x30F
235 //#define 0x310
236 //#define 0x311
237 #define EREVID 0x312
238 //#define 0x313
239 //#define 0x314
240 #define ECOCON 0x315
241 //#define 0x316
242 #define EFLOCON 0x317
243 #define EPAUSL 0x318
244 #define EPAUSH 0x319
245 //#define r 0x31A
246 //#define EIE 0x31B
247 //#define EIR 0x31C
248 //#define ESTAT 0x31D
249 //#define ECON2 0x31E
250 //#define ECON1 0x31F
251  
252  
253  
254 // Structures
255 typedef union _REG
256 {
257 BYTE Val;
258  
259 // EIE bits ----------
260 struct {
261 unsigned char RXERIE:1;
262 unsigned char TXERIE:1;
263 unsigned char :1;
264 unsigned char TXIE:1;
265 unsigned char LINKIE:1;
266 unsigned char DMAIE:1;
267 unsigned char PKTIE:1;
268 unsigned char INTIE:1;
269 } EIEbits;
270  
271 // EIR bits ----------
272 struct {
273 unsigned char RXERIF:1;
274 unsigned char TXERIF:1;
275 unsigned char :1;
276 unsigned char TXIF:1;
277 unsigned char LINKIF:1;
278 unsigned char DMAIF:1;
279 unsigned char PKTIF:1;
280 unsigned char :1;
281 } EIRbits;
282  
283 // ESTAT bits ---------
284 struct {
285 unsigned char CLKRDY:1;
286 unsigned char TXABRT:1;
287 unsigned char RXBUSY:1;
288 unsigned char :1;
289 unsigned char LATECOL:1;
290 unsigned char :1;
291 unsigned char BUFER:1;
292 unsigned char INT:1;
293 } ESTATbits;
294  
295 // ECON2 bits --------
296 struct {
297 unsigned char :3;
298 unsigned char VRPS:1;
299 unsigned char :1;
300 unsigned char PWRSV:1;
301 unsigned char PKTDEC:1;
302 unsigned char AUTOINC:1;
303 } ECON2bits;
304  
305 // ECON1 bits --------
306 struct {
307 unsigned char BSEL0:1;
308 unsigned char BSEL1:1;
309 unsigned char RXEN:1;
310 unsigned char TXRTS:1;
311 unsigned char CSUMEN:1;
312 unsigned char DMAST:1;
313 unsigned char RXRST:1;
314 unsigned char TXRST:1;
315 } ECON1bits;
316  
317 // ERXFCON bits ------
318 struct {
319 unsigned char BCEN:1;
320 unsigned char MCEN:1;
321 unsigned char HTEN:1;
322 unsigned char MPEN:1;
323 unsigned char PMEN:1;
324 unsigned char CRCEN:1;
325 unsigned char ANDOR:1;
326 unsigned char UCEN:1;
327 } ERXFCONbits;
328  
329 // MACON1 bits --------
330 struct {
331 unsigned char MARXEN:1;
332 unsigned char PASSALL:1;
333 unsigned char RXPAUS:1;
334 unsigned char TXPAUS:1;
335 unsigned char :4;
336 } MACON1bits;
337  
338  
339 // MACON3 bits --------
340 struct {
341 unsigned char FULDPX:1;
342 unsigned char FRMLNEN:1;
343 unsigned char HFRMEN:1;
344 unsigned char PHDREN:1;
345 unsigned char TXCRCEN:1;
346 unsigned char PADCFG0:1;
347 unsigned char PADCFG1:1;
348 unsigned char PADCFG2:1;
349 } MACON3bits;
350 struct {
351 unsigned char FULDPX:1;
352 unsigned char FRMLNEN:1;
353 unsigned char HFRMEN:1;
354 unsigned char PHDREN:1;
355 unsigned char TXCRCEN:1;
356 unsigned char PADCFG:3;
357 } MACON3bits2;
358  
359 // MACON4 bits --------
360 struct {
361 unsigned char :4;
362 unsigned char NOBKOFF:1;
363 unsigned char BPEN:1;
364 unsigned char DEFER:1;
365 unsigned char :1;
366 } MACON4bits;
367  
368 // MICMD bits ---------
369 struct {
370 unsigned char MIIRD:1;
371 unsigned char MIISCAN:1;
372 unsigned char :6;
373 } MICMDbits;
374  
375 // EBSTCON bits -----
376 struct {
377 unsigned char BISTST:1;
378 unsigned char TME:1;
379 unsigned char TMSEL0:1;
380 unsigned char TMSEL1:1;
381 unsigned char PSEL:1;
382 unsigned char PSV0:1;
383 unsigned char PSV1:1;
384 unsigned char PSV2:1;
385 } EBSTCONbits;
386 struct {
387 unsigned char BISTST:1;
388 unsigned char TME:1;
389 unsigned char TMSEL:2;
390 unsigned char PSEL:1;
391 unsigned char PSV:3;
392 } EBSTCONbits2;
393  
394 // MISTAT bits --------
395 struct {
396 unsigned char BUSY:1;
397 unsigned char SCAN:1;
398 unsigned char NVALID:1;
399 unsigned char :5;
400 } MISTATbits;
401  
402 // ECOCON bits -------
403 struct {
404 unsigned char COCON0:1;
405 unsigned char COCON1:1;
406 unsigned char COCON2:1;
407 unsigned char :5;
408 } ECOCONbits;
409 struct {
410 unsigned char COCON:3;
411 unsigned char :5;
412 } ECOCONbits2;
413  
414 // EFLOCON bits -----
415 struct {
416 unsigned char FCEN0:1;
417 unsigned char FCEN1:1;
418 unsigned char FULDPXS:1;
419 unsigned char :5;
420 } EFLOCONbits;
421 struct {
422 unsigned char FCEN:2;
423 unsigned char FULDPXS:1;
424 unsigned char :5;
425 } EFLOCONbits2;
426 } REG;
427  
428  
429 /******************************************************************************
430 * PH Register Locations
431 ******************************************************************************/
432 #define PHCON1 0x00
433 #define PHSTAT1 0x01
434 #define PHID1 0x02
435 #define PHID2 0x03
436 #define PHCON2 0x10
437 #define PHSTAT2 0x11
438 #define PHIE 0x12
439 #define PHIR 0x13
440 #define PHLCON 0x14
441  
442  
443 typedef union {
444 WORD Val;
445 WORD_VAL VAL;
446  
447 // PHCON1 bits ----------
448 struct {
449 unsigned :8;
450 unsigned PDPXMD:1;
451 unsigned :2;
452 unsigned PPWRSV:1;
453 unsigned :2;
454 unsigned PLOOPBK:1;
455 unsigned PRST:1;
456 } PHCON1bits;
457  
458 // PHSTAT1 bits --------
459 struct {
460 unsigned :1;
461 unsigned JBSTAT:1;
462 unsigned LLSTAT:1;
463 unsigned :5;
464 unsigned :3;
465 unsigned PHDPX:1;
466 unsigned PFDPX:1;
467 unsigned :3;
468 } PHSTAT1bits;
469  
470 // PHID2 bits ----------
471 struct {
472 unsigned PREV0:1;
473 unsigned PREV1:1;
474 unsigned PREV2:1;
475 unsigned PREV3:1;
476 unsigned PPN0:1;
477 unsigned PPN1:1;
478 unsigned PPN2:1;
479 unsigned PPN3:1;
480 unsigned PPN4:1;
481 unsigned PPN5:1;
482 unsigned PID19:1;
483 unsigned PID20:1;
484 unsigned PID21:1;
485 unsigned PID22:1;
486 unsigned PID23:1;
487 unsigned PID24:1;
488 } PHID2bits;
489 struct {
490 unsigned PREV:4;
491 unsigned PPNL:4;
492 unsigned PPNH:2;
493 unsigned PID:6;
494 } PHID2bits2;
495  
496 // PHCON2 bits ----------
497 struct {
498 unsigned :8;
499 unsigned HDLDIS:1;
500 unsigned :1;
501 unsigned JABBER:1;
502 unsigned :2;
503 unsigned TXDIS:1;
504 unsigned FRCLNK:1;
505 unsigned :1;
506 } PHCON2bits;
507  
508 // PHSTAT2 bits --------
509 struct {
510 unsigned :5;
511 unsigned PLRITY:1;
512 unsigned :2;
513 unsigned :1;
514 unsigned DPXSTAT:1;
515 unsigned LSTAT:1;
516 unsigned COLSTAT:1;
517 unsigned RXSTAT:1;
518 unsigned TXSTAT:1;
519 unsigned :2;
520 } PHSTAT2bits;
521  
522 // PHIE bits -----------
523 struct {
524 unsigned :1;
525 unsigned PGEIE:1;
526 unsigned :2;
527 unsigned PLNKIE:1;
528 unsigned :3;
529 unsigned :8;
530 } PHIEbits;
531  
532 // PHIR bits -----------
533 struct {
534 unsigned :2;
535 unsigned PGIF:1;
536 unsigned :1;
537 unsigned PLNKIF:1;
538 unsigned :3;
539 unsigned :8;
540 } PHIRbits;
541  
542 // PHLCON bits -------
543 struct {
544 unsigned :1;
545 unsigned STRCH:1;
546 unsigned LFRQ0:1;
547 unsigned LFRQ1:1;
548 unsigned LBCFG0:1;
549 unsigned LBCFG1:1;
550 unsigned LBCFG2:1;
551 unsigned LBCFG3:1;
552 unsigned LACFG0:1;
553 unsigned LACFG1:1;
554 unsigned LACFG2:1;
555 unsigned LACFG3:1;
556 unsigned :4;
557 } PHLCONbits;
558 struct {
559 unsigned :1;
560 unsigned STRCH:1;
561 unsigned LFRQ:2;
562 unsigned LBCFG:4;
563 unsigned LACFG:4;
564 unsigned :4;
565 } PHLCONbits2;
566 } PHYREG;
567  
568  
569 /******************************************************************************
570 * Individual Register Bits
571 ******************************************************************************/
572 // ETH/MAC/MII bits
573  
574 // EIE bits ----------
575 #define EIE_INTIE (1<<7)
576 #define EIE_PKTIE (1<<6)
577 #define EIE_DMAIE (1<<5)
578 #define EIE_LINKIE (1<<4)
579 #define EIE_TXIE (1<<3)
580 #define EIE_TXERIE (1<<1)
581 #define EIE_RXERIE (1)
582  
583 // EIR bits ----------
584 #define EIR_PKTIF (1<<6)
585 #define EIR_DMAIF (1<<5)
586 #define EIR_LINKIF (1<<4)
587 #define EIR_TXIF (1<<3)
588 #define EIR_TXERIF (1<<1)
589 #define EIR_RXERIF (1)
590  
591 // ESTAT bits ---------
592 #define ESTAT_INT (1<<7)
593 #define ESTAT_BUFER (1<<6)
594 #define ESTAT_LATECOL (1<<4)
595 #define ESTAT_RXBUSY (1<<2)
596 #define ESTAT_TXABRT (1<<1)
597 #define ESTAT_CLKRDY (1)
598  
599 // ECON2 bits --------
600 #define ECON2_AUTOINC (1<<7)
601 #define ECON2_PKTDEC (1<<6)
602 #define ECON2_PWRSV (1<<5)
603 #define ECON2_VRPS (1<<3)
604  
605 // ECON1 bits --------
606 #define ECON1_TXRST (1<<7)
607 #define ECON1_RXRST (1<<6)
608 #define ECON1_DMAST (1<<5)
609 #define ECON1_CSUMEN (1<<4)
610 #define ECON1_TXRTS (1<<3)
611 #define ECON1_RXEN (1<<2)
612 #define ECON1_BSEL1 (1<<1)
613 #define ECON1_BSEL0 (1)
614  
615 // ERXFCON bits ------
616 #define ERXFCON_UCEN (1<<7)
617 #define ERXFCON_ANDOR (1<<6)
618 #define ERXFCON_CRCEN (1<<5)
619 #define ERXFCON_PMEN (1<<4)
620 #define ERXFCON_MPEN (1<<3)
621 #define ERXFCON_HTEN (1<<2)
622 #define ERXFCON_MCEN (1<<1)
623 #define ERXFCON_BCEN (1)
624  
625 // MACON1 bits --------
626 #define MACON1_TXPAUS (1<<3)
627 #define MACON1_RXPAUS (1<<2)
628 #define MACON1_PASSALL (1<<1)
629 #define MACON1_MARXEN (1)
630  
631 // MACON3 bits --------
632 #define MACON3_PADCFG2 (1<<7)
633 #define MACON3_PADCFG1 (1<<6)
634 #define MACON3_PADCFG0 (1<<5)
635 #define MACON3_TXCRCEN (1<<4)
636 #define MACON3_PHDREN (1<<3)
637 #define MACON3_HFRMEN (1<<2)
638 #define MACON3_FRMLNEN (1<<1)
639 #define MACON3_FULDPX (1)
640  
641 // MACON4 bits --------
642 #define MACON4_DEFER (1<<6)
643 #define MACON4_BPEN (1<<5)
644 #define MACON4_NOBKOFF (1<<4)
645  
646 // MICMD bits ---------
647 #define MICMD_MIISCAN (1<<1)
648 #define MICMD_MIIRD (1)
649  
650 // EBSTCON bits -----
651 #define EBSTCON_PSV2 (1<<7)
652 #define EBSTCON_PSV1 (1<<6)
653 #define EBSTCON_PSV0 (1<<5)
654 #define EBSTCON_PSEL (1<<4)
655 #define EBSTCON_TMSEL1 (1<<3)
656 #define EBSTCON_TMSEL0 (1<<2)
657 #define EBSTCON_TME (1<<1)
658 #define EBSTCON_BISTST (1)
659  
660 // MISTAT bits --------
661 #define MISTAT_NVALID (1<<2)
662 #define MISTAT_SCAN (1<<1)
663 #define MISTAT_BUSY (1)
664  
665 // ECOCON bits -------
666 #define ECOCON_COCON2 (1<<2)
667 #define ECOCON_COCON1 (1<<1)
668 #define ECOCON_COCON0 (1)
669  
670 // EFLOCON bits -----
671 #define EFLOCON_FULDPXS (1<<2)
672 #define EFLOCON_FCEN1 (1<<1)
673 #define EFLOCON_FCEN0 (1)
674  
675  
676  
677 // PHY bits
678  
679 // PHCON1 bits ----------
680 #define PHCON1_PRST (1ul<<15)
681 #define PHCON1_PLOOPBK (1ul<<14)
682 #define PHCON1_PPWRSV (1ul<<11)
683 #define PHCON1_PDPXMD (1ul<<8)
684  
685 // PHSTAT1 bits --------
686 #define PHSTAT1_PFDPX (1ul<<12)
687 #define PHSTAT1_PHDPX (1ul<<11)
688 #define PHSTAT1_LLSTAT (1ul<<2)
689 #define PHSTAT1_JBSTAT (1ul<<1)
690  
691 // PHID2 bits --------
692 #define PHID2_PID24 (1ul<<15)
693 #define PHID2_PID23 (1ul<<14)
694 #define PHID2_PID22 (1ul<<13)
695 #define PHID2_PID21 (1ul<<12)
696 #define PHID2_PID20 (1ul<<11)
697 #define PHID2_PID19 (1ul<<10)
698 #define PHID2_PPN5 (1ul<<9)
699 #define PHID2_PPN4 (1ul<<8)
700 #define PHID2_PPN3 (1ul<<7)
701 #define PHID2_PPN2 (1ul<<6)
702 #define PHID2_PPN1 (1ul<<5)
703 #define PHID2_PPN0 (1ul<<4)
704 #define PHID2_PREV3 (1ul<<3)
705 #define PHID2_PREV2 (1ul<<2)
706 #define PHID2_PREV1 (1ul<<1)
707 #define PHID2_PREV0 (1ul)
708  
709 // PHCON2 bits ----------
710 #define PHCON2_FRCLNK (1ul<<14)
711 #define PHCON2_TXDIS (1ul<<13)
712 #define PHCON2_JABBER (1ul<<10)
713 #define PHCON2_HDLDIS (1ul<<8)
714  
715 // PHSTAT2 bits --------
716 #define PHSTAT2_TXSTAT (1ul<<13)
717 #define PHSTAT2_RXSTAT (1ul<<12)
718 #define PHSTAT2_COLSTAT (1ul<<11)
719 #define PHSTAT2_LSTAT (1ul<<10)
720 #define PHSTAT2_DPXSTAT (1ul<<9)
721 #define PHSTAT2_PLRITY (1ul<<5)
722  
723 // PHIE bits -----------
724 #define PHIE_PLNKIE (1ul<<4)
725 #define PHIE_PGEIE (1ul<<1)
726  
727 // PHIR bits -----------
728 #define PHIR_PLNKIF (1ul<<4)
729 #define PHIR_PGIF (1ul<<2)
730  
731 // PHLCON bits -------
732 #define PHLCON_LACFG3 (1ul<<11)
733 #define PHLCON_LACFG2 (1ul<<10)
734 #define PHLCON_LACFG1 (1ul<<9)
735 #define PHLCON_LACFG0 (1ul<<8)
736 #define PHLCON_LBCFG3 (1ul<<7)
737 #define PHLCON_LBCFG2 (1ul<<6)
738 #define PHLCON_LBCFG1 (1ul<<5)
739 #define PHLCON_LBCFG0 (1ul<<4)
740 #define PHLCON_LFRQ1 (1ul<<3)
741 #define PHLCON_LFRQ0 (1ul<<2)
742 #define PHLCON_STRCH (1ul<<1)
743  
744 #endif
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{FOOTER START}

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