?lang_form? ?lang_select? ?lang_submit? ?lang_endform?
{HEADER END}
{BLAME START}

library

?curdirlinks? -

Blame information for rev 32

Line No. Rev Author Line
1 32 kaklik /*********************************************************************
2 *
3 * MAC Module Defs for Microchip Stack
4 *
5 *********************************************************************
6 * FileName: MAC.h
7 * Dependencies: StackTsk.h
8 * Processor: PIC18, PIC24F, PIC24H, dsPIC30F, dsPIC33F, PIC32
9 * Compiler: Microchip C32 v1.05 or higher
10 * Microchip C30 v3.12 or higher
11 * Microchip C18 v3.30 or higher
12 * HI-TECH PICC-18 PRO 9.63PL2 or higher
13 * Company: Microchip Technology, Inc.
14 *
15 * Software License Agreement
16 *
17 * Copyright (C) 2002-2009 Microchip Technology Inc. All rights
18 * reserved.
19 *
20 * Microchip licenses to you the right to use, modify, copy, and
21 * distribute:
22 * (i) the Software when embedded on a Microchip microcontroller or
23 * digital signal controller product ("Device") which is
24 * integrated into Licensee's product; or
25 * (ii) ONLY the Software driver source files ENC28J60.c, ENC28J60.h,
26 * ENCX24J600.c and ENCX24J600.h ported to a non-Microchip device
27 * used in conjunction with a Microchip ethernet controller for
28 * the sole purpose of interfacing with the ethernet controller.
29 *
30 * You should refer to the license agreement accompanying this
31 * Software for additional information regarding your rights and
32 * obligations.
33 *
34 * THE SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT
35 * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT
36 * LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A
37 * PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL
38 * MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR
39 * CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF
40 * PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS
41 * BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE
42 * THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER
43 * SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT
44 * (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE.
45 *
46 *
47 * Author Date Comment
48 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
49 * Nilesh Rajbharti 4/27/01 Original (Rev 1.0)
50 * Nilesh Rajbharti 11/27/01 Added SLIP
51 * Nilesh Rajbharti 2/9/02 Cleanup
52 * Nilesh Rajbharti 5/22/02 Rev 2.0 (See version.log for detail)
53 * Howard Schlunder 6/28/04 Added ENC28J60 specific features
54 * Howard Schlunder 11/29/04 Added Get/SetLEDConfig macros
55 ********************************************************************/
56 #ifndef __MAC_H
57 #define __MAC_H
58  
59 #include "HardwareProfile.h"
60  
61 #if defined(WF_CS_TRIS)
62 // Do not use the DMA and other goodies that Microchip Ethernet modules have
63 #define NON_MCHP_MAC
64 #endif
65  
66 #if defined(ENC_CS_TRIS) && defined(WF_CS_TRIS)
67 #error "Error in HardwareProfile.h. Must select either the ENC28J60 or the MRF24WB10 but not both ENC_CS_TRIS and WF_CS_TRIS."
68 #endif
69 #if defined(ENC100_INTERFACE_MODE) && defined(WF_CS_TRIS)
70 #error "Error in HardwareProfile.h. Must select either the ENCX24J600 or the MRF24WB10 but not both ENC100_INTERFACE_MODE and WF_CS_TRIS."
71 #endif
72 #if defined(ENC100_INTERFACE_MODE) && defined(ENC_CS_TRIS)
73 #error "Error in HardwareProfile.h. Must select either the ENC28J60 or the ENCX24J600 but not both ENC_CS_TRIS and ENC100_INTERFACE_MODE."
74 #endif
75  
76  
77  
78 #if !defined(ENC_CS_TRIS) && !defined(WF_CS_TRIS) && !defined(ENC100_INTERFACE_MODE) && \
79 (defined(__18F97J60) || defined(__18F96J65) || defined(__18F96J60) || defined(__18F87J60) || defined(__18F86J65) || defined(__18F86J60) || defined(__18F67J60) || defined(__18F66J65) || defined(__18F66J60) || \
80 defined(_18F97J60) || defined(_18F96J65) || defined(_18F96J60) || defined(_18F87J60) || defined(_18F86J65) || defined(_18F86J60) || defined(_18F67J60) || defined(_18F66J65) || defined(_18F66J60))
81 #include "TCPIP Stack/ETH97J60.h"
82 #elif defined(ENC_CS_TRIS) || defined(WF_CS_TRIS)
83 #include "TCPIP Stack/ENC28J60.h"
84 #elif defined(ENC100_INTERFACE_MODE)
85 #include "TCPIP Stack/ENCX24J600.h"
86 #define PHYREG WORD
87 #elif defined(__PIC32MX__) && defined(_ETH)
88 // extra includes for PIC32MX with embedded ETH Controller
89 #else
90 #error No Ethernet/WiFi controller defined in HardwareProfile.h. Defines for an ENC28J60, ENC424J600/624J600, or WiFi MRF24WB10 must be present.
91 #endif
92  
93  
94 #define MAC_TX_BUFFER_SIZE (1500ul)
95  
96 // A generic structure representing the Ethernet header starting all Ethernet
97 // frames
98 typedef struct __attribute__((aligned(2), packed))
99 {
100 MAC_ADDR DestMACAddr;
101 MAC_ADDR SourceMACAddr;
102 WORD_VAL Type;
103 } ETHER_HEADER;
104  
105  
106 #define MAC_IP (0x00u)
107 #define MAC_ARP (0x06u)
108 #define MAC_UNKNOWN (0xFFu)
109  
110  
111 #if !defined(STACK_USE_HTTP2_SERVER)
112 #define RESERVED_HTTP_MEMORY 0ul
113 #endif
114  
115 #if !defined(STACK_USE_SSL)
116 #define RESERVED_SSL_MEMORY 0ul
117 #endif
118  
119 #if defined(WF_CS_TRIS)
120 #define MAX_PACKET_SIZE (1514ul)
121 #endif
122  
123 // MAC RAM definitions
124 #if defined(ENC100_INTERFACE_MODE)
125 #define RESERVED_CRYPTO_MEMORY (128ul)
126 #define RAMSIZE (24*1024ul)
127 #define TXSTART (0x0000ul)
128 #define RXSTART ((TXSTART + 1518ul + TCP_ETH_RAM_SIZE + RESERVED_HTTP_MEMORY + RESERVED_SSL_MEMORY + RESERVED_CRYPTO_MEMORY + 1ul) & 0xFFFE)
129 #define RXSTOP (RAMSIZE-1ul)
130 #define RXSIZE (RXSTOP-RXSTART+1ul)
131 #define BASE_TX_ADDR (TXSTART)
132 #define BASE_TCB_ADDR (BASE_TX_ADDR + 1518ul)
133 #define BASE_HTTPB_ADDR (BASE_TCB_ADDR + TCP_ETH_RAM_SIZE)
134 #define BASE_SSLB_ADDR (BASE_HTTPB_ADDR + RESERVED_HTTP_MEMORY)
135 #define BASE_CRYPTOB_ADDR (BASE_SSLB_ADDR + RESERVED_SSL_MEMORY)
136 #elif defined(WF_CS_TRIS)
137 #define RAMSIZE 14170ul
138 #define TXSTART (RAMSIZE - ((4ul + MAX_PACKET_SIZE + 4ul)*2) - TCP_ETH_RAM_SIZE - RESERVED_HTTP_MEMORY - RESERVED_SSL_MEMORY)
139 #define RXSTART (0ul)
140 #define RXSTOP ((TXSTART-2ul) | 0x0001ul)
141 #define RXSIZE (RXSTOP-RXSTART+1ul)
142 #define BASE_TX_ADDR (TXSTART + 4ul)
143 #define BASE_TCB_ADDR (BASE_TX_ADDR + ((MAX_PACKET_SIZE + 4ul)*2))
144 #define BASE_HTTPB_ADDR (BASE_TCB_ADDR + TCP_ETH_RAM_SIZE)
145 #define BASE_SSLB_ADDR (BASE_HTTPB_ADDR + RESERVED_HTTP_MEMORY)
146 #elif defined(__PIC32MX__) && defined(_ETH) && !defined(ENC_CS_TRIS)
147 #define BASE_TX_ADDR (MACGetTxBaseAddr())
148 #define BASE_HTTPB_ADDR (MACGetHttpBaseAddr())
149 #define BASE_SSLB_ADDR (MACGetSslBaseAddr())
150 #define RXSIZE (EMAC_RX_BUFF_SIZE)
151 #define RAMSIZE (2*RXSIZE) // not used but silences the compiler
152 #else // ENC28J60 or PIC18F97J60 family internal Ethernet controller
153 #define RAMSIZE (8*1024ul)
154 #define TXSTART (RAMSIZE - (1ul+1518ul+7ul) - TCP_ETH_RAM_SIZE - RESERVED_HTTP_MEMORY - RESERVED_SSL_MEMORY)
155 #define RXSTART (0ul) // Should be an even memory address; must be 0 for errata
156 #define RXSTOP ((TXSTART-2ul) | 0x0001ul) // Odd for errata workaround
157 #define RXSIZE (RXSTOP-RXSTART+1ul)
158 #define BASE_TX_ADDR (TXSTART + 1ul)
159 #define BASE_TCB_ADDR (BASE_TX_ADDR + (1514ul+7ul))
160 #define BASE_HTTPB_ADDR (BASE_TCB_ADDR + TCP_ETH_RAM_SIZE)
161 #define BASE_SSLB_ADDR (BASE_HTTPB_ADDR + RESERVED_HTTP_MEMORY)
162 #endif
163  
164 #if (RXSIZE < 1400) || (RXSIZE > RAMSIZE)
165 #error Warning, Ethernet RX buffer is tiny. Reduce TCP socket count, the size of each TCP socket, or move sockets to a different RAM
166 #endif
167  
168 WORD MACCalcRxChecksum(WORD offset, WORD len);
169 WORD CalcIPBufferChecksum(WORD len);
170  
171 void MACPowerDown(void);
172 void MACEDPowerDown(void);
173 void MACPowerUp(void);
174 #if defined(ENC_CS_TRIS) || defined(ENC100_INTERFACE_MODE) || \
175 (defined(__18F97J60) || defined(__18F96J65) || defined(__18F96J60) || defined(__18F87J60) || defined(__18F86J65) || defined(__18F86J60) || defined(__18F67J60) || defined(__18F66J65) || defined(__18F66J60) || \
176 defined(_18F97J60) || defined(_18F96J65) || defined(_18F96J60) || defined(_18F87J60) || defined(_18F86J65) || defined(_18F86J60) || defined(_18F67J60) || defined(_18F66J65) || defined(_18F66J60))
177 void WritePHYReg(BYTE Register, WORD Data);
178 PHYREG ReadPHYReg(BYTE Register);
179 #endif
180 void SetRXHashTableEntry(MAC_ADDR DestMACAddr);
181  
182 // ENC28J60 specific
183 void SetCLKOUT(BYTE NewConfig);
184 BYTE GetCLKOUT(void);
185  
186 /******************************************************************************
187 * Macro: void SetLEDConfig(WORD NewConfig)
188 *
189 * PreCondition: SPI bus must be initialized (done in MACInit()).
190 *
191 * Input: NewConfig - xxx0: Pulse stretching disabled
192 * xxx2: Pulse stretch to 40ms (default)
193 * xxx6: Pulse stretch to 73ms
194 * xxxA: Pulse stretch to 139ms
195 *
196 * xx1x: LEDB - TX
197 * xx2x: LEDB - RX (default)
198 * xx3x: LEDB - collisions
199 * xx4x: LEDB - link
200 * xx5x: LEDB - duplex
201 * xx7x: LEDB - TX and RX
202 * xx8x: LEDB - on
203 * xx9x: LEDB - off
204 * xxAx: LEDB - blink fast
205 * xxBx: LEDB - blink slow
206 * xxCx: LEDB - link and RX
207 * xxDx: LEDB - link and TX and RX
208 * xxEx: LEDB - duplex and collisions
209 *
210 * x1xx: LEDA - TX
211 * x2xx: LEDA - RX
212 * x3xx: LEDA - collisions
213 * x4xx: LEDA - link (default)
214 * x5xx: LEDA - duplex
215 * x7xx: LEDA - TX and RX
216 * x8xx: LEDA - on
217 * x9xx: LEDA - off
218 * xAxx: LEDA - blink fast
219 * xBxx: LEDA - blink slow
220 * xCxx: LEDA - link and RX
221 * xDxx: LEDA - link and TX and RX
222 * xExx: LEDA - duplex and collisions
223 *
224 * Output: None
225 *
226 * Side Effects: None
227 *
228 * Overview: Writes the value of NewConfig into the PHLCON PHY register.
229 * The LED pins will beginning outputting the new
230 * configuration immediately.
231 *
232 * Note:
233 *****************************************************************************/
234 #define SetLEDConfig(NewConfig) WritePHYReg(PHLCON, NewConfig)
235  
236  
237 /******************************************************************************
238 * Macro: WORD GetLEDConfig(void)
239 *
240 * PreCondition: SPI bus must be initialized (done in MACInit()).
241 *
242 * Input: None
243 *
244 * Output: WORD - xxx0: Pulse stretching disabled
245 * xxx2: Pulse stretch to 40ms (default)
246 * xxx6: Pulse stretch to 73ms
247 * xxxA: Pulse stretch to 139ms
248 *
249 * xx1x: LEDB - TX
250 * xx2x: LEDB - RX (default)
251 * xx3x: LEDB - collisions
252 * xx4x: LEDB - link
253 * xx5x: LEDB - duplex
254 * xx7x: LEDB - TX and RX
255 * xx8x: LEDB - on
256 * xx9x: LEDB - off
257 * xxAx: LEDB - blink fast
258 * xxBx: LEDB - blink slow
259 * xxCx: LEDB - link and RX
260 * xxDx: LEDB - link and TX and RX
261 * xxEx: LEDB - duplex and collisions
262 *
263 * x1xx: LEDA - TX
264 * x2xx: LEDA - RX
265 * x3xx: LEDA - collisions
266 * x4xx: LEDA - link (default)
267 * x5xx: LEDA - duplex
268 * x7xx: LEDA - TX and RX
269 * x8xx: LEDA - on
270 * x9xx: LEDA - off
271 * xAxx: LEDA - blink fast
272 * xBxx: LEDA - blink slow
273 * xCxx: LEDA - link and RX
274 * xDxx: LEDA - link and TX and RX
275 * xExx: LEDA - duplex and collisions
276 *
277 * Side Effects: None
278 *
279 * Overview: Returns the current value of the PHLCON register.
280 *
281 * Note: None
282 *****************************************************************************/
283 #define GetLEDConfig() ReadPHYReg(PHLCON).Val
284  
285  
286 void MACInit(void);
287 void MACProcess(void);
288 BOOL MACIsLinked(void);
289  
290 BOOL MACGetHeader(MAC_ADDR *remote, BYTE* type);
291 void MACSetReadPtrInRx(WORD offset);
292 PTR_BASE MACSetWritePtr(PTR_BASE address);
293 PTR_BASE MACSetReadPtr(PTR_BASE address);
294 BYTE MACGet(void);
295 WORD MACGetArray(BYTE *val, WORD len);
296 void MACDiscardRx(void);
297 WORD MACGetFreeRxSize(void);
298 void MACMemCopyAsync(PTR_BASE destAddr, PTR_BASE sourceAddr, WORD len);
299 BOOL MACIsMemCopyDone(void);
300  
301 void MACPutHeader(MAC_ADDR *remote, BYTE type, WORD dataLen);
302 BOOL MACIsTxReady(void);
303 void MACPut(BYTE val);
304 void MACPutArray(BYTE *val, WORD len);
305 void MACFlush(void);
306  
307  
308 // ROM function variants for PIC18
309 #if defined(__18CXX)
310 void MACPutROMArray(ROM BYTE *val, WORD len);
311 #else
312 #define MACPutROMArray(a,b) MACPutArray((BYTE*)a,b)
313 #endif
314  
315 // PIC32MX with embedded ETHC functions
316 #if defined(__PIC32MX__) && defined(_ETH)
317 PTR_BASE MACGetTxBaseAddr(void);
318 PTR_BASE MACGetHttpBaseAddr(void);
319 PTR_BASE MACGetSslBaseAddr(void);
320 #endif
321  
322  
323 #endif
{BLAME END}
{FOOTER START}

Powered by WebSVN v2.8.3