| Line No. | Rev | Author | Line |
|---|---|---|---|
| 1 | 32 | kaklik | /********************************************************************* |
| 2 | * |
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| 3 | * Medium Access Control (MAC) Layer for Microchip PIC18F97J60 family |
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| 4 | * Module for Microchip TCP/IP Stack |
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| 5 | * -Provides access to PIC18F97J60 family Ethernet controller |
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| 6 | * -Reference: PIC18F97J60 Family data sheet, IEEE 802.3 Standard |
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| 7 | * |
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| 8 | ********************************************************************* |
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| 9 | * FileName: ETH97J60.c |
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| 10 | * Dependencies: ETH97J60.h |
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| 11 | * MAC.h |
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| 12 | * string.h |
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| 13 | * StackTsk.h |
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| 14 | * Helpers.h |
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| 15 | * Delay.h |
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| 16 | * Processor: PIC18F97J60 Family |
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| 17 | * Compiler: Microchip C18 v3.30 or higher |
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| 18 | * HI-TECH PICC-18 PRO 9.63PL2 or higher |
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| 19 | * Company: Microchip Technology, Inc. |
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| 20 | * |
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| 21 | * Software License Agreement |
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| 22 | * |
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| 23 | * Copyright (C) 2002-2009 Microchip Technology Inc. All rights |
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| 24 | * reserved. |
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| 25 | * |
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| 26 | * Microchip licenses to you the right to use, modify, copy, and |
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| 27 | * distribute: |
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| 28 | * (i) the Software when embedded on a Microchip microcontroller or |
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| 29 | * digital signal controller product ("Device") which is |
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| 30 | * integrated into Licensee's product; or |
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| 31 | * (ii) ONLY the Software driver source files ENC28J60.c, ENC28J60.h, |
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| 32 | * ENCX24J600.c and ENCX24J600.h ported to a non-Microchip device |
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| 33 | * used in conjunction with a Microchip ethernet controller for |
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| 34 | * the sole purpose of interfacing with the ethernet controller. |
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| 35 | * |
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| 36 | * You should refer to the license agreement accompanying this |
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| 37 | * Software for additional information regarding your rights and |
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| 38 | * obligations. |
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| 39 | * |
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| 40 | * THE SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT |
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| 41 | * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT |
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| 42 | * LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A |
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| 43 | * PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
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| 44 | * MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR |
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| 45 | * CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF |
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| 46 | * PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS |
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| 47 | * BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE |
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| 48 | * THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER |
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| 49 | * SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT |
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| 50 | * (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE. * |
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| 51 | * Author Date Comment |
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| 52 | *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 53 | * Rawin Rojvanit 07/26/05 Stuff |
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| 54 | * Howard Schlunder 11/17/05 Ported to PIC18F97J60 |
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| 55 | * Howard Schlunder 06/16/06 Synchronized with ENC28J60 code |
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| 56 | * Howard Schlunder 05/21/07 Fixed a TX lockup problem |
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| 57 | ********************************************************************/ |
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| 58 | #define __ETH97J60_C |
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| 59 | |||
| 60 | #include "HardwareProfile.h" |
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| 61 | |||
| 62 | // Make sure that this hardware profile has a PIC18F97J60 family device in it |
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| 63 | #if (defined(__18F97J60) || defined(__18F96J65) || defined(__18F96J60) || defined(__18F87J60) || defined(__18F86J65) || defined(__18F86J60) || defined(__18F67J60) || defined(__18F66J65) || defined(__18F66J60) || \ |
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| 64 | defined(_18F97J60) || defined(_18F96J65) || defined(_18F96J60) || defined(_18F87J60) || defined(_18F86J65) || defined(_18F86J60) || defined(_18F67J60) || defined(_18F66J65) || defined(_18F66J60)) \ |
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| 65 | && !defined(ENC_CS_TRIS) && !defined(ENC100_INTERFACE_MODE) && !defined(WF_CS_TRIS) |
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| 66 | |||
| 67 | #include "TCPIP Stack/TCPIP.h" |
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| 68 | |||
| 69 | |||
| 70 | /** D E F I N I T I O N S ****************************************************/ |
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| 71 | // Since the Ethernet PHY doesn't support auto-negotiation, full-duplex mode is |
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| 72 | // not compatible with most switches/routers. If a dedicated network is used |
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| 73 | // where the duplex of the remote node can be manually configured, you may |
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| 74 | // change this configuration. Otherwise, half duplex should always be used. |
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| 75 | #define HALF_DUPLEX |
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| 76 | //#define FULL_DUPLEX |
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| 77 | |||
| 78 | // Pseudo Functions |
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| 79 | #define LOW(a) (a & 0xFF) |
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| 80 | #define HIGH(a) ((a>>8) & 0xFF) |
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| 81 | |||
| 82 | #define ETHER_IP (0x00u) |
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| 83 | #define ETHER_ARP (0x06u) |
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| 84 | |||
| 85 | // A header appended at the start of all RX frames by the hardware |
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| 86 | typedef struct _ENC_PREAMBLE |
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| 87 | { |
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| 88 | WORD NextPacketPointer; |
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| 89 | RXSTATUS StatusVector; |
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| 90 | |||
| 91 | MAC_ADDR DestMACAddr; |
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| 92 | MAC_ADDR SourceMACAddr; |
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| 93 | WORD_VAL Type; |
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| 94 | } ENC_PREAMBLE; |
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| 95 | |||
| 96 | |||
| 97 | // Internal MAC level variables and flags. |
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| 98 | static WORD_VAL NextPacketLocation; |
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| 99 | static WORD_VAL CurrentPacketLocation; |
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| 100 | static BOOL WasDiscarded; |
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| 101 | static WORD wTXWatchdog; |
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| 102 | |||
| 103 | |||
| 104 | /****************************************************************************** |
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| 105 | * Function: void MACInit(void) |
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| 106 | * |
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| 107 | * PreCondition: None |
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| 108 | * |
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| 109 | * Input: None |
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| 110 | * |
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| 111 | * Output: None |
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| 112 | * |
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| 113 | * Side Effects: None |
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| 114 | * |
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| 115 | * Overview: MACInit enables the Ethernet module, waits for the |
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| 116 | * to become ready, and programs all registers for future |
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| 117 | * TX/RX operations. |
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| 118 | * |
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| 119 | * Note: This function blocks for at least 1ms, waiting for the |
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| 120 | * hardware to stabilize. |
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| 121 | *****************************************************************************/ |
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| 122 | void MACInit(void) |
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| 123 | { |
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| 124 | BYTE i; |
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| 125 | |||
| 126 | TRISA &= 0xFC; // Clear TRISA0 and TRISA1 to set LED0 and LED1 as outputs for Ethernet module status |
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| 127 | ECON2bits.ETHEN = 1; // Enable Ethernet! |
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| 128 | |||
| 129 | // Wait for PHYRDY to become set. |
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| 130 | while(!ESTATbits.PHYRDY); |
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| 131 | |||
| 132 | // Configure the receive buffer boundary pointers |
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| 133 | // and the buffer write protect pointer (receive buffer read pointer) |
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| 134 | WasDiscarded = TRUE; |
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| 135 | NextPacketLocation.Val = RXSTART; |
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| 136 | ERXST = RXSTART; |
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| 137 | ERXRDPTL = LOW(RXSTOP); // Write low byte first |
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| 138 | ERXRDPTH = HIGH(RXSTOP);// Write high byte last |
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| 139 | ERXND = RXSTOP; |
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| 140 | ETXST = TXSTART; |
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| 141 | |||
| 142 | // Write a permanant per packet control byte of 0x00 |
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| 143 | EWRPT = TXSTART; |
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| 144 | MACPut(0x00); |
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| 145 | |||
| 146 | // Configure Receive Filters |
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| 147 | // (No need to reconfigure - Unicast OR Broadcast with CRC checking is |
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| 148 | // acceptable) |
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| 149 | //ERXFCON = ERXFCON_CRCEN; // Promiscious mode |
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| 150 | |||
| 151 | // Configure the MAC |
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| 152 | // Enable the receive portion of the MAC |
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| 153 | MACON1 = MACON1_TXPAUS | MACON1_RXPAUS | MACON1_MARXEN; Nop(); |
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| 154 | |||
| 155 | // Pad packets to 60 bytes, add CRC, and check Type/Length field. |
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| 156 | #if defined(FULL_DUPLEX) |
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| 157 | MACON3 = MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX; Nop(); |
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| 158 | MABBIPG = 0x15; Nop(); |
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| 159 | #else |
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| 160 | MACON3 = MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN; Nop(); |
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| 161 | MABBIPG = 0x12; Nop(); |
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| 162 | #endif |
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| 163 | |||
| 164 | // Allow infinite deferals if the medium is continuously busy |
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| 165 | // (do not time out a transmission if the half duplex medium is |
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| 166 | // completely saturated with other people's data) |
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| 167 | MACON4 = MACON4_DEFER; Nop(); |
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| 168 | |||
| 169 | // Set non-back-to-back inter-packet gap to 9.6us. The back-to-back |
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| 170 | // inter-packet gap (MABBIPG) is set by MACSetDuplex() which is called |
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| 171 | // later. |
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| 172 | MAIPGL = 0x12; Nop(); |
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| 173 | MAIPGH = 0x0C; Nop(); |
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| 174 | |||
| 175 | // Set the maximum packet size which the controller will accept |
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| 176 | MAMXFLL = LOW(6+6+2+1500+4); Nop(); |
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| 177 | MAMXFLH = HIGH(6+6+2+1500+4); Nop(); |
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| 178 | |||
| 179 | // Initialize physical MAC address registers |
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| 180 | MAADR1 = AppConfig.MyMACAddr.v[0]; Nop(); |
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| 181 | MAADR2 = AppConfig.MyMACAddr.v[1]; Nop(); |
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| 182 | MAADR3 = AppConfig.MyMACAddr.v[2]; Nop(); |
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| 183 | MAADR4 = AppConfig.MyMACAddr.v[3]; Nop(); |
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| 184 | MAADR5 = AppConfig.MyMACAddr.v[4]; Nop(); |
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| 185 | MAADR6 = AppConfig.MyMACAddr.v[5]; Nop(); |
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| 186 | |||
| 187 | // Disable half duplex loopback in PHY and set RXAPDIS bit as per errata |
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| 188 | WritePHYReg(PHCON2, PHCON2_HDLDIS | PHCON2_RXAPDIS); |
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| 189 | |||
| 190 | // Configure LEDA to display LINK status, LEDB to display TX/RX activity |
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| 191 | SetLEDConfig(0x3472); |
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| 192 | |||
| 193 | // Set the PHY into the proper duplex state |
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| 194 | #if defined(FULL_DUPLEX) |
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| 195 | WritePHYReg(PHCON1, PHCON1_PDPXMD); |
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| 196 | #else |
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| 197 | WritePHYReg(PHCON1, 0x0000); |
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| 198 | #endif |
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| 199 | |||
| 200 | // Enable packet reception |
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| 201 | ECON1bits.RXEN = 1; |
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| 202 | }//end MACInit |
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| 203 | |||
| 204 | |||
| 205 | /****************************************************************************** |
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| 206 | * Function: BOOL MACIsLinked(void) |
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| 207 | * |
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| 208 | * PreCondition: None |
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| 209 | * |
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| 210 | * Input: None |
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| 211 | * |
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| 212 | * Output: TRUE: If the PHY reports that a link partner is present |
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| 213 | * and the link has been up continuously since the last |
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| 214 | * call to MACIsLinked() |
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| 215 | * FALSE: If the PHY reports no link partner, or the link went |
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| 216 | * down momentarily since the last call to MACIsLinked() |
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| 217 | * |
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| 218 | * Side Effects: None |
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| 219 | * |
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| 220 | * Overview: Returns the PHSTAT1.LLSTAT bit. |
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| 221 | * |
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| 222 | * Note: None |
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| 223 | *****************************************************************************/ |
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| 224 | BOOL MACIsLinked(void) |
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| 225 | { |
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| 226 | // LLSTAT is a latching low link status bit. Therefore, if the link |
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| 227 | // goes down and comes back up before a higher level stack program calls |
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| 228 | // MACIsLinked(), MACIsLinked() will still return FALSE. The next |
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| 229 | // call to MACIsLinked() will return TRUE (unless the link goes down |
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| 230 | // again). |
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| 231 | return ReadPHYReg(PHSTAT1).PHSTAT1bits.LLSTAT; |
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| 232 | } |
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| 233 | |||
| 234 | |||
| 235 | /****************************************************************************** |
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| 236 | * Function: BOOL MACIsTxReady(void) |
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| 237 | * |
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| 238 | * PreCondition: None |
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| 239 | * |
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| 240 | * Input: None |
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| 241 | * |
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| 242 | * Output: TRUE: If no Ethernet transmission is in progress |
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| 243 | * FALSE: If a previous transmission was started, and it has |
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| 244 | * not completed yet. While FALSE, the data in the |
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| 245 | * transmit buffer and the TXST/TXND pointers must not |
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| 246 | * be changed. |
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| 247 | * |
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| 248 | * Side Effects: None |
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| 249 | * |
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| 250 | * Overview: Returns the ECON1.TXRTS bit |
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| 251 | * |
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| 252 | * Note: None |
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| 253 | *****************************************************************************/ |
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| 254 | BOOL MACIsTxReady(void) |
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| 255 | { |
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| 256 | if(!ECON1bits.TXRTS) |
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| 257 | return TRUE; |
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| 258 | |||
| 259 | // Retry transmission if the current packet seems to be not completing |
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| 260 | // Wait 3ms before triggering the retry. |
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| 261 | if((WORD)TickGet() - wTXWatchdog >= (3ull*TICK_SECOND/1000ull)) |
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| 262 | { |
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| 263 | ECON1bits.TXRTS = 0; |
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| 264 | MACFlush(); |
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| 265 | } |
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| 266 | |||
| 267 | return FALSE; |
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| 268 | } |
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| 269 | |||
| 270 | |||
| 271 | /****************************************************************************** |
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| 272 | * Function: void MACDiscardRx(void) |
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| 273 | * |
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| 274 | * PreCondition: None |
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| 275 | * |
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| 276 | * Input: None |
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| 277 | * |
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| 278 | * Output: None |
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| 279 | * |
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| 280 | * Side Effects: None |
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| 281 | * |
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| 282 | * Overview: Marks the last received packet (obtained using |
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| 283 | * MACGetHeader())as being processed and frees the buffer |
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| 284 | * memory associated with it |
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| 285 | * |
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| 286 | * Note: Is is safe to call this function multiple times between |
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| 287 | * MACGetHeader() calls. Extra packets won't be thrown away |
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| 288 | * until MACGetHeader() makes it available. |
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| 289 | *****************************************************************************/ |
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| 290 | void MACDiscardRx(void) |
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| 291 | { |
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| 292 | WORD_VAL NewRXRDLocation; |
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| 293 | |||
| 294 | // Make sure the current packet was not already discarded |
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| 295 | if(WasDiscarded) |
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| 296 | return; |
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| 297 | WasDiscarded = TRUE; |
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| 298 | |||
| 299 | // Decrement the next packet pointer before writing it into |
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| 300 | // the ERXRDPT registers. This is a silicon errata workaround. |
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| 301 | // RX buffer wrapping must be taken into account if the |
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| 302 | // NextPacketLocation is precisely RXSTART. |
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| 303 | NewRXRDLocation.Val = NextPacketLocation.Val - 1; |
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| 304 | //#if RXSTART == 0 |
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| 305 | // if(NewRXRDLocation.Val > RXSTOP) |
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| 306 | //#else |
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| 307 | if(NewRXRDLocation.Val < RXSTART || NewRXRDLocation.Val > RXSTOP) |
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| 308 | //#endif |
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| 309 | { |
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| 310 | NewRXRDLocation.Val = RXSTOP; |
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| 311 | } |
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| 312 | |||
| 313 | // Decrement the RX packet counter register, EPKTCNT |
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| 314 | ECON2bits.PKTDEC = 1; |
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| 315 | |||
| 316 | // Move the receive read pointer to unwrite-protect the memory used by the |
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| 317 | // last packet. The writing order is important: set the low byte first, |
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| 318 | // high byte last. |
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| 319 | ERXRDPTL = NewRXRDLocation.v[0]; |
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| 320 | ERXRDPTH = NewRXRDLocation.v[1]; |
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| 321 | |||
| 322 | // The PKTIF flag should automatically be cleared by hardware, but |
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| 323 | // early beta silicon requires that you manually clear it. This should be |
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| 324 | // unneeded for production A0 silicon and later. |
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| 325 | EIRbits.PKTIF = 0; |
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| 326 | } |
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| 327 | |||
| 328 | |||
| 329 | /****************************************************************************** |
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| 330 | * Function: WORD MACGetFreeRxSize(void) |
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| 331 | * |
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| 332 | * PreCondition: None |
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| 333 | * |
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| 334 | * Input: None |
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| 335 | * |
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| 336 | * Output: A WORD estimate of how much RX buffer space is free at |
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| 337 | * the present time. |
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| 338 | * |
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| 339 | * Side Effects: None |
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| 340 | * |
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| 341 | * Overview: None |
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| 342 | * |
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| 343 | * Note: None |
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| 344 | *****************************************************************************/ |
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| 345 | WORD MACGetFreeRxSize(void) |
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| 346 | { |
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| 347 | WORD_VAL ReadPT, WritePT; |
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| 348 | |||
| 349 | // Read the Ethernet hardware buffer write pointer. Because packets can be |
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| 350 | // received at any time, it can change between reading the low and high |
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| 351 | // bytes. A loop is necessary to make certain a proper low/high byte pair |
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| 352 | // is read. |
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| 353 | do { |
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| 354 | // Save EPKTCNT in a temporary location |
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| 355 | ReadPT.v[0] = EPKTCNT; |
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| 356 | |||
| 357 | WritePT.Val = ERXWRPT; |
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| 358 | } while(EPKTCNT != ReadPT.v[0]); |
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| 359 | |||
| 360 | // Determine where the write protection pointer is |
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| 361 | ReadPT.Val = ERXRDPT; |
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| 362 | |||
| 363 | |||
| 364 | // Calculate the difference between the pointers, taking care to account |
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| 365 | // for buffer wrapping conditions |
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| 366 | if(WritePT.Val > ReadPT.Val) |
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| 367 | { |
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| 368 | return (RXSTOP - RXSTART) - (WritePT.Val - ReadPT.Val); |
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| 369 | } |
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| 370 | else if(WritePT.Val == ReadPT.Val) |
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| 371 | { |
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| 372 | return RXSIZE - 1; |
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| 373 | } |
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| 374 | else |
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| 375 | { |
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| 376 | return ReadPT.Val - WritePT.Val - 1; |
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| 377 | } |
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| 378 | } |
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| 379 | |||
| 380 | /****************************************************************************** |
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| 381 | * Function: BOOL MACGetHeader(MAC_ADDR *remote, BYTE* type) |
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| 382 | * |
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| 383 | * PreCondition: None |
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| 384 | * |
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| 385 | * Input: *remote: Location to store the Source MAC address of the |
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| 386 | * received frame. |
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| 387 | * *type: Location of a BYTE to store the constant |
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| 388 | * MAC_UNKNOWN, ETHER_IP, or ETHER_ARP, representing |
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| 389 | * the contents of the Ethernet type field. |
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| 390 | * |
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| 391 | * Output: TRUE: If a packet was waiting in the RX buffer. The |
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| 392 | * remote, and type values are updated. |
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| 393 | * FALSE: If a packet was not pending. remote and type are |
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| 394 | * not changed. |
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| 395 | * |
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| 396 | * Side Effects: Last packet is discarded if MACDiscardRx() hasn't already |
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| 397 | * been called. |
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| 398 | * |
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| 399 | * Overview: None |
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| 400 | * |
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| 401 | * Note: None |
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| 402 | *****************************************************************************/ |
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| 403 | BOOL MACGetHeader(MAC_ADDR *remote, BYTE* type) |
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| 404 | { |
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| 405 | ENC_PREAMBLE header; |
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| 406 | |||
| 407 | // Test if at least one packet has been received and is waiting |
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| 408 | if(EPKTCNT == 0u) |
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| 409 | { |
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| 410 | return FALSE; |
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| 411 | } |
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| 412 | |||
| 413 | // Make absolutely certain that any previous packet was discarded |
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| 414 | if(WasDiscarded == FALSE) |
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| 415 | { |
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| 416 | MACDiscardRx(); |
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| 417 | return FALSE; |
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| 418 | } |
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| 419 | // Save the location of this packet |
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| 420 | CurrentPacketLocation.Val = NextPacketLocation.Val; |
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| 421 | |||
| 422 | // Set the read pointer to the beginning of the next unprocessed packet |
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| 423 | ERDPT = CurrentPacketLocation.Val; |
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| 424 | |||
| 425 | // Obtain the MAC header from the Ethernet buffer |
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| 426 | MACGetArray((BYTE*)&header, sizeof(header)); |
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| 427 | |||
| 428 | // The EtherType field, like most items transmitted on the Ethernet medium |
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| 429 | // are in big endian. |
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| 430 | header.Type.Val = swaps(header.Type.Val); |
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| 431 | |||
| 432 | // Do a sanity check. There might be a bug in code someplace if this |
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| 433 | // Reset() ever happens. Check for potential errors in array/pointer writing code. |
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| 434 | if(header.NextPacketPointer > RXSTOP || ((BYTE_VAL*)(&header.NextPacketPointer))->bits.b0 || |
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| 435 | header.StatusVector.bits.Zero || |
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| 436 | header.StatusVector.bits.CRCError || |
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| 437 | header.StatusVector.bits.ByteCount > 1518u || |
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| 438 | !header.StatusVector.bits.ReceiveOk) |
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| 439 | { |
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| 440 | Reset(); |
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| 441 | } |
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| 442 | |||
| 443 | // Save the location where the hardware will write the next packet to |
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| 444 | NextPacketLocation.Val = header.NextPacketPointer; |
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| 445 | |||
| 446 | // Return the Ethernet frame's Source MAC address field to the caller |
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| 447 | // This parameter is useful for replying to requests without requiring an |
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| 448 | // ARP cycle. |
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| 449 | memcpy((void*)remote->v, (void*)header.SourceMACAddr.v, sizeof(*remote)); |
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| 450 | |||
| 451 | // Return a simplified version of the EtherType field to the caller |
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| 452 | *type = MAC_UNKNOWN; |
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| 453 | if( (header.Type.v[1] == 0x08u) && |
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| 454 | ((header.Type.v[0] == ETHER_IP) || (header.Type.v[0] == ETHER_ARP)) ) |
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| 455 | { |
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| 456 | *type = header.Type.v[0]; |
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| 457 | } |
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| 458 | |||
| 459 | // Mark this packet as discardable |
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| 460 | WasDiscarded = FALSE; |
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| 461 | return TRUE; |
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| 462 | } |
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| 463 | |||
| 464 | |||
| 465 | /****************************************************************************** |
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| 466 | * Function: void MACPutHeader(MAC_ADDR *remote, BYTE type, WORD dataLen) |
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| 467 | * |
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| 468 | * PreCondition: MACIsTxReady() must return TRUE. |
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| 469 | * |
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| 470 | * Input: *remote: Pointer to memory which contains the destination |
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| 471 | * MAC address (6 bytes) |
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| 472 | * type: The constant ETHER_ARP or ETHER_IP, defining which |
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| 473 | * value to write into the Ethernet header's type field. |
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| 474 | * dataLen: Length of the Ethernet data payload |
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| 475 | * |
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| 476 | * Output: None |
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| 477 | * |
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| 478 | * Side Effects: None |
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| 479 | * |
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| 480 | * Overview: None |
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| 481 | * |
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| 482 | * Note: Because of the dataLen parameter, it is probably |
||
| 483 | * advantagous to call this function immediately before |
||
| 484 | * transmitting a packet rather than initially when the |
||
| 485 | * packet is first created. The order in which the packet |
||
| 486 | * is constructed (header first or data first) is not |
||
| 487 | * important. |
||
| 488 | *****************************************************************************/ |
||
| 489 | void MACPutHeader(MAC_ADDR *remote, BYTE type, WORD dataLen) |
||
| 490 | { |
||
| 491 | // Set the write pointer to the beginning of the transmit buffer |
||
| 492 | EWRPT = TXSTART + 1; |
||
| 493 | |||
| 494 | // Calculate where to put the TXND pointer |
||
| 495 | dataLen += (WORD)sizeof(ETHER_HEADER) + TXSTART; |
||
| 496 | |||
| 497 | // Write the TXND pointer into the registers, given the dataLen given |
||
| 498 | ETXND = dataLen; |
||
| 499 | |||
| 500 | // Set the per-packet control byte and write the Ethernet destination |
||
| 501 | // address |
||
| 502 | MACPutArray((BYTE*)remote, sizeof(*remote)); |
||
| 503 | |||
| 504 | // Write our MAC address in the Ethernet source field |
||
| 505 | MACPutArray((BYTE*)&AppConfig.MyMACAddr, sizeof(AppConfig.MyMACAddr)); |
||
| 506 | |||
| 507 | // Write the appropriate Ethernet Type WORD for the protocol being used |
||
| 508 | MACPut(0x08); |
||
| 509 | MACPut((type == MAC_IP) ? ETHER_IP : ETHER_ARP); |
||
| 510 | } |
||
| 511 | |||
| 512 | /****************************************************************************** |
||
| 513 | * Function: void MACFlush(void) |
||
| 514 | * |
||
| 515 | * PreCondition: A packet has been created by calling MACPut() and |
||
| 516 | * MACPutHeader(). |
||
| 517 | * |
||
| 518 | * Input: None |
||
| 519 | * |
||
| 520 | * Output: None |
||
| 521 | * |
||
| 522 | * Side Effects: None |
||
| 523 | * |
||
| 524 | * Overview: MACFlush causes the current TX packet to be sent out on |
||
| 525 | * the Ethernet medium. The hardware MAC will take control |
||
| 526 | * and handle CRC generation, collision retransmission and |
||
| 527 | * other details. |
||
| 528 | * |
||
| 529 | * Note: After transmission completes (MACIsTxReady() returns TRUE), |
||
| 530 | * the packet can be modified and transmitted again by calling |
||
| 531 | * MACFlush() again. Until MACPutHeader() or MACPut() is |
||
| 532 | * called (in the TX data area), the data in the TX buffer |
||
| 533 | * will not be corrupted. |
||
| 534 | *****************************************************************************/ |
||
| 535 | void MACFlush(void) |
||
| 536 | { |
||
| 537 | // Reset the Ethernet TX logic. This is an errata workaround to |
||
| 538 | // prevent the TXRTS bit from getting stuck set indefinitely, causing the |
||
| 539 | // stack to lock up under certain bad conditions. |
||
| 540 | ECON1bits.TXRST = 1; |
||
| 541 | ECON1bits.TXRST = 0; |
||
| 542 | |||
| 543 | // Wait at least 1.6us after TX Reset before setting TXRTS. |
||
| 544 | // If you don't wait long enough, the TX logic won't be finished resetting. |
||
| 545 | {volatile BYTE i = 8; while(i--);} |
||
| 546 | EIRbits.TXERIF = 0; |
||
| 547 | |||
| 548 | // Start the transmission |
||
| 549 | // After transmission completes (MACIsTxReady() returns TRUE), the packet |
||
| 550 | // can be modified and transmitted again by calling MACFlush() again. |
||
| 551 | // Until MACPutHeader() is called, the data in the TX buffer will not be |
||
| 552 | // corrupted. |
||
| 553 | ECON1bits.TXRTS = 1; |
||
| 554 | wTXWatchdog = TickGet(); |
||
| 555 | } |
||
| 556 | |||
| 557 | |||
| 558 | /****************************************************************************** |
||
| 559 | * Function: void MACSetReadPtrInRx(WORD offset) |
||
| 560 | * |
||
| 561 | * PreCondition: A packet has been obtained by calling MACGetHeader() and |
||
| 562 | * getting a TRUE result. |
||
| 563 | * |
||
| 564 | * Input: offset: WORD specifying how many bytes beyond the Ethernet |
||
| 565 | * header's type field to relocate the SPI read |
||
| 566 | * pointer. |
||
| 567 | * |
||
| 568 | * Output: None |
||
| 569 | * |
||
| 570 | * Side Effects: None |
||
| 571 | * |
||
| 572 | * Overview: SPI read pointer are updated. All calls to |
||
| 573 | * MACGet() and MACGetArray() will use these new values. |
||
| 574 | * |
||
| 575 | * Note: RXSTOP must be statically defined as being > RXSTART for |
||
| 576 | * this function to work correctly. In other words, do not |
||
| 577 | * define an RX buffer which spans the 0x1FFF->0x0000 memory |
||
| 578 | * boundary. |
||
| 579 | *****************************************************************************/ |
||
| 580 | void MACSetReadPtrInRx(WORD offset) |
||
| 581 | { |
||
| 582 | WORD_VAL ReadPT; |
||
| 583 | |||
| 584 | // Determine the address of the beginning of the entire packet |
||
| 585 | // and adjust the address to the desired location |
||
| 586 | ReadPT.Val = CurrentPacketLocation.Val + sizeof(ENC_PREAMBLE) + offset; |
||
| 587 | |||
| 588 | // Since the receive buffer is circular, adjust if a wraparound is needed |
||
| 589 | if(ReadPT.Val > RXSTOP) |
||
| 590 | ReadPT.Val -= RXSIZE; |
||
| 591 | |||
| 592 | // Set the read pointer to the new calculated value |
||
| 593 | ERDPTL = ReadPT.v[0]; |
||
| 594 | ERDPTH = ReadPT.v[1]; |
||
| 595 | } |
||
| 596 | |||
| 597 | |||
| 598 | /****************************************************************************** |
||
| 599 | * Function: PTR_BASE MACSetWritePtr(PTR_BASE Address) |
||
| 600 | * |
||
| 601 | * PreCondition: None |
||
| 602 | * |
||
| 603 | * Input: Address: Address to seek to |
||
| 604 | * |
||
| 605 | * Output: WORD: Old EWRPT location |
||
| 606 | * |
||
| 607 | * Side Effects: None |
||
| 608 | * |
||
| 609 | * Overview: SPI write pointer is updated. All calls to |
||
| 610 | * MACPut() and MACPutArray() will use this new value. |
||
| 611 | * |
||
| 612 | * Note: None |
||
| 613 | *****************************************************************************/ |
||
| 614 | PTR_BASE MACSetWritePtr(PTR_BASE address) |
||
| 615 | { |
||
| 616 | WORD oldVal; |
||
| 617 | |||
| 618 | oldVal = EWRPT; |
||
| 619 | EWRPT = address; |
||
| 620 | return oldVal; |
||
| 621 | } |
||
| 622 | |||
| 623 | /****************************************************************************** |
||
| 624 | * Function: PTR_BASE MACSetReadPtr(PTR_BASE Address) |
||
| 625 | * |
||
| 626 | * PreCondition: None |
||
| 627 | * |
||
| 628 | * Input: Address: Address to seek to |
||
| 629 | * |
||
| 630 | * Output: WORD: Old ERDPT value |
||
| 631 | * |
||
| 632 | * Side Effects: None |
||
| 633 | * |
||
| 634 | * Overview: SPI write pointer is updated. All calls to |
||
| 635 | * MACPut() and MACPutArray() will use this new value. |
||
| 636 | * |
||
| 637 | * Note: None |
||
| 638 | *****************************************************************************/ |
||
| 639 | PTR_BASE MACSetReadPtr(PTR_BASE address) |
||
| 640 | { |
||
| 641 | WORD oldVal; |
||
| 642 | |||
| 643 | oldVal = ERDPT; |
||
| 644 | ERDPT = address; |
||
| 645 | return oldVal; |
||
| 646 | } |
||
| 647 | |||
| 648 | |||
| 649 | /****************************************************************************** |
||
| 650 | * Function: WORD MACCalcRxChecksum(WORD offset, WORD len) |
||
| 651 | * |
||
| 652 | * PreCondition: None |
||
| 653 | * |
||
| 654 | * Input: offset - Number of bytes beyond the beginning of the |
||
| 655 | * Ethernet data (first byte after the type field) |
||
| 656 | * where the checksum should begin |
||
| 657 | * len - Total number of bytes to include in the checksum |
||
| 658 | * |
||
| 659 | * Output: 16-bit checksum as defined by RFC 793. |
||
| 660 | * |
||
| 661 | * Side Effects: None |
||
| 662 | * |
||
| 663 | * Overview: This function performs a checksum calculation in the MAC |
||
| 664 | * buffer itself |
||
| 665 | * |
||
| 666 | * Note: None |
||
| 667 | *****************************************************************************/ |
||
| 668 | WORD MACCalcRxChecksum(WORD offset, WORD len) |
||
| 669 | { |
||
| 670 | WORD temp; |
||
| 671 | WORD RDSave; |
||
| 672 | |||
| 673 | // Add the offset requested by firmware plus the Ethernet header |
||
| 674 | temp = CurrentPacketLocation.Val + sizeof(ENC_PREAMBLE) + offset; |
||
| 675 | if(temp > RXSTOP) // Adjust value if a wrap is needed |
||
| 676 | { |
||
| 677 | temp -= RXSIZE; |
||
| 678 | } |
||
| 679 | |||
| 680 | RDSave = ERDPT; |
||
| 681 | ERDPT = temp; |
||
| 682 | temp = CalcIPBufferChecksum(len); |
||
| 683 | ERDPT = RDSave; |
||
| 684 | |||
| 685 | return temp; |
||
| 686 | } |
||
| 687 | |||
| 688 | |||
| 689 | /****************************************************************************** |
||
| 690 | * Function: WORD CalcIPBufferChecksum(WORD len) |
||
| 691 | * |
||
| 692 | * PreCondition: Read buffer pointer set to starting of checksum data |
||
| 693 | * |
||
| 694 | * Input: len: Total number of bytes to calculate the checksum over. |
||
| 695 | * The first byte included in the checksum is the byte |
||
| 696 | * pointed to by ERDPT, which is updated by calls to |
||
| 697 | * MACGet(), MACSetRxBuffer(), MACSetTxBuffer(), etc. |
||
| 698 | * |
||
| 699 | * Output: 16-bit checksum as defined by RFC 793 |
||
| 700 | * |
||
| 701 | * Side Effects: None |
||
| 702 | * |
||
| 703 | * Overview: This function performs a checksum calculation in the MAC |
||
| 704 | * buffer itself. The MAC has a hardware DMA module |
||
| 705 | * which can calculate the checksum faster than software, so |
||
| 706 | * this function replaces the CaclIPBufferChecksum() function |
||
| 707 | * defined in the helpers.c file. Through the use of |
||
| 708 | * preprocessor defines, this replacement is automatic. |
||
| 709 | * |
||
| 710 | * Note: This function works either in the RX buffer area or the TX |
||
| 711 | * buffer area. No validation is done on the len parameter. |
||
| 712 | *****************************************************************************/ |
||
| 713 | /* |
||
| 714 | WORD CalcIPBufferChecksum(WORD len) |
||
| 715 | { |
||
| 716 | WORD_VAL temp; |
||
| 717 | |||
| 718 | // Take care of special cases which the DMA cannot be used for |
||
| 719 | if(len == 0u) |
||
| 720 | { |
||
| 721 | return 0xFFFF; |
||
| 722 | } |
||
| 723 | else if(len == 1u) |
||
| 724 | { |
||
| 725 | return ~((WORD)MACGet()); |
||
| 726 | } |
||
| 727 | |||
| 728 | |||
| 729 | // Set the DMA starting address to the RAM read pointer value |
||
| 730 | temp.Val = ERDPT; |
||
| 731 | EDMAST = temp.Val; |
||
| 732 | |||
| 733 | // See if we are calculating a checksum within the RX buffer (where |
||
| 734 | // wrapping rules apply) or TX/unused area (where wrapping rules are |
||
| 735 | // not applied) |
||
| 736 | #if RXSTART == 0 |
||
| 737 | if(temp.Val <= RXSTOP) |
||
| 738 | #else |
||
| 739 | if(temp.Val >= RXSTART && temp.Val <= RXSTOP) |
||
| 740 | #endif |
||
| 741 | { |
||
| 742 | // Calculate the DMA ending address given the starting address and len |
||
| 743 | // parameter. The DMA will follow the receive buffer wrapping boundary. |
||
| 744 | temp.Val += len-1; |
||
| 745 | if(temp.Val > RXSTOP) |
||
| 746 | { |
||
| 747 | temp.Val -= RXSIZE; |
||
| 748 | } |
||
| 749 | } |
||
| 750 | else |
||
| 751 | { |
||
| 752 | temp.Val += len-1; |
||
| 753 | } |
||
| 754 | |||
| 755 | // Write the DMA end address |
||
| 756 | EDMAND = temp.Val; |
||
| 757 | |||
| 758 | // Begin the DMA checksum calculation and wait until it is finished |
||
| 759 | ECON1bits.CSUMEN = 1; |
||
| 760 | ECON1bits.DMAST = 1; |
||
| 761 | while(ECON1bits.DMAST); |
||
| 762 | |||
| 763 | // Return the resulting good stuff |
||
| 764 | return (((WORD)EDMACSL)<<8) | EDMACSH; |
||
| 765 | } |
||
| 766 | */ |
||
| 767 | |||
| 768 | /****************************************************************************** |
||
| 769 | * Function: WORD CalcIPBufferChecksum(WORD len) |
||
| 770 | * |
||
| 771 | * PreCondition: Read buffer pointer set to starting of checksum data |
||
| 772 | * |
||
| 773 | * Input: len: Total number of bytes to calculate the checksum over. |
||
| 774 | * The first byte included in the checksum is the byte |
||
| 775 | * pointed to by ERDPT, which is updated by calls to |
||
| 776 | * MACSetReadPtr(), MACGet(), MACGetArray(), |
||
| 777 | * MACGetHeader(), etc. |
||
| 778 | * |
||
| 779 | * Output: 16-bit checksum as defined by RFC 793 |
||
| 780 | * |
||
| 781 | * Side Effects: None |
||
| 782 | * |
||
| 783 | * Overview: This function performs a checksum calculation in the MAC |
||
| 784 | * buffer itself |
||
| 785 | * |
||
| 786 | * Note: This function works either in the RX buffer area or the TX |
||
| 787 | * buffer area. No validation is done on the len parameter. |
||
| 788 | *****************************************************************************/ |
||
| 789 | WORD CalcIPBufferChecksum(WORD len) |
||
| 790 | { |
||
| 791 | WORD Start; |
||
| 792 | DWORD_VAL Checksum = {0x00000000ul}; |
||
| 793 | WORD ChunkLen; |
||
| 794 | BYTE DataBuffer[20]; // Must be an even size |
||
| 795 | WORD *DataPtr; |
||
| 796 | |||
| 797 | // Save the read pointer starting address |
||
| 798 | Start = ERDPT; |
||
| 799 | |||
| 800 | while(len) |
||
| 801 | { |
||
| 802 | // Obtain a chunk of data (less SPI overhead compared |
||
| 803 | // to requesting one byte at a time) |
||
| 804 | ChunkLen = len > sizeof(DataBuffer) ? sizeof(DataBuffer) : len; |
||
| 805 | MACGetArray(DataBuffer, ChunkLen); |
||
| 806 | |||
| 807 | len -= ChunkLen; |
||
| 808 | |||
| 809 | // Take care of a last odd numbered data byte |
||
| 810 | if(((WORD_VAL*)&ChunkLen)->bits.b0) |
||
| 811 | { |
||
| 812 | DataBuffer[ChunkLen] = 0x00; |
||
| 813 | ChunkLen++; |
||
| 814 | } |
||
| 815 | |||
| 816 | // Calculate the checksum over this chunk |
||
| 817 | DataPtr = (WORD*)&DataBuffer[0]; |
||
| 818 | while(ChunkLen) |
||
| 819 | { |
||
| 820 | Checksum.Val += *DataPtr++; |
||
| 821 | ChunkLen -= 2; |
||
| 822 | } |
||
| 823 | } |
||
| 824 | |||
| 825 | // Restore old read pointer location |
||
| 826 | ERDPT = Start; |
||
| 827 | |||
| 828 | // Do an end-around carry (one's complement arrithmatic) |
||
| 829 | Checksum.Val = (DWORD)Checksum.w[0] + (DWORD)Checksum.w[1]; |
||
| 830 | |||
| 831 | // Do another end-around carry in case if the prior add |
||
| 832 | // caused a carry out |
||
| 833 | Checksum.w[0] += Checksum.w[1]; |
||
| 834 | |||
| 835 | // Return the resulting checksum |
||
| 836 | return ~Checksum.w[0]; |
||
| 837 | } |
||
| 838 | |||
| 839 | /****************************************************************************** |
||
| 840 | * Function: void MACMemCopyAsync(PTR_BASE destAddr, PTR_BASE sourceAddr, WORD len) |
||
| 841 | * |
||
| 842 | * PreCondition: None |
||
| 843 | * |
||
| 844 | * Input: destAddr: Destination address in the Ethernet memory to |
||
| 845 | * copy to. If (PTR_BASE)-1 is specified, the |
||
| 846 | * current EWRPT value will be used instead. |
||
| 847 | * sourceAddr: Source address to read from. If (PTR_BASE)-1 is |
||
| 848 | * specified, the current ERDPT value will be used |
||
| 849 | * instead. |
||
| 850 | * len: Number of bytes to copy |
||
| 851 | * |
||
| 852 | * Output: None |
||
| 853 | * |
||
| 854 | * Side Effects: None |
||
| 855 | * |
||
| 856 | * Overview: Bytes are asynchrnously transfered within the buffer. Call |
||
| 857 | * MACIsMemCopyDone() to see when the transfer is complete. |
||
| 858 | * |
||
| 859 | * Note: If a prior transfer is already in progress prior to |
||
| 860 | * calling this function, this function will block until it |
||
| 861 | * can start this transfer. |
||
| 862 | *****************************************************************************/ |
||
| 863 | void MACMemCopyAsync(PTR_BASE destAddr, PTR_BASE sourceAddr, WORD len) |
||
| 864 | { |
||
| 865 | WORD_VAL ReadSave, WriteSave; |
||
| 866 | BOOL UpdateWritePointer = FALSE; |
||
| 867 | BOOL UpdateReadPointer = FALSE; |
||
| 868 | |||
| 869 | if(destAddr == (PTR_BASE)-1) |
||
| 870 | { |
||
| 871 | UpdateWritePointer = TRUE; |
||
| 872 | destAddr = EWRPT; |
||
| 873 | } |
||
| 874 | if(sourceAddr == (PTR_BASE)-1) |
||
| 875 | { |
||
| 876 | UpdateReadPointer = TRUE; |
||
| 877 | sourceAddr = ERDPT; |
||
| 878 | } |
||
| 879 | |||
| 880 | // Handle special conditions where len == 0 or len == 1 |
||
| 881 | // The DMA module is not capable of handling those corner cases |
||
| 882 | if(len <= 1u) |
||
| 883 | { |
||
| 884 | ReadSave.Val = ERDPT; |
||
| 885 | WriteSave.Val = EWRPT; |
||
| 886 | ERDPT = sourceAddr; |
||
| 887 | EWRPT = destAddr; |
||
| 888 | while(len--) |
||
| 889 | MACPut(MACGet()); |
||
| 890 | if(!UpdateReadPointer) |
||
| 891 | { |
||
| 892 | ERDPT = ReadSave.Val; |
||
| 893 | } |
||
| 894 | if(!UpdateWritePointer) |
||
| 895 | { |
||
| 896 | EWRPT = WriteSave.Val; |
||
| 897 | } |
||
| 898 | } |
||
| 899 | else |
||
| 900 | { |
||
| 901 | if(UpdateWritePointer) |
||
| 902 | { |
||
| 903 | WriteSave.Val = destAddr + len; |
||
| 904 | EWRPT = WriteSave.Val; |
||
| 905 | } |
||
| 906 | len += sourceAddr - 1; |
||
| 907 | while(ECON1bits.DMAST); |
||
| 908 | EDMAST = sourceAddr; |
||
| 909 | EDMADST = destAddr; |
||
| 910 | if((sourceAddr <= RXSTOP) && (len > RXSTOP)) //&& (sourceAddr >= RXSTART)) |
||
| 911 | len -= RXSIZE; |
||
| 912 | EDMAND = len; |
||
| 913 | ECON1bits.CSUMEN = 0; |
||
| 914 | ECON1bits.DMAST = 1; |
||
| 915 | while(ECON1bits.DMAST); // DMA requires that you must not access EDATA while DMA active |
||
| 916 | |||
| 917 | if(UpdateReadPointer) |
||
| 918 | { |
||
| 919 | len++; |
||
| 920 | if((sourceAddr <= RXSTOP) && (len > RXSTOP)) //&& (sourceAddr >= RXSTART)) |
||
| 921 | len -= RXSIZE; |
||
| 922 | ERDPT = len; |
||
| 923 | } |
||
| 924 | } |
||
| 925 | } |
||
| 926 | |||
| 927 | /* |
||
| 928 | void MACMemCopyAsync(WORD destAddr, WORD sourceAddr, WORD len) |
||
| 929 | { |
||
| 930 | WORD_VAL ReadSave, WriteSave; |
||
| 931 | BOOL UpdateWritePointer = FALSE; |
||
| 932 | BOOL UpdateReadPointer = FALSE; |
||
| 933 | |||
| 934 | if(((WORD_VAL*)&destAddr)->bits.b15) |
||
| 935 | { |
||
| 936 | UpdateWritePointer = TRUE; |
||
| 937 | destAddr = EWRPT; |
||
| 938 | } |
||
| 939 | if(((WORD_VAL*)&sourceAddr)->bits.b15) |
||
| 940 | { |
||
| 941 | UpdateReadPointer = TRUE; |
||
| 942 | sourceAddr = ERDPT; |
||
| 943 | } |
||
| 944 | |||
| 945 | ReadSave.Val = ERDPT; |
||
| 946 | WriteSave.Val = EWRPT; |
||
| 947 | ERDPT = sourceAddr; |
||
| 948 | EWRPT = destAddr; |
||
| 949 | while(len--) |
||
| 950 | { |
||
| 951 | MACPut(MACGet()); |
||
| 952 | } |
||
| 953 | |||
| 954 | if(!UpdateReadPointer) |
||
| 955 | { |
||
| 956 | ERDPT = ReadSave.Val; |
||
| 957 | } |
||
| 958 | if(!UpdateWritePointer) |
||
| 959 | { |
||
| 960 | EWRPT = WriteSave.Val; |
||
| 961 | } |
||
| 962 | } |
||
| 963 | */ |
||
| 964 | |||
| 965 | BOOL MACIsMemCopyDone(void) |
||
| 966 | { |
||
| 967 | return !ECON1bits.DMAST; |
||
| 968 | } |
||
| 969 | |||
| 970 | /****************************************************************************** |
||
| 971 | * Function: BYTE MACGet() |
||
| 972 | * |
||
| 973 | * PreCondition: ERDPT must point to the place to read from. |
||
| 974 | * |
||
| 975 | * Input: None |
||
| 976 | * |
||
| 977 | * Output: Byte read from the Ethernet's buffer RAM |
||
| 978 | * |
||
| 979 | * Side Effects: None |
||
| 980 | * |
||
| 981 | * Overview: MACGet returns the byte pointed to by ERDPT and |
||
| 982 | * increments ERDPT so MACGet() can be called again. The |
||
| 983 | * increment will follow the receive buffer wrapping boundary. |
||
| 984 | * |
||
| 985 | * Note: For better performance, implement this function as a macro: |
||
| 986 | * #define MACGet() (EDATA) |
||
| 987 | *****************************************************************************/ |
||
| 988 | BYTE MACGet() |
||
| 989 | { |
||
| 990 | return EDATA; |
||
| 991 | }//end MACGet |
||
| 992 | |||
| 993 | |||
| 994 | /****************************************************************************** |
||
| 995 | * Function: WORD MACGetArray(BYTE *val, WORD len) |
||
| 996 | * |
||
| 997 | * PreCondition: ERDPT must point to the place to read from. |
||
| 998 | * |
||
| 999 | * Input: *val: Pointer to storage location |
||
| 1000 | * len: Number of bytes to read from the data buffer. |
||
| 1001 | * |
||
| 1002 | * Output: Byte(s) of data read from the data buffer. |
||
| 1003 | * |
||
| 1004 | * Side Effects: None |
||
| 1005 | * |
||
| 1006 | * Overview: Reads several sequential bytes from the data buffer |
||
| 1007 | * and places them into local memory. ERDPT is incremented |
||
| 1008 | * after each byte, following the same rules as MACGet(). |
||
| 1009 | * |
||
| 1010 | * Note: None |
||
| 1011 | *****************************************************************************/ |
||
| 1012 | WORD MACGetArray(BYTE *val, WORD len) |
||
| 1013 | { |
||
| 1014 | WORD w; |
||
| 1015 | volatile BYTE i; |
||
| 1016 | |||
| 1017 | w = len; |
||
| 1018 | if(val) |
||
| 1019 | { |
||
| 1020 | while(w--) |
||
| 1021 | { |
||
| 1022 | *val++ = EDATA; |
||
| 1023 | } |
||
| 1024 | } |
||
| 1025 | else |
||
| 1026 | { |
||
| 1027 | while(w--) |
||
| 1028 | { |
||
| 1029 | i = EDATA; |
||
| 1030 | } |
||
| 1031 | } |
||
| 1032 | |||
| 1033 | return len; |
||
| 1034 | }//end MACGetArray |
||
| 1035 | |||
| 1036 | |||
| 1037 | /****************************************************************************** |
||
| 1038 | * Function: void MACPut(BYTE val) |
||
| 1039 | * |
||
| 1040 | * PreCondition: EWRPT must point to the location to begin writing. |
||
| 1041 | * |
||
| 1042 | * Input: Byte to write into the Ethernet buffer memory |
||
| 1043 | * |
||
| 1044 | * Output: None |
||
| 1045 | * |
||
| 1046 | * Side Effects: None |
||
| 1047 | * |
||
| 1048 | * Overview: Writes to the EDATA register, which will indirectly |
||
| 1049 | * increment EWRPTH:EWRPTL. |
||
| 1050 | * |
||
| 1051 | * Note: None |
||
| 1052 | *****************************************************************************/ |
||
| 1053 | void MACPut(BYTE val) |
||
| 1054 | { |
||
| 1055 | // Note: Due to a PIC18F97J60 bug, you must use the MOVFF instruction to |
||
| 1056 | // write to EDATA or else the read pointer (ERDPT) will inadvertently |
||
| 1057 | // increment. |
||
| 1058 | PRODL = val; |
||
| 1059 | #if defined(HI_TECH_C) |
||
| 1060 | asm("movff _PRODL, _EDATA"); |
||
| 1061 | #else |
||
| 1062 | _asm movff PRODL, EDATA _endasm |
||
| 1063 | #endif |
||
| 1064 | }//end MACPut |
||
| 1065 | |||
| 1066 | |||
| 1067 | /****************************************************************************** |
||
| 1068 | * Function: void MACPutArray(BYTE *val, WORD len) |
||
| 1069 | * |
||
| 1070 | * PreCondition: EWRPT must point to the location to begin writing. |
||
| 1071 | * |
||
| 1072 | * Input: *val: Pointer to source of bytes to copy. |
||
| 1073 | * len: Number of bytes to write to the data buffer. |
||
| 1074 | * |
||
| 1075 | * Output: None |
||
| 1076 | * |
||
| 1077 | * Side Effects: None |
||
| 1078 | * |
||
| 1079 | * Overview: MACPutArray writes several sequential bytes to the |
||
| 1080 | * Ethernet buffer RAM. It performs faster than multiple MACPut() |
||
| 1081 | * calls. EWRPT is incremented by len. |
||
| 1082 | * |
||
| 1083 | * Note: None |
||
| 1084 | *****************************************************************************/ |
||
| 1085 | void MACPutArray(BYTE *val, WORD len) |
||
| 1086 | { |
||
| 1087 | while(len--) |
||
| 1088 | { |
||
| 1089 | // Note: Due to a PIC18F97J60 bug, you must use the MOVFF instruction to |
||
| 1090 | // write to EDATA or else the read pointer (ERDPT) will inadvertently |
||
| 1091 | // increment. |
||
| 1092 | PRODL = *val++; |
||
| 1093 | #if defined(HI_TECH_C) |
||
| 1094 | asm("movff _PRODL, _EDATA"); |
||
| 1095 | #else |
||
| 1096 | _asm movff PRODL, EDATA _endasm |
||
| 1097 | #endif |
||
| 1098 | } |
||
| 1099 | }//end MACPutArray |
||
| 1100 | |||
| 1101 | void MACPutROMArray(ROM BYTE *val, WORD len) |
||
| 1102 | { |
||
| 1103 | while(len--) |
||
| 1104 | { |
||
| 1105 | // Note: Due to a PIC18F97J60 bug, you must use the MOVFF instruction to |
||
| 1106 | // write to EDATA or else the read pointer (ERDPT) will inadvertently |
||
| 1107 | // increment. |
||
| 1108 | PRODL = *val++; |
||
| 1109 | #if defined(HI_TECH_C) |
||
| 1110 | asm("movff _PRODL, _EDATA"); |
||
| 1111 | #else |
||
| 1112 | _asm movff PRODL, EDATA _endasm |
||
| 1113 | #endif |
||
| 1114 | } |
||
| 1115 | }//end MACPutROMArray |
||
| 1116 | |||
| 1117 | |||
| 1118 | /****************************************************************************** |
||
| 1119 | * Function: ReadPHYReg |
||
| 1120 | * |
||
| 1121 | * PreCondition: Ethernet module must be enabled (ECON1.ETHEN = 1). |
||
| 1122 | * |
||
| 1123 | * Input: Address of the PHY register to read from. |
||
| 1124 | * |
||
| 1125 | * Output: 16 bits of data read from the PHY register. |
||
| 1126 | * |
||
| 1127 | * Side Effects: None |
||
| 1128 | * |
||
| 1129 | * Overview: ReadPHYReg performs an MII read operation. While in |
||
| 1130 | * progress, it simply polls the MII BUSY bit wasting time |
||
| 1131 | * (10.24us). |
||
| 1132 | * |
||
| 1133 | * Note: None |
||
| 1134 | *****************************************************************************/ |
||
| 1135 | PHYREG ReadPHYReg(BYTE Register) |
||
| 1136 | { |
||
| 1137 | PHYREG Result; |
||
| 1138 | |||
| 1139 | // Set the right address and start the register read operation |
||
| 1140 | MIREGADR = Register; Nop(); |
||
| 1141 | MICMD = MICMD_MIIRD; Nop(); |
||
| 1142 | |||
| 1143 | // Loop to wait until the PHY register has been read through the MII |
||
| 1144 | // This requires 10.24us |
||
| 1145 | while(MISTATbits.BUSY); |
||
| 1146 | |||
| 1147 | // Stop reading |
||
| 1148 | MICMD = 0x00; Nop(); |
||
| 1149 | |||
| 1150 | // Obtain results and return |
||
| 1151 | Result.VAL.v[0] = MIRDL; |
||
| 1152 | Nop(); |
||
| 1153 | Result.VAL.v[1] = MIRDH; |
||
| 1154 | |||
| 1155 | return Result; |
||
| 1156 | }//end ReadPHYReg |
||
| 1157 | |||
| 1158 | |||
| 1159 | /****************************************************************************** |
||
| 1160 | * Function: WritePHYReg |
||
| 1161 | * |
||
| 1162 | * PreCondition: Ethernet module must be enabled (ECON1.ETHEN = 1). |
||
| 1163 | * |
||
| 1164 | * Input: Address of the PHY register to write to. |
||
| 1165 | * 16 bits of data to write to PHY register. |
||
| 1166 | * |
||
| 1167 | * Output: None |
||
| 1168 | * |
||
| 1169 | * Side Effects: None |
||
| 1170 | * |
||
| 1171 | * Overview: WritePHYReg performs an MII write operation. While in |
||
| 1172 | * progress, it simply polls the MII BUSY bit wasting time |
||
| 1173 | * (10.24us). |
||
| 1174 | * |
||
| 1175 | * Note: None |
||
| 1176 | *****************************************************************************/ |
||
| 1177 | void WritePHYReg(BYTE Register, WORD Data) |
||
| 1178 | { |
||
| 1179 | BYTE GIESave; |
||
| 1180 | |||
| 1181 | // Write the register address |
||
| 1182 | MIREGADR = Register; |
||
| 1183 | |||
| 1184 | // Write the data through the MIIM interface |
||
| 1185 | // Order is important: write low byte first, high byte last |
||
| 1186 | // |
||
| 1187 | // Due to a silicon problem, you cannot access any register with LSb address |
||
| 1188 | // bits of 0x16 between your write to MIWRL and MIWRH or else the value in |
||
| 1189 | // MIWRL will be corrupted. This inline assembly prevents this by copying |
||
| 1190 | // the value to PRODH:PRODL first, which is at fixed locations of |
||
| 1191 | // 0xFF4:0xFF3. These addresses have LSb address bits of 0x14 and 0x13. |
||
| 1192 | // Interrupts must be disabled to prevent arbitrary ISR code from accessing |
||
| 1193 | // memory with LSb bits of 0x16 and corrupting the MIWRL value. |
||
| 1194 | PRODL = ((WORD_VAL*)&Data)->v[0]; |
||
| 1195 | PRODH = ((WORD_VAL*)&Data)->v[1]; |
||
| 1196 | GIESave = INTCON & 0xC0; // Save GIEH and GIEL bits |
||
| 1197 | INTCON &= 0x3F; // Clear INTCONbits.GIEH and INTCONbits.GIEL |
||
| 1198 | #if defined(HI_TECH_C) |
||
| 1199 | asm("movff _PRODL, 0xEB6"); // movff PRODL, MIWRL |
||
| 1200 | asm("nop"); |
||
| 1201 | asm("movff _PRODH, 0xEB7"); // movff PRODH, MIWRH |
||
| 1202 | #else |
||
| 1203 | _asm |
||
| 1204 | movff PRODL, MIWRL |
||
| 1205 | nop |
||
| 1206 | movff PRODH, MIWRH |
||
| 1207 | _endasm |
||
| 1208 | #endif |
||
| 1209 | INTCON |= GIESave; // Restore GIEH and GIEL value |
||
| 1210 | |||
| 1211 | // Wait until the PHY register has been written |
||
| 1212 | // This operation requires 10.24us |
||
| 1213 | while(MISTATbits.BUSY); |
||
| 1214 | }//end WritePHYReg |
||
| 1215 | |||
| 1216 | |||
| 1217 | /****************************************************************************** |
||
| 1218 | * Function: void MACPowerDown(void) |
||
| 1219 | * |
||
| 1220 | * PreCondition: None |
||
| 1221 | * |
||
| 1222 | * Input: None |
||
| 1223 | * |
||
| 1224 | * Output: None |
||
| 1225 | * |
||
| 1226 | * Side Effects: None |
||
| 1227 | * |
||
| 1228 | * Overview: MACPowerDown disables the Ethernet module. |
||
| 1229 | * All MAC and PHY registers should not be accessed. |
||
| 1230 | * |
||
| 1231 | * Note: Normally, this function would be called before putting the |
||
| 1232 | * PIC to sleep. If a packet is being transmitted while this |
||
| 1233 | * function is called, this function will block until it is |
||
| 1234 | * it complete. If anything is being received, it will be |
||
| 1235 | * completed. |
||
| 1236 | * |
||
| 1237 | * The Ethernet module will continue to draw significant |
||
| 1238 | * power in sleep mode if this function is not called first. |
||
| 1239 | *****************************************************************************/ |
||
| 1240 | void MACPowerDown(void) |
||
| 1241 | { |
||
| 1242 | // Disable packet reception |
||
| 1243 | ECON1bits.RXEN = 0; |
||
| 1244 | |||
| 1245 | // Make sure any last packet which was in-progress when RXEN was cleared |
||
| 1246 | // is completed |
||
| 1247 | while(ESTATbits.RXBUSY); |
||
| 1248 | |||
| 1249 | // If a packet is being transmitted, wait for it to finish |
||
| 1250 | while(ECON1bits.TXRTS); |
||
| 1251 | |||
| 1252 | // Disable the Ethernet module |
||
| 1253 | ECON2bits.ETHEN = 0; |
||
| 1254 | }//end MACPowerDown |
||
| 1255 | |||
| 1256 | /****************************************************************************** |
||
| 1257 | * Function: void MACPowerUp(void) |
||
| 1258 | * |
||
| 1259 | * PreCondition: None |
||
| 1260 | * |
||
| 1261 | * Input: None |
||
| 1262 | * |
||
| 1263 | * Output: None |
||
| 1264 | * |
||
| 1265 | * Side Effects: None |
||
| 1266 | * |
||
| 1267 | * Overview: MACPowerUp returns the Ethernet module back to normal operation |
||
| 1268 | * after a previous call to MACPowerDown(). Calling this |
||
| 1269 | * function when already powered up will have no effect. |
||
| 1270 | * |
||
| 1271 | * Note: If a link partner is present, it will take 10s of |
||
| 1272 | * milliseconds before a new link will be established after |
||
| 1273 | * waking up. While not linked, packets which are |
||
| 1274 | * transmitted will most likely be lost. MACIsLinked() can |
||
| 1275 | * be called to determine if a link is established. |
||
| 1276 | *****************************************************************************/ |
||
| 1277 | void MACPowerUp(void) |
||
| 1278 | { |
||
| 1279 | // Power up the Ethernet module |
||
| 1280 | ECON2bits.ETHEN = 1; |
||
| 1281 | |||
| 1282 | // Wait for PHY to become ready |
||
| 1283 | while(!ESTATbits.PHYRDY) |
||
| 1284 | |||
| 1285 | // Enable packet reception |
||
| 1286 | ECON1bits.RXEN = 1; |
||
| 1287 | }//end MACPowerUp |
||
| 1288 | |||
| 1289 | |||
| 1290 | |||
| 1291 | /****************************************************************************** |
||
| 1292 | * Function: void SetRXHashTableEntry(MAC_ADDR DestMACAddr) |
||
| 1293 | * |
||
| 1294 | * PreCondition: SPI bus must be initialized (done in MACInit()). |
||
| 1295 | * |
||
| 1296 | * Input: DestMACAddr: 6 byte group destination MAC address to allow |
||
| 1297 | * through the Hash Table Filter |
||
| 1298 | * |
||
| 1299 | * Output: Sets the appropriate bit in the EHT* registers to allow |
||
| 1300 | * packets sent to DestMACAddr to be received if the Hash |
||
| 1301 | * Table receive filter is enabled |
||
| 1302 | * |
||
| 1303 | * Side Effects: None |
||
| 1304 | * |
||
| 1305 | * Overview: Calculates a CRC-32 using polynomial 0x4C11DB7 and then, |
||
| 1306 | * using bits 28:23 of the CRC, sets the appropriate bit in |
||
| 1307 | * the EHT* registers |
||
| 1308 | * |
||
| 1309 | * Note: This code is commented out to save code space on systems |
||
| 1310 | * that do not need this function. Change the "#if 0" line |
||
| 1311 | * to "#if 1" to uncomment it. |
||
| 1312 | *****************************************************************************/ |
||
| 1313 | #if 0 |
||
| 1314 | void SetRXHashTableEntry(MAC_ADDR DestMACAddr) |
||
| 1315 | { |
||
| 1316 | DWORD_VAL CRC = {0xFFFFFFFF}; |
||
| 1317 | BYTE *HTRegister; |
||
| 1318 | BYTE i, j; |
||
| 1319 | |||
| 1320 | // Calculate a CRC-32 over the 6 byte MAC address |
||
| 1321 | // using polynomial 0x4C11DB7 |
||
| 1322 | for(i = 0; i < sizeof(MAC_ADDR); i++) |
||
| 1323 | { |
||
| 1324 | BYTE crcnext; |
||
| 1325 | |||
| 1326 | // shift in 8 bits |
||
| 1327 | for(j = 0; j < 8; j++) |
||
| 1328 | { |
||
| 1329 | crcnext = 0; |
||
| 1330 | if(((BYTE_VAL*)&(CRC.v[3]))->bits.b7) |
||
| 1331 | crcnext = 1; |
||
| 1332 | crcnext ^= (((BYTE_VAL*)&DestMACAddr.v[i])->bits.b0); |
||
| 1333 | |||
| 1334 | CRC.Val <<= 1; |
||
| 1335 | if(crcnext) |
||
| 1336 | CRC.Val ^= 0x4C11DB7; |
||
| 1337 | // next bit |
||
| 1338 | DestMACAddr.v[i] >>= 1; |
||
| 1339 | } |
||
| 1340 | } |
||
| 1341 | |||
| 1342 | // CRC-32 calculated, now extract bits 28:23 |
||
| 1343 | // Bits 25:23 define where within the Hash Table byte the bit needs to be set |
||
| 1344 | // Bits 28:26 define which of the 8 Hash Table bytes that bits 25:23 apply to |
||
| 1345 | i = CRC.v[3] & 0x1F; |
||
| 1346 | HTRegister = (i >> 2) + &EHT0; |
||
| 1347 | i = (i << 1) & 0x06; |
||
| 1348 | ((BYTE_VAL*)&i)->bits.b0 = ((BYTE_VAL*)&CRC.v[2])->bits.b7; |
||
| 1349 | |||
| 1350 | // Set the proper bit in the Hash Table |
||
| 1351 | *HTRegister |= 1<<i; |
||
| 1352 | } |
||
| 1353 | #endif |
||
| 1354 | |||
| 1355 | |||
| 1356 | |||
| 1357 | #endif //#if (defined(__18F97J60) || defined(__18F96J65) || defined(__18F96J60) || defined(__18F87J60) || defined(__18F86J65) || defined(__18F86J60) || defined(__18F67J60) || defined(__18F66J65) || defined(__18F66J60)) || defined(HI_TECH_C) |
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