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1 32 kaklik /*********************************************************************
2 *
3 * Data SPI RAM Access Routines
4 * -Tested with AMI Semiconductor N256S0830HDA
5 *
6 *********************************************************************
7 * FileName: SPIRAM.c
8 * Dependencies: None
9 * Processor: PIC18, PIC24F, PIC24H, dsPIC30F, dsPIC33F, PIC32
10 * Compiler: Microchip C32 v1.05 or higher
11 * Microchip C30 v3.12 or higher
12 * Microchip C18 v3.30 or higher
13 * HI-TECH PICC-18 PRO 9.63PL2 or higher
14 * Company: Microchip Technology, Inc.
15 *
16 * Software License Agreement
17 *
18 * Copyright (C) 2002-2009 Microchip Technology Inc. All rights
19 * reserved.
20 *
21 * Microchip licenses to you the right to use, modify, copy, and
22 * distribute:
23 * (i) the Software when embedded on a Microchip microcontroller or
24 * digital signal controller product ("Device") which is
25 * integrated into Licensee's product; or
26 * (ii) ONLY the Software driver source files ENC28J60.c, ENC28J60.h,
27 * ENCX24J600.c and ENCX24J600.h ported to a non-Microchip device
28 * used in conjunction with a Microchip ethernet controller for
29 * the sole purpose of interfacing with the ethernet controller.
30 *
31 * You should refer to the license agreement accompanying this
32 * Software for additional information regarding your rights and
33 * obligations.
34 *
35 * THE SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT
36 * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT
37 * LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A
38 * PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL
39 * MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR
40 * CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF
41 * PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS
42 * BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE
43 * THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER
44 * SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT
45 * (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE.
46 *
47 * \file SPIRAM.c
48 * \author Howard Henry Schlunder
49 * \date 25 July 2007
50 ********************************************************************/
51 #define __SPIRAM_C
52  
53 #include "HardwareProfile.h"
54  
55 #if defined(SPIRAM_CS_TRIS)
56  
57 #include "TCPIP Stack/TCPIP.h"
58  
59  
60 // SPI SRAM opcodes
61 #define READ 0x03 // Read data from memory array beginning at selected address
62 #define WRITE 0x02 // Write data to memory array beginning at selected address
63 #define RDSR 0x05 // Read Status register
64 #define WRSR 0x01 // Write Status register
65  
66 #define SPIRAM_MAX_SPI_FREQ (15000000ul) // Hz
67  
68 #if defined(__PIC24F__) || defined(__PIC24FK__)
69 #define PROPER_SPICON1 (0x001B | 0x0120) // 1:1 primary prescale, 2:1 secondary prescale, CKE=1, MASTER mode
70 #elif defined(__dsPIC30F__)
71 #define PROPER_SPICON1 (0x0017 | 0x0120) // 1:1 primary prescale, 3:1 secondary prescale, CKE=1, MASTER mode
72 #elif defined(__dsPIC33F__) || defined(__PIC24H__)
73 #define PROPER_SPICON1 (0x000F | 0x0120) // 1:1 primary prescale, 5:1 secondary prescale, CKE=1, MASTER mode
74 #elif defined(__PIC32MX__)
75 #define PROPER_SPICON1 (_SPI2CON_ON_MASK | _SPI2CON_FRZ_MASK | _SPI2CON_CKE_MASK | _SPI2CON_MSTEN_MASK)
76 #else
77 #define PROPER_SPICON1 (0x20) // SSPEN bit is set, SPI in master mode, FOSC/4, IDLE state is low level
78 #endif
79  
80  
81 #if defined (__18CXX)
82 #define ClearSPIDoneFlag() {SPIRAM_SPI_IF = 0;}
83 #define WaitForDataByte() {while(!SPIRAM_SPI_IF); SPIRAM_SPI_IF = 0;}
84 #define SPI_ON_BIT (SPIRAM_SPICON1bits.SSPEN)
85 #elif defined(__C30__)
86 #define ClearSPIDoneFlag()
87 static inline __attribute__((__always_inline__)) void WaitForDataByte( void )
88 {
89 while ((SPIRAM_SPISTATbits.SPITBF == 1) || (SPIRAM_SPISTATbits.SPIRBF == 0));
90 }
91  
92 #define SPI_ON_BIT (SPIRAM_SPISTATbits.SPIEN)
93 #elif defined( __PIC32MX__ )
94 #define ClearSPIDoneFlag()
95 static inline __attribute__((__always_inline__)) void WaitForDataByte( void )
96 {
97 while (!SPIRAM_SPISTATbits.SPITBE || !SPIRAM_SPISTATbits.SPIRBF);
98 }
99  
100 #define SPI_ON_BIT (SPIRAM_SPICON1bits.ON)
101 #else
102 #error Determine SPI flag mechanism
103 #endif
104  
105 /*********************************************************************
106 * Function: void SPIRAMInit(void)
107 *
108 * PreCondition: None
109 *
110 * Input: None
111 *
112 * Output: None
113 *
114 * Side Effects: None
115 *
116 * Overview: Initialize SPI module to communicate to serial
117 * RAM.
118 *
119 * Note: Code sets SPI clock to Fosc/4.
120 ********************************************************************/
121 void SPIRAMInit(void)
122 {
123 volatile BYTE Dummy;
124 BYTE vSPIONSave;
125 #if defined(__18CXX)
126 BYTE SPICON1Save;
127 #elif defined(__C30__)
128 WORD SPICON1Save;
129 #else
130 DWORD SPICON1Save;
131 #endif
132  
133 SPIRAM_CS_IO = 1;
134 SPIRAM_CS_TRIS = 0; // Drive SPI RAM chip select pin
135  
136 SPIRAM_SCK_TRIS = 0; // Set SCK pin as an output
137 SPIRAM_SDI_TRIS = 1; // Make sure SDI pin is an input
138 SPIRAM_SDO_TRIS = 0; // Set SDO pin as an output
139  
140 // Save SPI state (clock speed)
141 SPICON1Save = SPIRAM_SPICON1;
142 vSPIONSave = SPI_ON_BIT;
143  
144 // Configure SPI
145 SPI_ON_BIT = 0;
146 SPIRAM_SPICON1 = PROPER_SPICON1;
147 SPI_ON_BIT = 1;
148  
149 ClearSPIDoneFlag();
150 #if defined(__C30__)
151 SPIRAM_SPICON2 = 0;
152 SPIRAM_SPISTAT = 0; // clear SPI
153 SPIRAM_SPISTATbits.SPIEN = 1;
154 #elif defined(__C32__)
155 SPIRAM_SPIBRG = (GetPeripheralClock()-1ul)/2ul/SPIRAM_MAX_SPI_FREQ;
156 SPIRAM_SPICON1bits.CKE = 1;
157 SPIRAM_SPICON1bits.MSTEN = 1;
158 SPIRAM_SPICON1bits.ON = 1;
159 #elif defined(__18CXX)
160 SPIRAM_SPISTATbits.CKE = 1; // Transmit data on rising edge of clock
161 SPIRAM_SPISTATbits.SMP = 0; // Input sampled at middle of data output time
162 #endif
163  
164 // Set Burst mode
165 // Activate chip select
166 SPIRAM_CS_IO = 0;
167  
168 // Send Write Status Register opcode
169 SPIRAM_SSPBUF = WRSR;
170 WaitForDataByte();
171 Dummy = SPIRAM_SSPBUF;
172  
173 // Set status register to 0b01000000 to enable burst mode
174 SPIRAM_SSPBUF = 0x40;
175 WaitForDataByte();
176 Dummy = SPIRAM_SSPBUF;
177  
178 // Deactivate chip select
179 SPIRAM_CS_IO = 1;
180  
181 // Restore SPI state
182 SPI_ON_BIT = 0;
183 SPIRAM_SPICON1 = SPICON1Save;
184 SPI_ON_BIT = vSPIONSave;
185 }
186  
187  
188 /*********************************************************************
189 * Function: void SPIRAMGetArray(WORD wAddress, BYTE *vData, WORD wLength)
190 *
191 * PreCondition:
192 *
193 * Input:
194 *
195 * Output:
196 *
197 * Side Effects: None
198 *
199 * Overview:
200 *
201 * Note: None
202 ********************************************************************/
203 void SPIRAMGetArray(WORD wAddress, BYTE *vData, WORD wLength)
204 {
205 volatile BYTE Dummy;
206 BYTE vSPIONSave;
207 #if defined(__18CXX)
208 BYTE SPICON1Save;
209 #elif defined(__C30__)
210 WORD SPICON1Save;
211 #else
212 DWORD SPICON1Save;
213 #endif
214  
215 // Ignore operations when the destination is NULL or nothing to read
216 if(vData == NULL)
217 return;
218 if(wLength == 0u)
219 return;
220  
221 // Save SPI state (clock speed)
222 SPICON1Save = SPIRAM_SPICON1;
223 vSPIONSave = SPI_ON_BIT;
224  
225 // Configure SPI
226 SPI_ON_BIT = 0;
227 SPIRAM_SPICON1 = PROPER_SPICON1;
228 SPI_ON_BIT = 1;
229  
230 // Activate chip select
231 SPIRAM_CS_IO = 0;
232 ClearSPIDoneFlag();
233  
234 // Send READ opcode
235 SPIRAM_SSPBUF = READ;
236 WaitForDataByte();
237 Dummy = SPIRAM_SSPBUF;
238  
239 // Send address
240 SPIRAM_SSPBUF = ((BYTE*)&wAddress)[1];
241 WaitForDataByte();
242 Dummy = SPIRAM_SSPBUF;
243  
244 SPIRAM_SSPBUF = ((BYTE*)&wAddress)[0];
245 WaitForDataByte();
246 Dummy = SPIRAM_SSPBUF;
247  
248 // Read data
249 while(wLength--)
250 {
251 SPIRAM_SSPBUF = 0;
252 WaitForDataByte();
253 *vData++ = SPIRAM_SSPBUF;
254 };
255  
256 // Deactivate chip select
257 SPIRAM_CS_IO = 1;
258  
259 // Restore SPI state
260 SPI_ON_BIT = 0;
261 SPIRAM_SPICON1 = SPICON1Save;
262 SPI_ON_BIT = vSPIONSave;
263 }
264  
265  
266 /*********************************************************************
267 * Function: void SPIRAMPutArray(WORD wAddress, BYTE *vData, WORD wLength)
268 *
269 * PreCondition:
270 *
271 * Input:
272 *
273 * Output:
274 *
275 * Side Effects: None
276 *
277 * Overview:
278 *
279 * Note: None
280 ********************************************************************/
281 void SPIRAMPutArray(WORD wAddress, BYTE *vData, WORD wLength)
282 {
283 volatile BYTE Dummy;
284 BYTE vSPIONSave;
285 #if defined(__18CXX)
286 BYTE SPICON1Save;
287 #elif defined(__C30__)
288 WORD SPICON1Save;
289 #else
290 DWORD SPICON1Save;
291 #endif
292  
293 // Ignore operations when the source data is NULL
294 if(vData == NULL)
295 return;
296 if(wLength == 0u)
297 return;
298  
299 // Save SPI state (clock speed)
300 SPICON1Save = SPIRAM_SPICON1;
301 vSPIONSave = SPI_ON_BIT;
302  
303 // Configure SPI
304 SPI_ON_BIT = 0;
305 SPIRAM_SPICON1 = PROPER_SPICON1;
306 SPI_ON_BIT = 1;
307  
308 // Activate chip select
309 SPIRAM_CS_IO = 0;
310 ClearSPIDoneFlag();
311  
312 // Send WRITE opcode
313 SPIRAM_SSPBUF = WRITE;
314 WaitForDataByte();
315 Dummy = SPIRAM_SSPBUF;
316  
317 // Send address
318 SPIRAM_SSPBUF = ((BYTE*)&wAddress)[1];
319 WaitForDataByte();
320 Dummy = SPIRAM_SSPBUF;
321  
322 SPIRAM_SSPBUF = ((BYTE*)&wAddress)[0];
323 WaitForDataByte();
324 Dummy = SPIRAM_SSPBUF;
325  
326 // Write data
327 while(wLength--)
328 {
329 SPIRAM_SSPBUF = *vData++;
330 WaitForDataByte();
331 Dummy = SPIRAM_SSPBUF;
332 };
333  
334 // Deactivate chip select
335 SPIRAM_CS_IO = 1;
336  
337 // Restore SPI state
338 SPI_ON_BIT = 0;
339 SPIRAM_SPICON1 = SPICON1Save;
340 SPI_ON_BIT = vSPIONSave;
341 }
342  
343 #if defined(__18CXX)
344 void SPIRAMPutROMArray(WORD wAddress, ROM BYTE *vData, WORD wLength)
345 {
346 volatile BYTE Dummy;
347 BYTE vSPIONSave;
348 BYTE SPICON1Save;
349  
350 // Ignore operations when the source data is NULL
351 if(vData == NULL)
352 return;
353 if(wLength == 0u)
354 return;
355  
356 // Save SPI state (clock speed)
357 SPICON1Save = SPIRAM_SPICON1;
358 vSPIONSave = SPI_ON_BIT;
359  
360 // Configure SPI
361 SPI_ON_BIT = 0;
362 SPIRAM_SPICON1 = PROPER_SPICON1;
363 SPI_ON_BIT = 1;
364  
365 // Activate chip select
366 SPIRAM_CS_IO = 0;
367 ClearSPIDoneFlag();
368  
369 // Send WRITE opcode
370 SPIRAM_SSPBUF = WRITE;
371 WaitForDataByte();
372 Dummy = SPIRAM_SSPBUF;
373  
374 // Send address
375 SPIRAM_SSPBUF = ((BYTE*)&wAddress)[1];
376 WaitForDataByte();
377 Dummy = SPIRAM_SSPBUF;
378  
379 SPIRAM_SSPBUF = ((BYTE*)&wAddress)[0];
380 WaitForDataByte();
381 Dummy = SPIRAM_SSPBUF;
382  
383 // Write data
384 while(wLength--)
385 {
386 SPIRAM_SSPBUF = *vData++;
387 WaitForDataByte();
388 Dummy = SPIRAM_SSPBUF;
389 };
390  
391 // Deactivate chip select
392 SPIRAM_CS_IO = 1;
393  
394 // Restore SPI state
395 SPI_ON_BIT = 0;
396 SPIRAM_SPICON1 = SPICON1Save;
397 SPI_ON_BIT = vSPIONSave;
398 }
399 #endif
400  
401  
402 #endif //#if defined(SPIRAM_CS_TRIS)
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