| Line No. | Rev | Author | Line |
|---|---|---|---|
| 1 | 32 | kaklik | /********************************************************************* |
| 2 | * |
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| 3 | * UART <-> TCP Bridge Example |
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| 4 | * Module for Microchip TCP/IP Stack |
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| 5 | * -Transmits all incoming TCP bytes on a socket out the UART |
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| 6 | * module, all incoming UART bytes out of the TCP socket. |
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| 7 | * -Reference: None (hopefully AN833 in the future) |
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| 8 | * |
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| 9 | ********************************************************************* |
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| 10 | * FileName: UART2TCPBridge.c |
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| 11 | * Dependencies: TCP, Hardware UART module, ARP (optional), |
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| 12 | * DNS (optional) |
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| 13 | * Processor: PIC18, PIC24F, PIC24H, dsPIC30F, dsPIC33F, PIC32 |
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| 14 | * Compiler: Microchip C32 v1.05 or higher |
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| 15 | * Microchip C30 v3.12 or higher |
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| 16 | * Microchip C18 v3.30 or higher |
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| 17 | * HI-TECH PICC-18 PRO 9.63PL2 or higher |
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| 18 | * Company: Microchip Technology, Inc. |
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| 19 | * |
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| 20 | * Software License Agreement |
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| 21 | * |
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| 22 | * Copyright (C) 2002-2009 Microchip Technology Inc. All rights |
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| 23 | * reserved. |
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| 24 | * |
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| 25 | * Microchip licenses to you the right to use, modify, copy, and |
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| 26 | * distribute: |
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| 27 | * (i) the Software when embedded on a Microchip microcontroller or |
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| 28 | * digital signal controller product ("Device") which is |
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| 29 | * integrated into Licensee's product; or |
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| 30 | * (ii) ONLY the Software driver source files ENC28J60.c, ENC28J60.h, |
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| 31 | * ENCX24J600.c and ENCX24J600.h ported to a non-Microchip device |
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| 32 | * used in conjunction with a Microchip ethernet controller for |
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| 33 | * the sole purpose of interfacing with the ethernet controller. |
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| 34 | * |
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| 35 | * You should refer to the license agreement accompanying this |
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| 36 | * Software for additional information regarding your rights and |
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| 37 | * obligations. |
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| 38 | * |
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| 39 | * THE SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT |
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| 40 | * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT |
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| 41 | * LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A |
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| 42 | * PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
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| 43 | * MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR |
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| 44 | * CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF |
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| 45 | * PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS |
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| 46 | * BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE |
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| 47 | * THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER |
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| 48 | * SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT |
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| 49 | * (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE. |
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| 50 | * |
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| 51 | * |
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| 52 | * Author Date Comment |
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| 53 | *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 54 | * Howard Schlunder 06/12/07 Original |
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| 55 | ********************************************************************/ |
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| 56 | #define __UART2TCPBRIDGE_C |
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| 57 | |||
| 58 | #include "TCPIPConfig.h" |
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| 59 | #include "HardwareProfile.h" |
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| 60 | |||
| 61 | |||
| 62 | // TCP listen port and UART baud rate settings. Due to a current C18 |
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| 63 | // preprocessor bug (tested on compiler 3.30), the BAUD_RATE definition needs |
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| 64 | // to be placed above the #if defined(STACK_USE_UART2TCP_BRIDGE) test. |
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| 65 | // Otherwise, it won't compile when STACK_USE_UART2TCP_BRIDGE is UNdefined. |
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| 66 | // Also, HardwareProfile.h also needs to be included before the |
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| 67 | // STACK_USE_UART2TCP_BRIDGE test. |
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| 68 | #define UART2TCPBRIDGE_PORT 9761 |
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| 69 | #define BAUD_RATE 19200 |
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| 70 | |||
| 71 | |||
| 72 | #if defined(STACK_USE_UART2TCP_BRIDGE) |
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| 73 | |||
| 74 | #include "TCPIP Stack/TCPIP.h" |
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| 75 | |||
| 76 | // Comment this define out if we are the server. |
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| 77 | // Insert the appropriate address if we are the client. |
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| 78 | //#define USE_REMOTE_TCP_SERVER "192.168.2.50" |
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| 79 | |||
| 80 | // Ring buffers for transfering data to and from the UART ISR: |
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| 81 | // - (Head pointer == Tail pointer) is defined as an empty FIFO |
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| 82 | // - (Head pointer == Tail pointer - 1), accounting for wraparound, |
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| 83 | // is defined as a completely full FIFO. As a result, the max data |
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| 84 | // in a FIFO is the buffer size - 1. |
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| 85 | static BYTE vUARTRXFIFO[65]; |
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| 86 | static BYTE vUARTTXFIFO[17]; |
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| 87 | static volatile BYTE *RXHeadPtr = vUARTRXFIFO, *RXTailPtr = vUARTRXFIFO; |
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| 88 | static volatile BYTE *TXHeadPtr = vUARTTXFIFO, *TXTailPtr = vUARTTXFIFO; |
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| 89 | |||
| 90 | |||
| 91 | /********************************************************************* |
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| 92 | * Function: void UART2TCPBridgeInit(void) |
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| 93 | * |
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| 94 | * PreCondition: None |
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| 95 | * |
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| 96 | * Input: None |
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| 97 | * |
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| 98 | * Output: None |
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| 99 | * |
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| 100 | * Side Effects: None |
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| 101 | * |
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| 102 | * Overview: Sets up the UART peripheral for this application |
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| 103 | * |
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| 104 | * Note: Uses interrupts |
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| 105 | ********************************************************************/ |
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| 106 | void UART2TCPBridgeInit(void) |
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| 107 | { |
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| 108 | // Initilize UART |
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| 109 | #if defined(__18CXX) |
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| 110 | TXSTA = 0x20; |
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| 111 | RCSTA = 0x90; |
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| 112 | |||
| 113 | #define CLOSEST_SPBRG_VALUE ((GetPeripheralClock()+2ul*BAUD_RATE)/BAUD_RATE/4-1) |
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| 114 | #define BAUD_ACTUAL (GetPeripheralClock()/(CLOSEST_SPBRG_VALUE+1)) |
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| 115 | #if (BAUD_ACTUAL > BAUD_RATE) |
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| 116 | #define BAUD_ERROR (BAUD_ACTUAL-BAUD_RATE) |
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| 117 | #else |
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| 118 | #define BAUD_ERROR (BAUD_RATE-BAUD_ACTUAL) |
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| 119 | #endif |
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| 120 | #define BAUD_ERROR_PRECENT ((BAUD_ERROR*100+BAUD_RATE/2)/BAUD_RATE) |
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| 121 | #if BAUD_ERROR_PRECENT > 2 |
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| 122 | // Use high speed (Fosc/4) 16-bit baud rate generator |
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| 123 | BAUDCONbits.BRG16 = 1; |
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| 124 | TXSTAbits.BRGH = 1; |
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| 125 | SPBRGH = ((GetPeripheralClock()+BAUD_RATE/2)/BAUD_RATE-1)>>8 & 0xFF; |
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| 126 | SPBRG = ((GetPeripheralClock()+BAUD_RATE/2)/BAUD_RATE-1) & 0xFF; |
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| 127 | #else |
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| 128 | // See if we can use the high baud (Fosc/16) 8-bit rate setting |
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| 129 | #if ((GetPeripheralClock()+2*BAUD_RATE)/BAUD_RATE/4 - 1) <= 255 |
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| 130 | SPBRG = (GetPeripheralClock()+2*BAUD_RATE)/BAUD_RATE/4 - 1; |
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| 131 | TXSTAbits.BRGH = 1; |
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| 132 | #else // Use the low baud rate 8-bit setting |
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| 133 | SPBRG = (GetPeripheralClock()+8*BAUD_RATE)/BAUD_RATE/16 - 1; |
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| 134 | #endif |
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| 135 | #endif |
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| 136 | |||
| 137 | // Use high priority interrupt |
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| 138 | IPR1bits.TXIP = 1; |
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| 139 | |||
| 140 | #else |
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| 141 | UARTTX_TRIS = 0; |
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| 142 | UARTRX_TRIS = 1; |
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| 143 | UMODE = 0x8000; // Set UARTEN. Note: this must be done before setting UTXEN |
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| 144 | |||
| 145 | #if defined(__C30__) |
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| 146 | USTA = 0x0400; // UTXEN set |
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| 147 | #define CLOSEST_UBRG_VALUE ((GetPeripheralClock()+8ul*BAUD_RATE)/16/BAUD_RATE-1) |
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| 148 | #define BAUD_ACTUAL (GetPeripheralClock()/16/(CLOSEST_UBRG_VALUE+1)) |
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| 149 | #else //defined(__C32__) |
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| 150 | IPC8bits.U2IP = 6; // Priority level 6 |
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| 151 | USTA = 0x00001400; // RXEN set, TXEN set |
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| 152 | #define CLOSEST_UBRG_VALUE ((GetPeripheralClock()+8ul*BAUD_RATE)/16/BAUD_RATE-1) |
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| 153 | #define BAUD_ACTUAL (GetPeripheralClock()/16/(CLOSEST_UBRG_VALUE+1)) |
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| 154 | #endif |
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| 155 | |||
| 156 | #define BAUD_ERROR ((BAUD_ACTUAL > BAUD_RATE) ? BAUD_ACTUAL-BAUD_RATE : BAUD_RATE-BAUD_ACTUAL) |
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| 157 | #define BAUD_ERROR_PRECENT ((BAUD_ERROR*100+BAUD_RATE/2)/BAUD_RATE) |
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| 158 | #if (BAUD_ERROR_PRECENT > 3) |
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| 159 | #warning UART frequency error is worse than 3% |
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| 160 | #elif (BAUD_ERROR_PRECENT > 2) |
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| 161 | #warning UART frequency error is worse than 2% |
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| 162 | #endif |
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| 163 | |||
| 164 | UBRG = CLOSEST_UBRG_VALUE; |
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| 165 | #endif |
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| 166 | |||
| 167 | } |
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| 168 | |||
| 169 | |||
| 170 | /********************************************************************* |
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| 171 | * Function: void UART2TCPBridgeTask(void) |
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| 172 | * |
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| 173 | * PreCondition: Stack is initialized() |
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| 174 | * |
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| 175 | * Input: None |
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| 176 | * |
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| 177 | * Output: None |
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| 178 | * |
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| 179 | * Side Effects: None |
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| 180 | * |
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| 181 | * Overview: None |
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| 182 | * |
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| 183 | * Note: None |
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| 184 | ********************************************************************/ |
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| 185 | void UART2TCPBridgeTask(void) |
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| 186 | { |
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| 187 | static enum _BridgeState |
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| 188 | { |
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| 189 | SM_HOME = 0, |
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| 190 | SM_SOCKET_OBTAINED |
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| 191 | } BridgeState = SM_HOME; |
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| 192 | static TCP_SOCKET MySocket = INVALID_SOCKET; |
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| 193 | WORD wMaxPut, wMaxGet, w; |
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| 194 | BYTE *RXHeadPtrShadow, *RXTailPtrShadow; |
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| 195 | BYTE *TXHeadPtrShadow, *TXTailPtrShadow; |
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| 196 | |||
| 197 | |||
| 198 | switch(BridgeState) |
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| 199 | { |
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| 200 | case SM_HOME: |
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| 201 | #if defined(USE_REMOTE_TCP_SERVER) |
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| 202 | // Connect a socket to the remote TCP server |
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| 203 | MySocket = TCPOpen((DWORD)USE_REMOTE_TCP_SERVER, TCP_OPEN_ROM_HOST, UART2TCPBRIDGE_PORT, TCP_PURPOSE_UART_2_TCP_BRIDGE); |
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| 204 | #else |
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| 205 | MySocket = TCPOpen(0, TCP_OPEN_SERVER, UART2TCPBRIDGE_PORT, TCP_PURPOSE_UART_2_TCP_BRIDGE); |
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| 206 | #endif |
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| 207 | |||
| 208 | // Abort operation if no TCP socket of type TCP_PURPOSE_UART_2_TCP_BRIDGE is available |
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| 209 | // If this ever happens, you need to go add one to TCPIPConfig.h |
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| 210 | if(MySocket == INVALID_SOCKET) |
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| 211 | break; |
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| 212 | |||
| 213 | // Eat the first TCPWasReset() response so we don't |
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| 214 | // infinitely create and reset/destroy client mode sockets |
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| 215 | TCPWasReset(MySocket); |
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| 216 | |||
| 217 | // We have a socket now, advance to the next state |
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| 218 | BridgeState = SM_SOCKET_OBTAINED; |
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| 219 | break; |
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| 220 | |||
| 221 | case SM_SOCKET_OBTAINED: |
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| 222 | // Reset all buffers if the connection was lost |
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| 223 | if(TCPWasReset(MySocket)) |
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| 224 | { |
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| 225 | // Optionally discard anything in the UART FIFOs |
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| 226 | //RXHeadPtr = vUARTRXFIFO; |
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| 227 | //RXTailPtr = vUARTRXFIFO; |
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| 228 | //TXHeadPtr = vUARTTXFIFO; |
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| 229 | //TXTailPtr = vUARTTXFIFO; |
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| 230 | |||
| 231 | // If we were a client socket, close the socket and attempt to reconnect |
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| 232 | #if defined(USE_REMOTE_TCP_SERVER) |
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| 233 | TCPDisconnect(MySocket); |
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| 234 | MySocket = INVALID_SOCKET; |
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| 235 | BridgeState = SM_HOME; |
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| 236 | break; |
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| 237 | #endif |
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| 238 | } |
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| 239 | |||
| 240 | // Don't do anything if nobody is connected to us |
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| 241 | if(!TCPIsConnected(MySocket)) |
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| 242 | break; |
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| 243 | |||
| 244 | |||
| 245 | // Make sure to clear UART errors so they don't block all future operations |
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| 246 | #if defined(__18CXX) |
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| 247 | if(RCSTAbits.OERR) |
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| 248 | { |
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| 249 | RCSTAbits.CREN = 0; |
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| 250 | RCSTAbits.CREN = 1; |
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| 251 | LED1_IO ^= 1; |
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| 252 | } |
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| 253 | if(RCSTAbits.FERR) |
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| 254 | { |
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| 255 | BYTE dummy = RCREG; |
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| 256 | LED2_IO ^= 1; |
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| 257 | } |
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| 258 | #else |
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| 259 | if(U2STAbits.OERR) |
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| 260 | U2STAbits.OERR = 0; |
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| 261 | #endif |
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| 262 | |||
| 263 | |||
| 264 | // Read FIFO pointers into a local shadow copy. Some pointers are volatile |
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| 265 | // (modified in the ISR), so we must do this safely by disabling interrupts |
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| 266 | RXTailPtrShadow = (BYTE*)RXTailPtr; |
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| 267 | TXHeadPtrShadow = (BYTE*)TXHeadPtr; |
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| 268 | #if defined(__18CXX) |
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| 269 | PIE1bits.RCIE = 0; |
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| 270 | PIE1bits.TXIE = 0; |
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| 271 | #else |
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| 272 | IEC1bits.U2RXIE = 0; |
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| 273 | IEC1bits.U2TXIE = 0; |
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| 274 | #endif |
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| 275 | RXHeadPtrShadow = (BYTE*)RXHeadPtr; |
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| 276 | TXTailPtrShadow = (BYTE*)TXTailPtr; |
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| 277 | #if defined(__18CXX) |
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| 278 | PIE1bits.RCIE = 1; |
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| 279 | if(TXHeadPtrShadow != TXTailPtrShadow) |
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| 280 | PIE1bits.TXIE = 1; |
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| 281 | #else |
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| 282 | IEC1bits.U2RXIE = 1; |
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| 283 | if(TXHeadPtrShadow != TXTailPtrShadow) |
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| 284 | IEC1bits.U2TXIE = 1; |
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| 285 | #endif |
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| 286 | |||
| 287 | // |
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| 288 | // Transmit pending data that has been placed into the UART RX FIFO (in the ISR) |
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| 289 | // |
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| 290 | wMaxPut = TCPIsPutReady(MySocket); // Get TCP TX FIFO space |
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| 291 | wMaxGet = RXHeadPtrShadow - RXTailPtrShadow; // Get UART RX FIFO byte count |
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| 292 | if(RXHeadPtrShadow < RXTailPtrShadow) |
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| 293 | wMaxGet += sizeof(vUARTRXFIFO); |
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| 294 | if(wMaxPut > wMaxGet) // Calculate the lesser of the two |
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| 295 | wMaxPut = wMaxGet; |
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| 296 | if(wMaxPut) // See if we can transfer anything |
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| 297 | { |
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| 298 | // Transfer the data over. Note that a two part put |
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| 299 | // may be needed if the data spans the vUARTRXFIFO |
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| 300 | // end to start address. |
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| 301 | w = vUARTRXFIFO + sizeof(vUARTRXFIFO) - RXTailPtrShadow; |
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| 302 | if(wMaxPut >= w) |
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| 303 | { |
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| 304 | TCPPutArray(MySocket, RXTailPtrShadow, w); |
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| 305 | RXTailPtrShadow = vUARTRXFIFO; |
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| 306 | wMaxPut -= w; |
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| 307 | } |
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| 308 | TCPPutArray(MySocket, RXTailPtrShadow, wMaxPut); |
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| 309 | RXTailPtrShadow += wMaxPut; |
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| 310 | |||
| 311 | // No flush. The stack will automatically flush and do |
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| 312 | // transmit coallescing to minimize the number of TCP |
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| 313 | // packets that get sent. If you explicitly call TCPFlush() |
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| 314 | // here, latency will go down, but so will max throughput |
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| 315 | // and bandwidth efficiency. |
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| 316 | } |
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| 317 | |||
| 318 | // |
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| 319 | // Transfer received TCP data into the UART TX FIFO for future transmission (in the ISR) |
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| 320 | // |
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| 321 | wMaxGet = TCPIsGetReady(MySocket); // Get TCP RX FIFO byte count |
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| 322 | wMaxPut = TXTailPtrShadow - TXHeadPtrShadow - 1;// Get UART TX FIFO free space |
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| 323 | if(TXHeadPtrShadow >= TXTailPtrShadow) |
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| 324 | wMaxPut += sizeof(vUARTTXFIFO); |
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| 325 | if(wMaxPut > wMaxGet) // Calculate the lesser of the two |
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| 326 | wMaxPut = wMaxGet; |
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| 327 | if(wMaxPut) // See if we can transfer anything |
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| 328 | { |
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| 329 | // Transfer the data over. Note that a two part put |
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| 330 | // may be needed if the data spans the vUARTTXFIFO |
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| 331 | // end to start address. |
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| 332 | w = vUARTTXFIFO + sizeof(vUARTTXFIFO) - TXHeadPtrShadow; |
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| 333 | if(wMaxPut >= w) |
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| 334 | { |
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| 335 | TCPGetArray(MySocket, TXHeadPtrShadow, w); |
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| 336 | TXHeadPtrShadow = vUARTTXFIFO; |
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| 337 | wMaxPut -= w; |
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| 338 | } |
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| 339 | TCPGetArray(MySocket, TXHeadPtrShadow, wMaxPut); |
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| 340 | TXHeadPtrShadow += wMaxPut; |
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| 341 | } |
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| 342 | |||
| 343 | // Write local shadowed FIFO pointers into the volatile FIFO pointers. |
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| 344 | #if defined(__18CXX) |
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| 345 | PIE1bits.RCIE = 0; |
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| 346 | PIE1bits.TXIE = 0; |
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| 347 | #else |
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| 348 | IEC1bits.U2RXIE = 0; |
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| 349 | IEC1bits.U2TXIE = 0; |
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| 350 | #endif |
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| 351 | RXTailPtr = (volatile BYTE*)RXTailPtrShadow; |
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| 352 | TXHeadPtr = (volatile BYTE*)TXHeadPtrShadow; |
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| 353 | #if defined(__18CXX) |
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| 354 | PIE1bits.RCIE = 1; |
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| 355 | if(TXHeadPtrShadow != TXTailPtrShadow) |
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| 356 | PIE1bits.TXIE = 1; |
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| 357 | #else |
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| 358 | IEC1bits.U2RXIE = 1; |
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| 359 | if(TXHeadPtrShadow != TXTailPtrShadow) |
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| 360 | IEC1bits.U2TXIE = 1; |
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| 361 | #endif |
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| 362 | |||
| 363 | break; |
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| 364 | } |
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| 365 | } |
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| 366 | |||
| 367 | |||
| 368 | #if defined(__18CXX) |
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| 369 | /********************************************************************* |
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| 370 | * Function: void UART2TCPBridgeISR(void) |
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| 371 | * |
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| 372 | * PreCondition: UART interrupt has occured |
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| 373 | * |
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| 374 | * Input: None |
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| 375 | * |
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| 376 | * Output: None |
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| 377 | * |
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| 378 | * Side Effects: None |
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| 379 | * |
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| 380 | * Overview: None |
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| 381 | * |
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| 382 | * Note: This function is supposed to be called in the ISR |
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| 383 | * context. |
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| 384 | ********************************************************************/ |
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| 385 | void UART2TCPBridgeISR(void) |
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| 386 | { |
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| 387 | // NOTE: All local variables used here should be declared static |
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| 388 | static BYTE i; |
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| 389 | |||
| 390 | // Store a received byte, if pending, if possible |
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| 391 | if(PIR1bits.RCIF) |
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| 392 | { |
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| 393 | // Get the byte |
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| 394 | i = RCREG; |
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| 395 | |||
| 396 | // Clear the interrupt flag so we don't keep entering this ISR |
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| 397 | PIR1bits.RCIF = 0; |
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| 398 | |||
| 399 | // Copy the byte into the local FIFO, if it won't cause an overflow |
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| 400 | if(RXHeadPtr != RXTailPtr - 1) |
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| 401 | { |
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| 402 | if((RXHeadPtr != vUARTRXFIFO + sizeof(vUARTRXFIFO)) || (RXTailPtr != vUARTRXFIFO)) |
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| 403 | { |
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| 404 | *RXHeadPtr++ = i; |
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| 405 | if(RXHeadPtr >= vUARTRXFIFO + sizeof(vUARTRXFIFO)) |
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| 406 | RXHeadPtr = (volatile BYTE*)vUARTRXFIFO; |
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| 407 | } |
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| 408 | } |
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| 409 | } |
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| 410 | |||
| 411 | // Transmit a byte, if pending, if possible |
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| 412 | if(PIR1bits.TXIF) |
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| 413 | { |
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| 414 | if(TXHeadPtr != TXTailPtr) |
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| 415 | { |
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| 416 | TXREG = *TXTailPtr++; |
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| 417 | if(TXTailPtr >= vUARTTXFIFO + sizeof(vUARTTXFIFO)) |
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| 418 | TXTailPtr = (volatile BYTE*)vUARTTXFIFO; |
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| 419 | } |
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| 420 | else // Disable the TX interrupt if we are done so that we don't keep entering this ISR |
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| 421 | { |
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| 422 | PIE1bits.TXIE = 0; |
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| 423 | } |
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| 424 | } |
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| 425 | } |
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| 426 | |||
| 427 | #else |
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| 428 | /********************************************************************* |
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| 429 | * Function: void _ISR _U2RXInterrupt(void) |
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| 430 | * |
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| 431 | * PreCondition: None |
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| 432 | * |
||
| 433 | * Input: None |
||
| 434 | * |
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| 435 | * Output: None |
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| 436 | * |
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| 437 | * Side Effects: None |
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| 438 | * |
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| 439 | * Overview: Copies bytes to and from the local UART TX and |
||
| 440 | * RX FIFOs |
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| 441 | * |
||
| 442 | * Note: None |
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| 443 | ********************************************************************/ |
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| 444 | #if __C30_VERSION__ >= 300 |
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| 445 | void _ISR __attribute__((__no_auto_psv__)) _U2RXInterrupt(void) |
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| 446 | #elif defined(__C30__) |
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| 447 | void _ISR _U2RXInterrupt(void) |
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| 448 | #else |
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| 449 | void _U2RXInterrupt(void) |
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| 450 | #endif |
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| 451 | { |
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| 452 | BYTE i; |
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| 453 | |||
| 454 | // Store a received byte, if pending, if possible |
||
| 455 | // Get the byte |
||
| 456 | i = U2RXREG; |
||
| 457 | |||
| 458 | // Clear the interrupt flag so we don't keep entering this ISR |
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| 459 | IFS1bits.U2RXIF = 0; |
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| 460 | |||
| 461 | // Copy the byte into the local FIFO, if it won't cause an overflow |
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| 462 | if(RXHeadPtr != RXTailPtr - 1) |
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| 463 | { |
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| 464 | if((RXHeadPtr != vUARTRXFIFO + sizeof(vUARTRXFIFO)) || (RXTailPtr != vUARTRXFIFO)) |
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| 465 | { |
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| 466 | *RXHeadPtr++ = i; |
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| 467 | if(RXHeadPtr >= vUARTRXFIFO + sizeof(vUARTRXFIFO)) |
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| 468 | RXHeadPtr = vUARTRXFIFO; |
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| 469 | } |
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| 470 | } |
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| 471 | } |
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| 472 | /********************************************************************* |
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| 473 | * Function: void _ISR _U2TXInterrupt(void) |
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| 474 | * |
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| 475 | * PreCondition: None |
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| 476 | * |
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| 477 | * Input: None |
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| 478 | * |
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| 479 | * Output: None |
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| 480 | * |
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| 481 | * Side Effects: None |
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| 482 | * |
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| 483 | * Overview: Copies bytes to and from the local UART TX and |
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| 484 | * RX FIFOs |
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| 485 | * |
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| 486 | * Note: None |
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| 487 | ********************************************************************/ |
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| 488 | #if __C30_VERSION__ >= 300 |
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| 489 | void _ISR __attribute__((__no_auto_psv__)) _U2TXInterrupt(void) |
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| 490 | #elif defined(__C30__) |
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| 491 | void _ISR _U2TXInterrupt(void) |
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| 492 | #else |
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| 493 | void _U2TXInterrupt(void) |
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| 494 | #endif |
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| 495 | { |
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| 496 | // Transmit a byte, if pending, if possible |
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| 497 | if(TXHeadPtr != TXTailPtr) |
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| 498 | { |
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| 499 | // Clear the TX interrupt flag before transmitting again |
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| 500 | IFS1bits.U2TXIF = 0; |
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| 501 | |||
| 502 | U2TXREG = *TXTailPtr++; |
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| 503 | if(TXTailPtr >= vUARTTXFIFO + sizeof(vUARTTXFIFO)) |
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| 504 | TXTailPtr = vUARTTXFIFO; |
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| 505 | } |
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| 506 | else // Disable the TX interrupt if we are done so that we don't keep entering this ISR |
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| 507 | { |
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| 508 | IEC1bits.U2TXIE = 0; |
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| 509 | } |
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| 510 | } |
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| 511 | |||
| 512 | |||
| 513 | #if defined(__C32__) |
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| 514 | void __attribute((interrupt(ipl6), vector(_UART2_VECTOR), nomips16)) U2Interrupt(void) |
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| 515 | { |
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| 516 | if(IFS1bits.U2RXIF) |
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| 517 | _U2RXInterrupt(); |
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| 518 | if(IEC1bits.U2TXIE) |
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| 519 | { |
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| 520 | if(IFS1bits.U2TXIF) |
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| 521 | _U2TXInterrupt(); |
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| 522 | } |
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| 523 | } |
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| 524 | #endif |
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| 525 | |||
| 526 | #endif // end of ISRs |
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| 527 | |||
| 528 | |||
| 529 | #endif //#if defined(STACK_USE_UART2TCP_BRIDGE) |
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