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library

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Blame information for rev 32

Line No. Rev Author Line
1 32 kaklik  
2 /******************************************************************************
3  
4 USB PIC24-Specific Header
5  
6 This file defines PIC24-specific items.
7  
8 Software License Agreement
9  
10 The software supplied herewith by Microchip Technology Incorporated
11 (the “Company”) for its PICmicro® Microcontroller is intended and
12 supplied to you, the Company’s customer, for use solely and
13 exclusively on Microchip PICmicro Microcontroller products. The
14 software is owned by the Company and/or its supplier, and is
15 protected under applicable copyright laws. All rights are reserved.
16 Any use in violation of the foregoing restrictions may subject the
17 user to criminal sanctions under applicable laws, as well as to
18 civil liability for the breach of the terms and conditions of this
19 license.
20  
21 THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES,
22 WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED
23 TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
24 PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT,
25 IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR
26 CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
27  
28 Change History:
29 Rev Description
30 ---------- ----------------------------------------------------------
31 2.6 - 2.7a No change
32  
33 *******************************************************************************/
34  
35 // To Do: Put all PIC24-specific USB HW definitions here,
36  
37 #if defined(USB_SUPPORT_HOST) && !defined(USB_SUPPORT_OTG)
38 //#error
39 #define KVA_TO_PA(v) v
40 #define PA_TO_KVA0(pa) pa
41 #define PA_TO_KVA1(pa) pa
42 #define GET_PHYSICAL_ADDRESS(v) (v)
43  
44  
45 /* translate betwwen KSEG0 and KSEG1 virtual addresses */
46 #define KVA0_TO_KVA1(v) ((v) | 0x20000000)
47 #define KVA1_TO_KVA0(v) ((v) & ~0x20000000)
48  
49  
50 /********************************************************************
51 * USB - PIC Endpoint Definitions
52 * PIC Endpoint Address Format: X:EP3:EP2:EP1:EP0:DIR:PPBI:X
53 * This is used when checking the value read from USTAT
54 *
55 * NOTE: These definitions are not used in the descriptors.
56 * EP addresses used in the descriptors have different format.
57 *******************************************************************/
58 #define USTAT_EP0_PP_MASK ~0x04
59 #define USTAT_EP_MASK 0xFC
60 #define USTAT_EP0_OUT 0x00
61 #define USTAT_EP0_OUT_EVEN 0x00
62 #define USTAT_EP0_OUT_ODD 0x04
63  
64 #define USTAT_EP0_IN 0x08
65 #define USTAT_EP0_IN_EVEN 0x08
66 #define USTAT_EP0_IN_ODD 0x0C
67  
68  
69 //******************************************************************************
70 // USB Endpoint Control Registers
71 //
72 // In USB Host mode, only EP0 control registers are used. The other registers
73 // should be disabled.
74 //******************************************************************************
75 /*typedef union
76 {
77 WORD UEP[16];
78 } _UEP;*/
79  
80 #define UEP_STALL 0x0002
81  
82  
83 /********************************************************************
84 * Buffer Descriptor Status Register
85 *******************************************************************/
86  
87 /* Buffer Descriptor Status Register Initialization Parameters */
88  
89 #if !defined(USB_SUPPORT_DEVICE)
90 //The _BSTALL definition is changed from 0x04 to 0x00 to
91 // fix a difference in the PIC18 and PIC24 definitions of this
92 // bit. This should be changed back once the definitions are
93 // synced.
94 #define _BSTALL 0x04 //Buffer Stall enable
95 #define _DTSEN 0x08 //Data Toggle Synch enable
96 #define _DAT0 0x00 //DATA0 packet expected next
97 #define _DAT1 0x40 //DATA1 packet expected next
98 #define _DTSMASK 0x40 //DTS Mask
99 #define _USIE 0x80 //SIE owns buffer
100 #define _UCPU 0x00 //CPU owns buffer
101  
102 #define _STAT_MASK 0xFC
103  
104 // Buffer Descriptor Status Register layout.
105 typedef union _BD_STAT
106 {
107 struct{
108 unsigned :2; //Byte count
109 unsigned BSTALL :1; //Buffer Stall Enable
110 unsigned DTSEN :1; //Data Toggle Synch Enable
111 unsigned :2; //Reserved - write as 00
112 unsigned DTS :1; //Data Toggle Synch Value
113 unsigned UOWN :1; //USB Ownership
114 };
115 struct{
116 unsigned :2;
117 unsigned PID0 :1;
118 unsigned PID1 :1;
119 unsigned PID2 :1;
120 unsigned PID3 :1;
121 };
122 struct{
123 unsigned :2;
124 unsigned PID :4; // Packet Identifier
125 };
126 BYTE Val;
127 } BD_STAT; //Buffer Descriptor Status Register
128  
129 /********************************************************************
130 * Buffer Descriptor Table Mapping
131 *******************************************************************/
132 // BDT Entry Layout
133 typedef union __BDT
134 {
135 union
136 {
137 struct
138 {
139 BYTE CNT __attribute__ ((packed));
140 BD_STAT STAT __attribute__ ((packed));
141 };
142 struct
143 {
144 WORD count:10; //test
145 BYTE :6;
146 BYTE* ADR; //Buffer Address
147 };
148 };
149 DWORD Val;
150 WORD v[2];
151 } BDT_ENTRY;
152 #endif
153  
154  
155 /* Register Abstractions
156 *************************************************************************
157 */
158  
159 #define USBSetBDTAddress(addr) U1BDTP1 = (((unsigned int)addr)/256);
160 #define USBPowerModule() U1PWRCbits.USBPWR = 1;
161 #define USBPingPongBufferReset U1CONbits.PPBRST
162  
163 //#define USBTransactionCompleteIE U1IEbits.TRNIE
164 //#define USBTransactionCompleteIF U1IRbits.TRNIF
165 //#define USBTransactionCompleteIFReg (BYTE*)&U1IR
166 //#define USBTransactionCompleteIFBitNum 3
167  
168 #define USBResetIE U1IEbits.URSTIE
169 #define USBResetIF U1IRbits.URSTIF
170 #define USBResetIFReg (BYTE*)&U1IR
171 #define USBResetIFBitNum 0
172  
173 #define USBIdleIE U1IEbits.IDLEIE
174 #define USBIdleIF U1IRbits.IDLEIF
175 #define USBIdleIFReg (BYTE*)&U1IR
176 #define USBIdleIFBitNum 4
177  
178 #define USBActivityIE U1OTGIEbits.ACTVIE
179 #define USBActivityIF U1OTGIRbits.ACTVIF
180 #define USBActivityIFReg (BYTE*)&U1OTGIR
181 #define USBActivityIFBitNum 4
182  
183 #define USBSOFIE U1IEbits.SOFIE
184 #define USBSOFIF U1IRbits.SOFIF
185 #define USBSOFIFReg (BYTE*)&U1IR
186 #define USBSOFIFBitNum 2
187  
188 #define USBStallIE U1IEbits.STALLIE
189 #define USBStallIF U1IRbits.STALLIF
190 #define USBStallIFReg (BYTE*)&U1IR
191 #define USBStallIFBitNum 7
192  
193 #define USBErrorIE U1IEbits.UERRIE
194 #define USBErrorIF U1IRbits.UERRIF
195 #define USBErrorIFReg (BYTE*)&U1IR
196 #define USBErrorIFBitNum 1
197  
198 //#define USBSE0Event U1CONbits.SE0
199 #define USBSuspendControl U1PWRCbits.USUSPEND
200 #define USBPacketDisable U1CONbits.PKTDIS
201 #define USBResumeControl U1CONbits.RESUME
202  
203 #define USBT1MSECIE U1OTGIEbits.T1MSECIE
204 #define USBT1MSECIF U1OTGIRbits.T1MSECIF
205 #define USBT1MSECIFReg (BYTE*)&U1OTGIR
206 #define USBT1MSECIFBitNum 6
207  
208 #define USBIDIE U1OTGIEbits.IDIE
209 #define USBIDIF U1OTGIRbits.IDIF
210 #define USBIDIFReg (BYTE*)&U1OTGIR
211 #define USBIDIFBitNum 7
212  
213 #define USB_PING_PONG__ALL_BUT_EP0 0x03 // U1CFG1 - Ping-pong on all endpoints except EP0
214 #define USB_PING_PONG__FULL_PING_PONG 0x02 // U1CFG1 - Ping-pong on all endpoints
215 #define USB_PING_PONG__EP0_OUT_ONLY 0x01 // U1CFG1 - Ping-pong on EP 0 out only
216 #define USB_PING_PONG__NO_PING_PONG 0x00 // U1CFG1 - No ping-pong
217  
218 #endif
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