Rev Author Line No. Line
1757 kakl 1  
2 //struct {
1758 kakl 3 unsigned int8 firenum=TDC_FIRENUM_0;
4 unsigned int8 div_fire=TDC_DIV_FIRE_2;
5 unsigned int8 calresnum=TDC_CALPERIODS_2;
6 unsigned int8 clkhsdiv=TDC_CLKHSDIV_1;
7 unsigned int8 start_clkhs=TDC_CLKHS_ON;
8 unsigned int1 portnum=TDC_TPORTNUM_4;
9 unsigned int1 Tcycle=TDC_TCYCLE_SHORT;
10 unsigned int1 fakenum=TDC_TFAKENUM_2;
11 unsigned int1 selclkT=TDC_TSELCLK_128HS;
12 unsigned int1 calibrate=TDC_CALIBRATE_EN;
13 unsigned int1 disautocal=TDC_AUTOCAL_EN;
14 unsigned int1 MRange=TDC_MRANGE2;
15 unsigned int1 neg_stop2=TDC_NEG_STOP2;
16 unsigned int1 neg_stop1=TDC_NEG_STOP1;
17 unsigned int1 neg_start=TDC_NEG_START;
1757 kakl 18 //}reg0;
19  
20 //struct {
1758 kakl 21 unsigned int hit2=TDC_MRANGE1_HIT2_NOAC;
22 unsigned int hit1=TDC_MRANGE1_HIT1_NOAC;
23 unsigned int1 fast_init=TDC_FAST_INIT_DIS;
24 unsigned int hitin2=TDC_HITIN2_0;
25 unsigned int hitin1=TDC_HITIN1_0;
1757 kakl 26 //}reg1;
27  
28 //struct {
1758 kakl 29 unsigned int en_int=TDC_INT_ALU;
30 unsigned int1 rfedge2=TDC_CH2EDGE_RIS;
31 unsigned int1 rfedge1=TDC_CH1EDGE_RIS;
32 unsigned int32 delval1=0;
1757 kakl 33 //}reg2;
34  
35 //struct {
1758 kakl 36 unsigned int1 en_err_val=TDC_ERRVAL_DIS;
37 unsigned int tim0_mr2=TDC_TIM0MR2_16384CLKHS;
38 unsigned int32 delval2=0;
1757 kakl 39 //}reg3;
40  
1758 kakl 41 //reg4
42 unsigned int32 delval3=0;
43  
44 //reg5
45 unsigned int conf_fire=0;
46 unsigned int1 en_startnoise=TDC_STARTNOISE_DIS;
47 unsigned int1 dis_phasenoise=TDC_PHASENOISE_DIS;
48 unsigned int repeat_fire=TDC_REPEAT_FIRE_0;
1775 kaklik 49 unsigned int16 phase_fire=0;
1758 kakl 50  
1757 kakl 51 //}TDC_registers;
52  
53  
1980 kaklik 54 /*
55 1 0 0 0 0 ADR2 ADR1 ADR0 Write into address ADR
56 1 0 1 1 0 ADR2 ADR1 ADR0 Read from address ADR
57  
58  
59  
60  
61  
62  
63 */
64  
1744 kakl 65 void TDC_init()
66 {
1745 kakl 67 output_low(TDC_ENABLE);
1759 kakl 68 spi_xfer(TDC_stream,0x70,8);
1745 kakl 69 output_high(TDC_ENABLE);
1744 kakl 70 }
71  
72 void TDC_reset()
73 {
1745 kakl 74 output_low(TDC_ENABLE);
1759 kakl 75 spi_xfer(TDC_stream,0x50,8);
1745 kakl 76 output_high(TDC_ENABLE);
1744 kakl 77 }
78  
79 void TDC_start_cycle()
80 {
1745 kakl 81 output_low(TDC_ENABLE);
1759 kakl 82 spi_xfer(TDC_stream,0x01,8);
1745 kakl 83 output_high(TDC_ENABLE);
1744 kakl 84 }
85  
86 void TDC_start_temp()
87 {
1745 kakl 88 output_low(TDC_ENABLE);
1759 kakl 89 spi_xfer(TDC_stream,0x02,8);
1745 kakl 90 output_high(TDC_ENABLE);
1744 kakl 91 }
92  
93 void TDC_start_cal_resonator()
94 {
1745 kakl 95 output_low(TDC_ENABLE);
1759 kakl 96 spi_xfer(TDC_stream,0x03,8);
1745 kakl 97 output_high(TDC_ENABLE);
1744 kakl 98 }
99  
100 void TDC_start_cal()
101 {
1745 kakl 102 output_low(TDC_ENABLE);
1759 kakl 103 spi_xfer(TDC_stream,0x04,8);
1745 kakl 104 output_high(TDC_ENABLE);
1744 kakl 105 }
106  
107 unsigned int32 TDC_get_measurement(int num)
108 {
1745 kakl 109 unsigned int32 ret;
110  
111 output_low(TDC_ENABLE);
1967 kaklik 112 spi_xfer(TDC_stream,0xB0 + num - 1, 8);
1745 kakl 113 ret=spi_xfer(TDC_stream,0,32);
114 output_high(TDC_ENABLE);
115 return ret;
1744 kakl 116 }
117  
118 unsigned int16 TDC_get_status()
119 {
1745 kakl 120 unsigned int16 ret;
121  
122 output_low(TDC_ENABLE);
123 spi_xfer(TDC_stream,0xB4,8);
124 ret=spi_xfer(TDC_stream,0,16);
125 output_high(TDC_ENABLE);
126 return ret;
1744 kakl 127 }
128  
129 unsigned int8 TDC_get_reg1()
130 {
1745 kakl 131 unsigned int8 ret;
132  
133 output_low(TDC_ENABLE);
134 spi_xfer(TDC_stream,0xB5,8);
135 ret=spi_xfer(TDC_stream,0,8);
136 output_high(TDC_ENABLE);
137 return ret;
1744 kakl 138 }
139  
1965 kaklik 140 void TDC_update_reg1() // updates reg1 only
141 {
142 output_low(TDC_ENABLE);
143 spi_xfer(TDC_stream,0x81,8);
144 spi_xfer(TDC_stream,hit2,4);
145 spi_xfer(TDC_stream,hit1,4);
146 spi_xfer(TDC_stream,fast_init,1);
147 spi_xfer(TDC_stream,1,1);
148 spi_xfer(TDC_stream,hitin2,3);
149 spi_xfer(TDC_stream,hitin1,3);
150 spi_xfer(TDC_stream,0,8);
151 output_high(TDC_ENABLE);
152 }
153  
1757 kakl 154 void TDC_update_registers()
1744 kakl 155 {
1758 kakl 156 //update reg0
1745 kakl 157 output_low(TDC_ENABLE);
1758 kakl 158 spi_xfer(TDC_stream,0x80,8);
159 spi_xfer(TDC_stream,firenum,4);
160 spi_xfer(TDC_stream,div_fire,4);
161 spi_xfer(TDC_stream,calresnum,2);
162 spi_xfer(TDC_stream,clkhsdiv,2);
163 spi_xfer(TDC_stream,start_clkhs,2);
164 spi_xfer(TDC_stream,portnum,1);
165 spi_xfer(TDC_stream,Tcycle,1);
166 spi_xfer(TDC_stream,fakenum,1);
167 spi_xfer(TDC_stream,selclkT,1);
168 spi_xfer(TDC_stream,calibrate,1);
169 spi_xfer(TDC_stream,disautocal,1);
170 spi_xfer(TDC_stream,MRange,1);
171 spi_xfer(TDC_stream,neg_stop2,1);
172 spi_xfer(TDC_stream,neg_stop1,1);
173 spi_xfer(TDC_stream,neg_start,1);
174 output_high(TDC_ENABLE);
175  
1965 kaklik 176 TDC_update_reg1(); // update reg1
1744 kakl 177  
1758 kakl 178 // update reg2
179 output_low(TDC_ENABLE);
180 spi_xfer(TDC_stream,0x82);
181 spi_xfer(TDC_stream,en_int,3);
182 spi_xfer(TDC_stream,rfedge2,1);
183 spi_xfer(TDC_stream,rfedge1,1);
184 spi_xfer(TDC_stream,delval1,19);
1745 kakl 185 output_high(TDC_ENABLE);
1744 kakl 186  
1758 kakl 187 // update reg3
1745 kakl 188 output_low(TDC_ENABLE);
1758 kakl 189 spi_xfer(TDC_stream,0x83);
190 spi_xfer(TDC_stream,0,2);
191 spi_xfer(TDC_stream,en_err_val,1);
192 spi_xfer(TDC_stream,tim0_mr2,2);
193 spi_xfer(TDC_stream,delval2,19);
1745 kakl 194 output_high(TDC_ENABLE);
1744 kakl 195  
1758 kakl 196 // update reg4
1745 kakl 197 output_low(TDC_ENABLE);
1758 kakl 198 spi_xfer(TDC_stream,0x84);
199 spi_xfer(TDC_stream,0b00100,5);
200 spi_xfer(TDC_stream,delval3,19);
1745 kakl 201 output_high(TDC_ENABLE);
1744 kakl 202  
1758 kakl 203 // update reg5
1745 kakl 204 output_low(TDC_ENABLE);
1758 kakl 205 spi_xfer(TDC_stream,0x85);
206 spi_xfer(TDC_stream,conf_fire,3);
207 spi_xfer(TDC_stream,en_startnoise,1);
208 spi_xfer(TDC_stream,dis_phasenoise,1);
209 spi_xfer(TDC_stream,repeat_fire,3);
210 spi_xfer(TDC_stream,phase_fire,16);
211 output_high(TDC_ENABLE);
1744 kakl 212 }
1757 kakl 213  
1965 kaklik 214 float TDC_mrange2_get_time(unsigned int shot)
215 {
1966 kaklik 216 unsigned int32 measurement;
217 float time;
218  
219 switch (shot)
220 {
221 case 1:
1965 kaklik 222 hit2=TDC_MRANGE2_HIT2_1CH1;
223 break;
224  
1966 kaklik 225 case 2:
1965 kaklik 226 hit2=TDC_MRANGE2_HIT2_2CH1;
227 break;
228  
1966 kaklik 229 case 3:
1965 kaklik 230 hit2=TDC_MRANGE2_HIT2_3CH1;
231 break;
1966 kaklik 232 }
233 TDC_update_reg1(); // tell to ALU which shot period must be computed
234  
235 Delay_ms(50); // wait to computing of result
236  
237 measurement=TDC_get_measurement(7&TDC_get_status()); // read computed value on pointer result register address
238  
239  
240 switch (clkhsdiv)
241 {
242 case TDC_CLKHSDIV_1:
243 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS;
244 break;
245  
246 case TDC_CLKHSDIV_2:
247 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 2.0;
248 break;
249  
250 case TDC_CLKHSDIV_4:
251 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 4.0;
252 break;
253 case TDC_CLKHSDIV_8:
254 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 8.0;
255 break;
256 }
257 return time;
1965 kaklik 258 }
1980 kaklik 259  
260 float TDC_mrange1_get_time(unsigned int channel1, unsigned int shot1, unsigned int channel2, unsigned int shot2)
261 {
262 unsigned int32 measurement;
263 float time;
264  
265 switch (shot1)
266 {
267 case 0:
268 hit1=TDC_MRANGE1_HIT1_START;
269 break;
270 case 1:
271 if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_1CH1; else hit1=TDC_MRANGE1_HIT1_1CH2;
272 break;
273  
274 case 2:
275 if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_2CH1; else hit1=TDC_MRANGE1_HIT1_2CH2;
276 break;
277  
278 case 3:
279 if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_3CH1; else hit1=TDC_MRANGE1_HIT1_3CH2;
280 break;
281  
282 case 4:
283 if (channel1 == 1) hit1=TDC_MRANGE1_HIT1_4CH1; else hit1=TDC_MRANGE1_HIT1_4CH2;
284 break;
285 }
286  
287 switch (shot2)
288 {
289 case 0:
290 hit2=TDC_MRANGE1_HIT2_START;
291 break;
292  
293 case 1:
294 if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_1CH1; else hit2=TDC_MRANGE1_HIT2_1CH2;
295 break;
296  
297 case 2:
298 if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_2CH1; else hit2=TDC_MRANGE1_HIT2_2CH2;
299 break;
300  
301 case 3:
302 if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_3CH1; else hit2=TDC_MRANGE1_HIT2_3CH2;
303 break;
304  
305 case 4:
306 if (channel2 == 1) hit2=TDC_MRANGE1_HIT2_4CH1; else hit2=TDC_MRANGE1_HIT2_4CH2;
307 break;
308 }
309  
310 TDC_update_reg1(); // tell to ALU which shot period must be computed
311  
312 Delay_ms(50); // wait to computing of result
313  
314 measurement=TDC_get_measurement(7&TDC_get_status()); // read computed value on pointer result register address
315  
316  
317 switch (clkhsdiv)
318 {
319 case TDC_CLKHSDIV_1:
320 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS;
321 break;
322  
323 case TDC_CLKHSDIV_2:
324 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 2.0;
325 break;
326  
327 case TDC_CLKHSDIV_4:
328 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 4.0;
329 break;
330 case TDC_CLKHSDIV_8:
331 time=(measurement/65536.0) * 1.0e6/TDC_CLKHS * 8.0;
332 break;
333 }
334 return time;
335 }