| Line No. | Rev | Author | Line |
|---|---|---|---|
| 1 | 6 | kaklik | <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> |
| 2 | <html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"> |
||
| 3 | <title>Procyon AVRlib: net/ax88796.c Source File</title> |
||
| 4 | <link href="dox.css" rel="stylesheet" type="text/css"> |
||
| 5 | </head><body> |
||
| 6 | <!-- Generated by Doxygen 1.4.2 --> |
||
| 7 | <div class="qindex"><a class="qindex" href="main.html">Main Page</a> | <a class="qindex" href="modules.html">Modules</a> | <a class="qindex" href="annotated.html">Data Structures</a> | <a class="qindex" href="dirs.html">Directories</a> | <a class="qindex" href="files.html">File List</a> | <a class="qindex" href="functions.html">Data Fields</a> | <a class="qindex" href="globals.html">Globals</a> | <a class="qindex" href="pages.html">Related Pages</a></div> |
||
| 8 | <div class="nav"> |
||
| 9 | <a class="el" href="dir_000001.html">net</a></div> |
||
| 10 | <h1>ax88796.c</h1><a href="ax88796_8c.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment">00001 <span class="comment">/*! \file ax88796.c \brief ASIX AX88796 Ethernet Interface Driver. */</span> |
||
| 11 | 00002 <span class="comment">//*****************************************************************************</span> |
||
| 12 | 00003 <span class="comment">//</span> |
||
| 13 | 00004 <span class="comment">// File Name : 'ax88796.c'</span> |
||
| 14 | 00005 <span class="comment">// Title : ASIX AX88796 Ethernet Interface Driver</span> |
||
| 15 | 00006 <span class="comment">// Author : Pascal Stang</span> |
||
| 16 | 00007 <span class="comment">// Created : 10/22/2002</span> |
||
| 17 | 00008 <span class="comment">// Revised : 8/21/2005</span> |
||
| 18 | 00009 <span class="comment">// Version : 0.1</span> |
||
| 19 | 00010 <span class="comment">// Target MCU : Atmel AVR series</span> |
||
| 20 | 00011 <span class="comment">// Editor Tabs : 4</span> |
||
| 21 | 00012 <span class="comment">//</span> |
||
| 22 | 00013 <span class="comment">// Description : This driver provides initialization and transmit/receive</span> |
||
| 23 | 00014 <span class="comment">// functions for the ASIX AX88796 10/100Mb Ethernet Controller and PHY.</span> |
||
| 24 | 00015 <span class="comment">//</span> |
||
| 25 | 00016 <span class="comment">// Based in part on code by Louis Beaudoin (www.embedded-creations.com).</span> |
||
| 26 | 00017 <span class="comment">// Thanks to Adam Dunkels and Louis Beaudoin for providing the initial</span> |
||
| 27 | 00018 <span class="comment">// structure in which to write this driver.</span> |
||
| 28 | 00019 <span class="comment">//</span> |
||
| 29 | 00020 <span class="comment">//*****************************************************************************</span> |
||
| 30 | 00021 |
||
| 31 | 00022 <span class="preprocessor">#include "<a class="code" href="global_8h.html">global.h</a>"</span> |
||
| 32 | 00023 <span class="preprocessor">#include "<a class="code" href="timer_8h.html">timer.h</a>"</span> |
||
| 33 | 00024 <span class="preprocessor">#include "<a class="code" href="rprintf_8h.html">rprintf.h</a>"</span> |
||
| 34 | 00025 |
||
| 35 | 00026 <span class="preprocessor">#include "<a class="code" href="ax88796_8h.html">ax88796.h</a>"</span> |
||
| 36 | 00027 |
||
| 37 | 00028 <span class="comment">// include configuration</span> |
||
| 38 | 00029 <span class="preprocessor">#include "<a class="code" href="ax88796conf_8h.html">ax88796conf.h</a>"</span> |
||
| 39 | 00030 |
||
| 40 | 00031 <span class="comment">// pointers to locations in the ax88796 receive buffer</span> |
||
| 41 | 00032 <span class="keyword">static</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> NextPage; <span class="comment">// page pointer to next Rx packet</span> |
||
| 42 | 00033 <span class="keyword">static</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> CurrentRetreiveAddress; <span class="comment">// DMA address for read Rx packet location</span> |
||
| 43 | 00034 |
||
| 44 | 00035 |
||
| 45 | <a name="l00036"></a><a class="code" href="group__nic.html#ga0">00036</a> <span class="keywordtype">void</span> <a class="code" href="group__nic.html#ga0">nicInit</a>(<span class="keywordtype">void</span>) |
||
| 46 | 00037 { |
||
| 47 | 00038 ax88796Init(); |
||
| 48 | 00039 } |
||
| 49 | 00040 |
||
| 50 | <a name="l00041"></a><a class="code" href="group__nic.html#ga1">00041</a> <span class="keywordtype">void</span> <a class="code" href="group__nic.html#ga1">nicSend</a>(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> len, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>* packet) |
||
| 51 | 00042 { |
||
| 52 | 00043 ax88796BeginPacketSend(len); |
||
| 53 | 00044 ax88796SendPacketData(packet, len); |
||
| 54 | 00045 ax88796EndPacketSend(); |
||
| 55 | 00046 } |
||
| 56 | 00047 |
||
| 57 | <a name="l00048"></a><a class="code" href="group__nic.html#ga2">00048</a> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> <a class="code" href="group__nic.html#ga2">nicPoll</a>(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> maxlen, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>* packet) |
||
| 58 | 00049 { |
||
| 59 | 00050 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> packetLength; |
||
| 60 | 00051 |
||
| 61 | 00052 packetLength = ax88796BeginPacketRetreive(); |
||
| 62 | 00053 |
||
| 63 | 00054 <span class="comment">// if there's no packet or an error - exit without ending the operation</span> |
||
| 64 | 00055 <span class="keywordflow">if</span>( !packetLength ) |
||
| 65 | 00056 <span class="keywordflow">return</span> 0; |
||
| 66 | 00057 |
||
| 67 | 00058 <span class="comment">// drop anything too big for the buffer</span> |
||
| 68 | 00059 <span class="keywordflow">if</span>( packetLength > maxlen ) |
||
| 69 | 00060 { |
||
| 70 | 00061 ax88796EndPacketRetreive(); |
||
| 71 | 00062 <span class="keywordflow">return</span> 0; |
||
| 72 | 00063 } |
||
| 73 | 00064 |
||
| 74 | 00065 <span class="comment">// copy the packet data into the uIP packet buffer</span> |
||
| 75 | 00066 ax88796RetreivePacketData( packet, packetLength ); |
||
| 76 | 00067 ax88796EndPacketRetreive(); |
||
| 77 | 00068 |
||
| 78 | 00069 <span class="keywordflow">return</span> packetLength; |
||
| 79 | 00070 } |
||
| 80 | 00071 |
||
| 81 | 00072 <span class="keywordtype">void</span> nicGetMacAddress(u08* macaddr) |
||
| 82 | 00073 { |
||
| 83 | 00074 u08 tempCR; |
||
| 84 | 00075 <span class="comment">// switch register pages</span> |
||
| 85 | 00076 tempCR = ax88796Read(CR); |
||
| 86 | 00077 ax88796Write(CR,tempCR|PS0); |
||
| 87 | 00078 <span class="comment">// read MAC address registers</span> |
||
| 88 | 00079 *macaddr++ = ax88796Read(PAR0); |
||
| 89 | 00080 *macaddr++ = ax88796Read(PAR1); |
||
| 90 | 00081 *macaddr++ = ax88796Read(PAR2); |
||
| 91 | 00082 *macaddr++ = ax88796Read(PAR3); |
||
| 92 | 00083 *macaddr++ = ax88796Read(PAR4); |
||
| 93 | 00084 *macaddr++ = ax88796Read(PAR5); |
||
| 94 | 00085 <span class="comment">// switch register pages back</span> |
||
| 95 | 00086 ax88796Write(CR,tempCR); |
||
| 96 | 00087 } |
||
| 97 | 00088 |
||
| 98 | 00089 <span class="keywordtype">void</span> nicSetMacAddress(u08* macaddr) |
||
| 99 | 00090 { |
||
| 100 | 00091 u08 tempCR; |
||
| 101 | 00092 <span class="comment">// switch register pages</span> |
||
| 102 | 00093 tempCR = ax88796Read(CR); |
||
| 103 | 00094 ax88796Write(CR,tempCR|PS0); |
||
| 104 | 00095 <span class="comment">// write MAC address registers</span> |
||
| 105 | 00096 ax88796Write(PAR0, *macaddr++); |
||
| 106 | 00097 ax88796Write(PAR1, *macaddr++); |
||
| 107 | 00098 ax88796Write(PAR2, *macaddr++); |
||
| 108 | 00099 ax88796Write(PAR3, *macaddr++); |
||
| 109 | 00100 ax88796Write(PAR4, *macaddr++); |
||
| 110 | 00101 ax88796Write(PAR5, *macaddr++); |
||
| 111 | 00102 <span class="comment">// switch register pages back</span> |
||
| 112 | 00103 ax88796Write(CR,tempCR); |
||
| 113 | 00104 } |
||
| 114 | 00105 |
||
| 115 | <a name="l00106"></a><a class="code" href="group__nic.html#ga5">00106</a> <span class="keywordtype">void</span> <a class="code" href="group__nic.html#ga5">nicRegDump</a>(<span class="keywordtype">void</span>) |
||
| 116 | 00107 { |
||
| 117 | 00108 ax88796RegDump(); |
||
| 118 | 00109 } |
||
| 119 | 00110 |
||
| 120 | 00111 |
||
| 121 | 00112 <span class="keywordtype">void</span> ax88796SetupPorts(<span class="keywordtype">void</span>) |
||
| 122 | 00113 { |
||
| 123 | 00114 <span class="preprocessor">#if NIC_CONNECTION == MEMORY_MAPPED</span> |
||
| 124 | 00115 <span class="preprocessor"></span> <span class="comment">// enable external SRAM interface - no wait states</span> |
||
| 125 | 00116 sbi(MCUCR, SRE); |
||
| 126 | 00117 <span class="comment">// sbi(MCUCR, SRW10);</span> |
||
| 127 | 00118 <span class="comment">// sbi(XMCRA, SRW00);</span> |
||
| 128 | 00119 <span class="comment">// sbi(XMCRA, SRW01);</span> |
||
| 129 | 00120 <span class="comment">// sbi(XMCRA, SRW11);</span> |
||
| 130 | 00121 <span class="preprocessor">#else</span> |
||
| 131 | 00122 <span class="preprocessor"></span> <span class="comment">// set address port to output</span> |
||
| 132 | 00123 AX88796_ADDRESS_DDR = AX88796_ADDRESS_MASK; |
||
| 133 | 00124 |
||
| 134 | 00125 <span class="comment">// set data port to input with pull-ups</span> |
||
| 135 | 00126 AX88796_DATA_DDR = 0x00; |
||
| 136 | 00127 AX88796_DATA_PORT = 0xFF; |
||
| 137 | 00128 |
||
| 138 | 00129 <span class="comment">// initialize the control port read and write pins to de-asserted</span> |
||
| 139 | 00130 sbi( AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN ); |
||
| 140 | 00131 sbi( AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN ); |
||
| 141 | 00132 <span class="comment">// set the read and write pins to output</span> |
||
| 142 | 00133 sbi( AX88796_CONTROL_DDR, AX88796_CONTROL_READPIN ); |
||
| 143 | 00134 sbi( AX88796_CONTROL_DDR, AX88796_CONTROL_WRITEPIN ); |
||
| 144 | 00135 <span class="preprocessor">#endif</span> |
||
| 145 | 00136 <span class="preprocessor"></span> <span class="comment">// set reset pin to output</span> |
||
| 146 | 00137 sbi( AX88796_RESET_DDR, AX88796_RESET_PIN ); |
||
| 147 | 00138 } |
||
| 148 | 00139 |
||
| 149 | 00140 |
||
| 150 | 00141 <span class="preprocessor">#if NIC_CONNECTION == MEMORY_MAPPED</span> |
||
| 151 | 00142 <span class="preprocessor"></span><span class="keyword">inline</span> <span class="keywordtype">void</span> ax88796Write(u08 address, u08 data) |
||
| 152 | 00143 { |
||
| 153 | 00144 *(<span class="keyword">volatile</span> u08*)(AX88796_MEMORY_MAPPED_OFFSET + address) = data; |
||
| 154 | 00145 } |
||
| 155 | 00146 <span class="preprocessor">#else</span> |
||
| 156 | 00147 <span class="preprocessor"></span><span class="keywordtype">void</span> ax88796Write(u08 address, u08 data) |
||
| 157 | 00148 { |
||
| 158 | 00149 <span class="comment">// assert the address</span> |
||
| 159 | 00150 AX88796_ADDRESS_PORT = address | (AX88796_ADDRESS_PORT&~AX88796_ADDRESS_MASK); |
||
| 160 | 00151 |
||
| 161 | 00152 <span class="comment">// set data bus as output and place data on bus</span> |
||
| 162 | 00153 AX88796_DATA_DDR = 0xFF; |
||
| 163 | 00154 AX88796_DATA_PORT = data; |
||
| 164 | 00155 |
||
| 165 | 00156 <span class="comment">// clock write pin</span> |
||
| 166 | 00157 cbi(AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN); |
||
| 167 | 00158 nop(); |
||
| 168 | 00159 nop(); |
||
| 169 | 00160 sbi(AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN); |
||
| 170 | 00161 |
||
| 171 | 00162 <span class="comment">// set data bus back to input with pullups enabled</span> |
||
| 172 | 00163 AX88796_DATA_DDR = 0x00; |
||
| 173 | 00164 AX88796_DATA_PORT = 0xFF; |
||
| 174 | 00165 } |
||
| 175 | 00166 <span class="preprocessor">#endif</span> |
||
| 176 | 00167 <span class="preprocessor"></span> |
||
| 177 | 00168 |
||
| 178 | 00169 <span class="preprocessor">#if NIC_CONNECTION == MEMORY_MAPPED</span> |
||
| 179 | 00170 <span class="preprocessor"></span><span class="keyword">inline</span> u08 ax88796Read(u08 address) |
||
| 180 | 00171 { |
||
| 181 | 00172 <span class="keywordflow">return</span> *(<span class="keyword">volatile</span> u08*)(AX88796_MEMORY_MAPPED_OFFSET + address); |
||
| 182 | 00173 } |
||
| 183 | 00174 <span class="preprocessor">#else</span> |
||
| 184 | 00175 <span class="preprocessor"></span>u08 ax88796Read(u08 address) |
||
| 185 | 00176 { |
||
| 186 | 00177 u08 data; |
||
| 187 | 00178 |
||
| 188 | 00179 <span class="comment">// assert the address</span> |
||
| 189 | 00180 AX88796_ADDRESS_PORT = address | (AX88796_ADDRESS_PORT&~AX88796_ADDRESS_MASK); |
||
| 190 | 00181 |
||
| 191 | 00182 <span class="comment">// assert read</span> |
||
| 192 | 00183 cbi(AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN); |
||
| 193 | 00184 nop(); |
||
| 194 | 00185 nop(); |
||
| 195 | 00186 <span class="comment">// read in the data</span> |
||
| 196 | 00187 data = AX88796_DATA_PIN; |
||
| 197 | 00188 |
||
| 198 | 00189 <span class="comment">// negate read</span> |
||
| 199 | 00190 sbi(AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN); |
||
| 200 | 00191 |
||
| 201 | 00192 <span class="keywordflow">return</span> data; |
||
| 202 | 00193 } |
||
| 203 | 00194 <span class="preprocessor">#endif </span> |
||
| 204 | 00195 <span class="preprocessor"></span> |
||
| 205 | 00196 |
||
| 206 | 00197 <span class="keywordtype">void</span> ax88796Init(<span class="keywordtype">void</span>) |
||
| 207 | 00198 { |
||
| 208 | 00199 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> tcrFduFlag; |
||
| 209 | 00200 |
||
| 210 | 00201 <span class="comment">// initialize I/O ports</span> |
||
| 211 | 00202 ax88796SetupPorts(); |
||
| 212 | 00203 |
||
| 213 | 00204 <span class="comment">// do a hard reset</span> |
||
| 214 | 00205 sbi(AX88796_RESET_PORT, AX88796_RESET_PIN); |
||
| 215 | 00206 delay_ms(100); |
||
| 216 | 00207 cbi(AX88796_RESET_PORT, AX88796_RESET_PIN); |
||
| 217 | 00208 |
||
| 218 | 00209 <span class="comment">// do soft reset</span> |
||
| 219 | 00210 ax88796Write(ISR, ax88796Read(ISR)); |
||
| 220 | 00211 delay_ms(50); |
||
| 221 | 00212 |
||
| 222 | 00213 <span class="comment">// wait for PHY to come out of reset</span> |
||
| 223 | 00214 ax88796Read(RSTPORT); |
||
| 224 | 00215 <span class="keywordflow">while</span>(ax88796Read(TR) & RST_B); |
||
| 225 | 00216 |
||
| 226 | 00217 ax88796WriteMii(0x10,0x00,0x0800); |
||
| 227 | 00218 delay_ms(255); |
||
| 228 | 00219 ax88796WriteMii(0x10,0x00,0x1200); |
||
| 229 | 00220 |
||
| 230 | 00221 ax88796Write(CR,(RD2|STOP)); <span class="comment">// stop the NIC, abort DMA, page 0</span> |
||
| 231 | 00222 delay_ms(5); <span class="comment">// make sure nothing is coming in or going out</span> |
||
| 232 | 00223 ax88796Write(DCR,DCR_INIT); |
||
| 233 | 00224 ax88796Write(RBCR0,0x00); |
||
| 234 | 00225 ax88796Write(RBCR1,0x00); |
||
| 235 | 00226 ax88796Write(IMR,0x00); |
||
| 236 | 00227 ax88796Write(ISR,0xFF); |
||
| 237 | 00228 ax88796Write(RCR,0x20); |
||
| 238 | 00229 ax88796Write(BNRY,RXSTART_INIT); |
||
| 239 | 00230 ax88796Write(PSTART,RXSTART_INIT); |
||
| 240 | 00231 ax88796Write(PSTOP,RXSTOP_INIT); |
||
| 241 | 00232 |
||
| 242 | 00233 <span class="comment">// switch to page 1</span> |
||
| 243 | 00234 ax88796Write(CR,(PS0|RD2|STOP)); |
||
| 244 | 00235 <span class="comment">// write mac address</span> |
||
| 245 | 00236 ax88796Write(PAR0+0, AX88796_MAC0); |
||
| 246 | 00237 ax88796Write(PAR0+1, AX88796_MAC1); |
||
| 247 | 00238 ax88796Write(PAR0+2, AX88796_MAC2); |
||
| 248 | 00239 ax88796Write(PAR0+3, AX88796_MAC3); |
||
| 249 | 00240 ax88796Write(PAR0+4, AX88796_MAC4); |
||
| 250 | 00241 ax88796Write(PAR0+5, AX88796_MAC5); |
||
| 251 | 00242 <span class="comment">// set start point</span> |
||
| 252 | 00243 ax88796Write(CURR,RXSTART_INIT+1); |
||
| 253 | 00244 |
||
| 254 | 00245 ax88796Write(CR,(RD2|START)); |
||
| 255 | 00246 ax88796Write(RCR,RCR_INIT); |
||
| 256 | 00247 |
||
| 257 | 00248 <span class="keywordflow">if</span>(ax88796Read(GPI) & I_SPD) <span class="comment">// check PHY speed setting</span> |
||
| 258 | 00249 tcrFduFlag = FDU; <span class="comment">// if 100base, do full duplex</span> |
||
| 259 | 00250 <span class="keywordflow">else</span> |
||
| 260 | 00251 tcrFduFlag = 0; <span class="comment">// if 10base, do half duplex</span> |
||
| 261 | 00252 |
||
| 262 | 00253 ax88796Write(TCR,(tcrFduFlag|TCR_INIT)); |
||
| 263 | 00254 |
||
| 264 | 00255 ax88796Write(GPOC,MPSEL); <span class="comment">// select media interface</span> |
||
| 265 | 00256 |
||
| 266 | 00257 ax88796Write(TPSR,TXSTART_INIT); |
||
| 267 | 00258 |
||
| 268 | 00259 ax88796Write(CR,(RD2|STOP)); |
||
| 269 | 00260 ax88796Write(DCR,DCR_INIT); |
||
| 270 | 00261 ax88796Write(CR,(RD2|START)); |
||
| 271 | 00262 ax88796Write(ISR,0xFF); |
||
| 272 | 00263 ax88796Write(IMR,IMR_INIT); |
||
| 273 | 00264 ax88796Write(TCR,(tcrFduFlag|TCR_INIT)); |
||
| 274 | 00265 |
||
| 275 | 00266 <span class="comment">//test</span> |
||
| 276 | 00267 <span class="comment">/*</span> |
||
| 277 | 00268 <span class="comment"> while(1)</span> |
||
| 278 | 00269 <span class="comment"> {</span> |
||
| 279 | 00270 <span class="comment"> vt100SetCursorPos(18,0);</span> |
||
| 280 | 00271 <span class="comment"> ax88796RegDump();</span> |
||
| 281 | 00272 <span class="comment"> }</span> |
||
| 282 | 00273 <span class="comment">*/</span> |
||
| 283 | 00274 } |
||
| 284 | 00275 |
||
| 285 | 00276 |
||
| 286 | 00277 <span class="keywordtype">void</span> ax88796BeginPacketSend(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> packetLength) |
||
| 287 | 00278 { |
||
| 288 | 00279 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> sendPacketLength; |
||
| 289 | 00280 sendPacketLength = (packetLength>=ETHERNET_MIN_PACKET_LENGTH)? |
||
| 290 | 00281 (packetLength):(ETHERNET_MIN_PACKET_LENGTH); |
||
| 291 | 00282 |
||
| 292 | 00283 <span class="comment">//start the NIC</span> |
||
| 293 | 00284 ax88796Write(CR,(RD2|START)); |
||
| 294 | 00285 |
||
| 295 | 00286 <span class="comment">// still transmitting a packet - wait for it to finish</span> |
||
| 296 | 00287 <span class="keywordflow">while</span>( ax88796Read(CR) & TXP ); |
||
| 297 | 00288 |
||
| 298 | 00289 <span class="comment">//load beginning page for transmit buffer</span> |
||
| 299 | 00290 ax88796Write(TPSR,TXSTART_INIT); |
||
| 300 | 00291 |
||
| 301 | 00292 <span class="comment">//set start address for remote DMA operation</span> |
||
| 302 | 00293 ax88796Write(RSAR0,0x00); |
||
| 303 | 00294 ax88796Write(RSAR1,0x40); |
||
| 304 | 00295 |
||
| 305 | 00296 <span class="comment">//clear the packet stored interrupt</span> |
||
| 306 | 00297 ax88796Write(ISR, PTX); |
||
| 307 | 00298 |
||
| 308 | 00299 <span class="comment">//load data byte count for remote DMA</span> |
||
| 309 | 00300 ax88796Write(RBCR0, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(packetLength)); |
||
| 310 | 00301 ax88796Write(RBCR1, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(packetLength>>8)); |
||
| 311 | 00302 |
||
| 312 | 00303 ax88796Write(TBCR0, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(sendPacketLength)); |
||
| 313 | 00304 ax88796Write(TBCR1, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)((sendPacketLength)>>8)); |
||
| 314 | 00305 |
||
| 315 | 00306 <span class="comment">//do remote write operation</span> |
||
| 316 | 00307 ax88796Write(CR,0x12); |
||
| 317 | 00308 } |
||
| 318 | 00309 |
||
| 319 | 00310 |
||
| 320 | 00311 <span class="keywordtype">void</span> ax88796SendPacketData(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> * localBuffer, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> length) |
||
| 321 | 00312 { |
||
| 322 | 00313 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> i; |
||
| 323 | 00314 |
||
| 324 | 00315 <span class="keywordflow">for</span>(i=0;i<length;i++) |
||
| 325 | 00316 ax88796Write(RDMAPORT, localBuffer[i]); |
||
| 326 | 00317 } |
||
| 327 | 00318 |
||
| 328 | 00319 |
||
| 329 | 00320 <span class="keywordtype">void</span> ax88796EndPacketSend(<span class="keywordtype">void</span>) |
||
| 330 | 00321 { |
||
| 331 | 00322 <span class="comment">//send the contents of the transmit buffer onto the network</span> |
||
| 332 | 00323 ax88796Write(CR,(RD2|TXP)); |
||
| 333 | 00324 |
||
| 334 | 00325 <span class="comment">// clear the remote DMA interrupt</span> |
||
| 335 | 00326 ax88796Write(ISR, RDC); |
||
| 336 | 00327 } |
||
| 337 | 00328 |
||
| 338 | 00329 |
||
| 339 | 00330 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> ax88796BeginPacketRetreive(<span class="keywordtype">void</span>) |
||
| 340 | 00331 { |
||
| 341 | 00332 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> writePagePtr; |
||
| 342 | 00333 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> readPagePtr; |
||
| 343 | 00334 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> bnryPagePtr; |
||
| 344 | 00335 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> i; |
||
| 345 | 00336 |
||
| 346 | 00337 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> pageheader[4]; |
||
| 347 | 00338 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> rxlen; |
||
| 348 | 00339 |
||
| 349 | 00340 <span class="comment">// check for and handle an overflow</span> |
||
| 350 | 00341 ax88796ProcessInterrupt(); |
||
| 351 | 00342 |
||
| 352 | 00343 <span class="comment">// read CURR from page 1</span> |
||
| 353 | 00344 ax88796Write(CR,(PS0|RD2|START)); |
||
| 354 | 00345 writePagePtr = ax88796Read(CURR); |
||
| 355 | 00346 <span class="comment">// read the boundary register from page 0</span> |
||
| 356 | 00347 ax88796Write(CR,(RD2|START)); |
||
| 357 | 00348 bnryPagePtr = ax88796Read(BNRY); |
||
| 358 | 00349 |
||
| 359 | 00350 <span class="comment">// first packet is at page bnryPtr+1</span> |
||
| 360 | 00351 readPagePtr = bnryPagePtr+1; |
||
| 361 | 00352 <span class="keywordflow">if</span>(readPagePtr >= RXSTOP_INIT) readPagePtr = RXSTART_INIT; |
||
| 362 | 00353 |
||
| 363 | 00354 <span class="comment">// return if there is no packet in the buffer</span> |
||
| 364 | 00355 <span class="keywordflow">if</span>( readPagePtr == writePagePtr ) |
||
| 365 | 00356 { |
||
| 366 | 00357 <span class="keywordflow">return</span> 0; |
||
| 367 | 00358 } |
||
| 368 | 00359 |
||
| 369 | 00360 <span class="comment">// clear the packet received interrupt flag</span> |
||
| 370 | 00361 ax88796Write(ISR, PRX); |
||
| 371 | 00362 |
||
| 372 | 00363 <span class="comment">// if the boundary pointer is invalid,</span> |
||
| 373 | 00364 <span class="comment">// reset the contents of the buffer and exit</span> |
||
| 374 | 00365 <span class="keywordflow">if</span>( (bnryPagePtr < RXSTART_INIT) || (bnryPagePtr >= RXSTOP_INIT) ) |
||
| 375 | 00366 { |
||
| 376 | 00367 ax88796Write(BNRY, RXSTART_INIT); |
||
| 377 | 00368 ax88796Write(CR, (PS0|RD2|START)); |
||
| 378 | 00369 ax88796Write(CURR, RXSTART_INIT+1); |
||
| 379 | 00370 ax88796Write(CR, (RD2|START)); |
||
| 380 | 00371 |
||
| 381 | 00372 <span class="comment">// rprintf("B");</span> |
||
| 382 | 00373 <span class="keywordflow">return</span> 0; |
||
| 383 | 00374 } |
||
| 384 | 00375 |
||
| 385 | 00376 <span class="comment">// initiate DMA to transfer the RTL8019 packet header</span> |
||
| 386 | 00377 ax88796Write(RBCR0, 4); |
||
| 387 | 00378 ax88796Write(RBCR1, 0); |
||
| 388 | 00379 ax88796Write(RSAR0, 0); |
||
| 389 | 00380 ax88796Write(RSAR1, readPagePtr); |
||
| 390 | 00381 ax88796Write(CR, (RD0|START)); |
||
| 391 | 00382 <span class="keywordflow">for</span>(i=0;i<4;i++) |
||
| 392 | 00383 pageheader[i] = ax88796Read(RDMAPORT); |
||
| 393 | 00384 |
||
| 394 | 00385 <span class="comment">// end the DMA operation</span> |
||
| 395 | 00386 ax88796Write(CR, (RD2|START)); |
||
| 396 | 00387 <span class="keywordflow">for</span>(i = 0; i <= 20; i++) |
||
| 397 | 00388 <span class="keywordflow">if</span>(ax88796Read(ISR) & RDC) |
||
| 398 | 00389 <span class="keywordflow">break</span>; |
||
| 399 | 00390 ax88796Write(ISR, RDC); |
||
| 400 | 00391 |
||
| 401 | 00392 rxlen = (pageheader[PKTHEADER_PKTLENH]<<8) + pageheader[PKTHEADER_PKTLENL]; |
||
| 402 | 00393 NextPage = pageheader[PKTHEADER_NEXTPAGE]; |
||
| 403 | 00394 |
||
| 404 | 00395 CurrentRetreiveAddress = (readPagePtr<<8) + 4; |
||
| 405 | 00396 |
||
| 406 | 00397 <span class="comment">// if the NextPage pointer is invalid, the packet is not ready yet - exit</span> |
||
| 407 | 00398 <span class="keywordflow">if</span>( (NextPage >= RXSTOP_INIT) || (NextPage < RXSTART_INIT) ) |
||
| 408 | 00399 { |
||
| 409 | 00400 <span class="comment">// rprintf("N");</span> |
||
| 410 | 00401 <span class="comment">// rprintfu08(nextPage);</span> |
||
| 411 | 00402 <span class="keywordflow">return</span> 0; |
||
| 412 | 00403 } |
||
| 413 | 00404 |
||
| 414 | 00405 <span class="keywordflow">return</span> rxlen-4; |
||
| 415 | 00406 } |
||
| 416 | 00407 |
||
| 417 | 00408 |
||
| 418 | 00409 <span class="keywordtype">void</span> ax88796RetreivePacketData(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> * localBuffer, <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> length) |
||
| 419 | 00410 { |
||
| 420 | 00411 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> i; |
||
| 421 | 00412 |
||
| 422 | 00413 <span class="comment">// initiate DMA to transfer the data</span> |
||
| 423 | 00414 ax88796Write(RBCR0, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)length); |
||
| 424 | 00415 ax88796Write(RBCR1, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(length>>8)); |
||
| 425 | 00416 ax88796Write(RSAR0, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)CurrentRetreiveAddress); |
||
| 426 | 00417 ax88796Write(RSAR1, (<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>)(CurrentRetreiveAddress>>8)); |
||
| 427 | 00418 ax88796Write(CR, (RD0|START)); |
||
| 428 | 00419 <span class="keywordflow">for</span>(i=0;i<length;i++) |
||
| 429 | 00420 localBuffer[i] = ax88796Read(RDMAPORT); |
||
| 430 | 00421 |
||
| 431 | 00422 <span class="comment">// end the DMA operation</span> |
||
| 432 | 00423 ax88796Write(CR, (RD2|START)); |
||
| 433 | 00424 <span class="keywordflow">for</span>(i = 0; i <= 20; i++) |
||
| 434 | 00425 <span class="keywordflow">if</span>(ax88796Read(ISR) & RDC) |
||
| 435 | 00426 <span class="keywordflow">break</span>; |
||
| 436 | 00427 ax88796Write(ISR, RDC); |
||
| 437 | 00428 |
||
| 438 | 00429 CurrentRetreiveAddress += length; |
||
| 439 | 00430 <span class="keywordflow">if</span>( CurrentRetreiveAddress >= 0x6000 ) |
||
| 440 | 00431 CurrentRetreiveAddress -= (0x6000-0x4600) ; |
||
| 441 | 00432 } |
||
| 442 | 00433 |
||
| 443 | 00434 |
||
| 444 | 00435 <span class="keywordtype">void</span> ax88796EndPacketRetreive(<span class="keywordtype">void</span>) |
||
| 445 | 00436 { |
||
| 446 | 00437 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> i; |
||
| 447 | 00438 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> bnryPagePtr; |
||
| 448 | 00439 |
||
| 449 | 00440 <span class="comment">// end the DMA operation</span> |
||
| 450 | 00441 ax88796Write(CR, (RD2|START)); |
||
| 451 | 00442 <span class="keywordflow">for</span>(i = 0; i <= 20; i++) |
||
| 452 | 00443 <span class="keywordflow">if</span>(ax88796Read(ISR) & RDC) |
||
| 453 | 00444 <span class="keywordflow">break</span>; |
||
| 454 | 00445 ax88796Write(ISR, RDC); |
||
| 455 | 00446 |
||
| 456 | 00447 <span class="comment">// set the boundary register to point</span> |
||
| 457 | 00448 <span class="comment">// to the start of the next packet-1</span> |
||
| 458 | 00449 bnryPagePtr = NextPage-1; |
||
| 459 | 00450 <span class="keywordflow">if</span>(bnryPagePtr < RXSTART_INIT) bnryPagePtr = RXSTOP_INIT-1; |
||
| 460 | 00451 |
||
| 461 | 00452 ax88796Write(BNRY, bnryPagePtr); |
||
| 462 | 00453 } |
||
| 463 | 00454 |
||
| 464 | 00455 |
||
| 465 | 00456 <span class="keywordtype">void</span> ax88796ProcessInterrupt(<span class="keywordtype">void</span>) |
||
| 466 | 00457 { |
||
| 467 | 00458 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> intr = ax88796Read(ISR); |
||
| 468 | 00459 |
||
| 469 | 00460 <span class="comment">// check for receive overflow</span> |
||
| 470 | 00461 <span class="keywordflow">if</span>( intr & OVW ) |
||
| 471 | 00462 ax88796ReceiveOverflowRecover(); |
||
| 472 | 00463 } |
||
| 473 | 00464 |
||
| 474 | 00465 |
||
| 475 | 00466 <span class="keywordtype">void</span> ax88796ReceiveOverflowRecover(<span class="keywordtype">void</span>) |
||
| 476 | 00467 { |
||
| 477 | 00468 <span class="comment">// receive buffer overflow handling procedure</span> |
||
| 478 | 00469 <span class="comment">// as specified in the AX88796 datasheet</span> |
||
| 479 | 00470 |
||
| 480 | 00471 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> cmdReg; |
||
| 481 | 00472 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> resend=0; |
||
| 482 | 00473 |
||
| 483 | 00474 <span class="comment">// check if we were transmitting something</span> |
||
| 484 | 00475 cmdReg = ax88796Read(CR); |
||
| 485 | 00476 <span class="comment">// stop the interface</span> |
||
| 486 | 00477 ax88796Write(CR, (RD2|STOP)); |
||
| 487 | 00478 <span class="comment">// wait for timeout</span> |
||
| 488 | 00479 delay_ms(2); |
||
| 489 | 00480 <span class="comment">// clear remote byte count registers</span> |
||
| 490 | 00481 ax88796Write(RBCR0, 0x00); |
||
| 491 | 00482 ax88796Write(RBCR1, 0x00); |
||
| 492 | 00483 |
||
| 493 | 00484 <span class="comment">// if we were transmitting something</span> |
||
| 494 | 00485 <span class="keywordflow">if</span>(cmdReg & TXP) |
||
| 495 | 00486 { |
||
| 496 | 00487 <span class="comment">// check if the transmit completed</span> |
||
| 497 | 00488 cmdReg = ax88796Read(ISR); |
||
| 498 | 00489 <span class="keywordflow">if</span>((cmdReg & PTX) || (cmdReg & TXE)) |
||
| 499 | 00490 resend = 0; <span class="comment">// transmit completed</span> |
||
| 500 | 00491 <span class="keywordflow">else</span> |
||
| 501 | 00492 resend = 1; <span class="comment">// transmit was interrupted, must resend</span> |
||
| 502 | 00493 } |
||
| 503 | 00494 <span class="comment">// switch to loopback mode</span> |
||
| 504 | 00495 ax88796Write(TCR, LB0); |
||
| 505 | 00496 <span class="comment">// start the interface</span> |
||
| 506 | 00497 ax88796Write(CR, (RD2|START)); |
||
| 507 | 00498 <span class="comment">// set boundary</span> |
||
| 508 | 00499 ax88796Write(BNRY, RXSTART_INIT); |
||
| 509 | 00500 <span class="comment">// go to page 1</span> |
||
| 510 | 00501 ax88796Write(CR, (PS0|RD2|START)); |
||
| 511 | 00502 <span class="comment">// set current page register</span> |
||
| 512 | 00503 ax88796Write(CPR, RXSTART_INIT+1); |
||
| 513 | 00504 <span class="comment">// go to page 0</span> |
||
| 514 | 00505 ax88796Write(CR, (RD2|START)); |
||
| 515 | 00506 <span class="comment">// clear the overflow int</span> |
||
| 516 | 00507 ax88796Write(ISR, OVW); |
||
| 517 | 00508 <span class="comment">// switch to normal (non-loopback mode)</span> |
||
| 518 | 00509 ax88796Write(TCR, TCR_INIT); |
||
| 519 | 00510 |
||
| 520 | 00511 <span class="comment">// if previous transmit was interrupted, then resend</span> |
||
| 521 | 00512 <span class="keywordflow">if</span>(resend) |
||
| 522 | 00513 ax88796Write(CR, (RD2|TXP|START)); |
||
| 523 | 00514 |
||
| 524 | 00515 <span class="comment">// recovery completed</span> |
||
| 525 | 00516 } |
||
| 526 | 00517 |
||
| 527 | 00518 |
||
| 528 | 00519 <span class="preprocessor">#define set_mdc ax88796Write(MEMR,ax88796Read(MEMR)|0x01);</span> |
||
| 529 | 00520 <span class="preprocessor"></span><span class="preprocessor">#define clr_mdc ax88796Write(MEMR,ax88796Read(MEMR)&0xFE);</span> |
||
| 530 | 00521 <span class="preprocessor"></span> |
||
| 531 | 00522 <span class="preprocessor">#define mii_clk set_mdc; clr_mdc; </span> |
||
| 532 | 00523 <span class="preprocessor"></span> |
||
| 533 | 00524 <span class="preprocessor">#define set_mdir ax88796Write(MEMR,ax88796Read(MEMR)|0x02);</span> |
||
| 534 | 00525 <span class="preprocessor"></span><span class="preprocessor">#define clr_mdir ax88796Write(MEMR,ax88796Read(MEMR)&0xFD);</span> |
||
| 535 | 00526 <span class="preprocessor"></span> |
||
| 536 | 00527 <span class="preprocessor">#define set_mdo ax88796Write(MEMR,ax88796Read(MEMR)|0x08)</span> |
||
| 537 | 00528 <span class="preprocessor"></span><span class="preprocessor">#define clr_mdo ax88796Write(MEMR,ax88796Read(MEMR)&0xF7)</span> |
||
| 538 | 00529 <span class="preprocessor"></span> |
||
| 539 | 00530 <span class="preprocessor">#define mii_write clr_mdo; mii_clk; \</span> |
||
| 540 | 00531 <span class="preprocessor"> set_mdo; mii_clk; \</span> |
||
| 541 | 00532 <span class="preprocessor"> clr_mdo; mii_clk; \</span> |
||
| 542 | 00533 <span class="preprocessor"> set_mdo; mii_clk;</span> |
||
| 543 | 00534 <span class="preprocessor"></span> |
||
| 544 | 00535 <span class="preprocessor">#define mii_read clr_mdo; mii_clk; \</span> |
||
| 545 | 00536 <span class="preprocessor"> set_mdo; mii_clk; \</span> |
||
| 546 | 00537 <span class="preprocessor"> set_mdo; mii_clk; \</span> |
||
| 547 | 00538 <span class="preprocessor"> clr_mdo; mii_clk;</span> |
||
| 548 | 00539 <span class="preprocessor"></span> |
||
| 549 | 00540 <span class="preprocessor">#define mii_r_ta mii_clk; \</span> |
||
| 550 | 00541 <span class="preprocessor"></span> |
||
| 551 | 00542 <span class="preprocessor"></span><span class="preprocessor">#define mii_w_ta set_mdo; mii_clk; \</span> |
||
| 552 | 00543 <span class="preprocessor"> clr_mdo; mii_clk;</span> |
||
| 553 | 00544 <span class="preprocessor"></span> |
||
| 554 | 00545 <span class="keywordtype">void</span> ax88796WriteMii(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> phyad,<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> regad,<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> mii_data) |
||
| 555 | 00546 { |
||
| 556 | 00547 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> mask8; |
||
| 557 | 00548 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> i,mask16; |
||
| 558 | 00549 |
||
| 559 | 00550 mii_write; |
||
| 560 | 00551 |
||
| 561 | 00552 mask8 = 0x10; |
||
| 562 | 00553 <span class="keywordflow">for</span>(i=0;i<5;++i) |
||
| 563 | 00554 { |
||
| 564 | 00555 <span class="keywordflow">if</span>(mask8 & phyad) |
||
| 565 | 00556 set_mdo; |
||
| 566 | 00557 <span class="keywordflow">else</span> |
||
| 567 | 00558 clr_mdo; |
||
| 568 | 00559 mii_clk; |
||
| 569 | 00560 mask8 >>= 1; |
||
| 570 | 00561 } |
||
| 571 | 00562 mask8 = 0x10; |
||
| 572 | 00563 <span class="keywordflow">for</span>(i=0;i<5;++i) |
||
| 573 | 00564 { |
||
| 574 | 00565 <span class="keywordflow">if</span>(mask8 & regad) |
||
| 575 | 00566 set_mdo; |
||
| 576 | 00567 <span class="keywordflow">else</span> |
||
| 577 | 00568 clr_mdo; |
||
| 578 | 00569 mii_clk; |
||
| 579 | 00570 mask8 >>= 1; |
||
| 580 | 00571 } |
||
| 581 | 00572 mii_w_ta; |
||
| 582 | 00573 |
||
| 583 | 00574 mask16 = 0x8000; |
||
| 584 | 00575 <span class="keywordflow">for</span>(i=0;i<16;++i) |
||
| 585 | 00576 { |
||
| 586 | 00577 <span class="keywordflow">if</span>(mask16 & mii_data) |
||
| 587 | 00578 set_mdo; |
||
| 588 | 00579 <span class="keywordflow">else</span> |
||
| 589 | 00580 clr_mdo; |
||
| 590 | 00581 mii_clk; |
||
| 591 | 00582 mask16 >>= 1; |
||
| 592 | 00583 } |
||
| 593 | 00584 } |
||
| 594 | 00585 |
||
| 595 | 00586 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> ax88796ReadMii(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> phyad,<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> regad) |
||
| 596 | 00587 { |
||
| 597 | 00588 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> mask8,i; |
||
| 598 | 00589 <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> mask16,result16; |
||
| 599 | 00590 |
||
| 600 | 00591 mii_read; |
||
| 601 | 00592 |
||
| 602 | 00593 mask8 = 0x10; |
||
| 603 | 00594 <span class="keywordflow">for</span>(i=0;i<5;++i) |
||
| 604 | 00595 { |
||
| 605 | 00596 <span class="keywordflow">if</span>(mask8 & phyad) |
||
| 606 | 00597 set_mdo; |
||
| 607 | 00598 <span class="keywordflow">else</span> |
||
| 608 | 00599 clr_mdo; |
||
| 609 | 00600 mii_clk; |
||
| 610 | 00601 mask8 >>= 1; |
||
| 611 | 00602 } |
||
| 612 | 00603 mask8 = 0x10; |
||
| 613 | 00604 <span class="keywordflow">for</span>(i=0;i<5;++i) |
||
| 614 | 00605 { |
||
| 615 | 00606 <span class="keywordflow">if</span>(mask8 & regad) |
||
| 616 | 00607 set_mdo; |
||
| 617 | 00608 <span class="keywordflow">else</span> |
||
| 618 | 00609 clr_mdo; |
||
| 619 | 00610 mii_clk; |
||
| 620 | 00611 mask8 >>= 1; |
||
| 621 | 00612 } |
||
| 622 | 00613 |
||
| 623 | 00614 mii_r_ta; |
||
| 624 | 00615 |
||
| 625 | 00616 mask16 = 0x8000; |
||
| 626 | 00617 result16 = 0x0000; |
||
| 627 | 00618 <span class="keywordflow">for</span>(i=0;i<16;++i) |
||
| 628 | 00619 { |
||
| 629 | 00620 mii_clk; |
||
| 630 | 00621 <span class="keywordflow">if</span>(ax88796Read(MEMR) & 0x04) |
||
| 631 | 00622 { |
||
| 632 | 00623 result16 |= mask16; |
||
| 633 | 00624 } |
||
| 634 | 00625 <span class="keywordflow">else</span> |
||
| 635 | 00626 { |
||
| 636 | 00627 <span class="keyword">asm</span> <span class="keyword">volatile</span> (<span class="stringliteral">"nop"</span>); |
||
| 637 | 00628 <span class="keywordflow">break</span>; |
||
| 638 | 00629 } |
||
| 639 | 00630 mask16 >>= 1; |
||
| 640 | 00631 } |
||
| 641 | 00632 <span class="keywordflow">return</span> result16; |
||
| 642 | 00633 } |
||
| 643 | 00634 |
||
| 644 | 00635 |
||
| 645 | 00636 <span class="keywordtype">void</span> ax88796RegDump(<span class="keywordtype">void</span>) |
||
| 646 | 00637 { |
||
| 647 | 00638 <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> result; |
||
| 648 | 00639 result = ax88796Read(TR); |
||
| 649 | 00640 |
||
| 650 | 00641 rprintf(<span class="stringliteral">"Media State: "</span>); |
||
| 651 | 00642 <span class="keywordflow">if</span>(!(result & AUTOD)) |
||
| 652 | 00643 rprintf(<span class="stringliteral">"Autonegotiation\r\n"</span>); |
||
| 653 | 00644 <span class="keywordflow">else</span> <span class="keywordflow">if</span>(result & RST_B) |
||
| 654 | 00645 rprintf(<span class="stringliteral">"PHY in Reset \r\n"</span>); |
||
| 655 | 00646 <span class="keywordflow">else</span> <span class="keywordflow">if</span>(!(result & RST_10B)) |
||
| 656 | 00647 rprintf(<span class="stringliteral">"10BASE-T \r\n"</span>); |
||
| 657 | 00648 <span class="keywordflow">else</span> <span class="keywordflow">if</span>(!(result & RST_TXB)) |
||
| 658 | 00649 rprintf(<span class="stringliteral">"100BASE-T \r\n"</span>); |
||
| 659 | 00650 |
||
| 660 | 00651 <span class="comment">//rprintf("TR regsiter : %x\r\n",result);</span> |
||
| 661 | 00652 <span class="comment">//result = read_mii(0x10,0);</span> |
||
| 662 | 00653 <span class="comment">//rprintf("MII regsiter 0x10: %x\r\n",result);</span> |
||
| 663 | 00654 |
||
| 664 | 00655 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">"Page0: CR BNRY PSR PST ISR TSR RSR MMR TR GPI\r\n"</span>); |
||
| 665 | 00656 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 666 | 00657 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(CR)); |
||
| 667 | 00658 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 668 | 00659 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(BNRY)); |
||
| 669 | 00660 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 670 | 00661 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(PSTART)); |
||
| 671 | 00662 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 672 | 00663 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(PSTOP)); |
||
| 673 | 00664 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 674 | 00665 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(ISR)); |
||
| 675 | 00666 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 676 | 00667 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(TSR)); |
||
| 677 | 00668 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 678 | 00669 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(RSR)); |
||
| 679 | 00670 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 680 | 00671 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(MEMR)); |
||
| 681 | 00672 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 682 | 00673 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(TR)); |
||
| 683 | 00674 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 684 | 00675 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(GPI)); |
||
| 685 | 00676 <a class="code" href="group__rprintf.html#ga5">rprintfCRLF</a>(); |
||
| 686 | 00677 |
||
| 687 | 00678 ax88796Write(CR,ax88796Read(CR)|PS0); |
||
| 688 | 00679 |
||
| 689 | 00680 rprintf(<span class="stringliteral">"Page1: CR PAR CPR\r\n"</span>); |
||
| 690 | 00681 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 691 | 00682 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(CR)); |
||
| 692 | 00683 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 693 | 00684 <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR0)); |
||
| 694 | 00685 <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR1)); |
||
| 695 | 00686 <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR2)); |
||
| 696 | 00687 <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR3)); |
||
| 697 | 00688 <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR4)); |
||
| 698 | 00689 <a class="code" href="group__rprintf.html#ga1">rprintfChar</a>(ax88796Read(PAR5)); |
||
| 699 | 00690 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 700 | 00691 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(ax88796Read(CPR)); |
||
| 701 | 00692 |
||
| 702 | 00693 ax88796Write(CR,ax88796Read(CR)&~PS0); |
||
| 703 | 00694 |
||
| 704 | 00695 delay_ms(25); |
||
| 705 | 00696 } |
||
| 706 | 00697 |
||
| 707 | 00698 <span class="comment">/*</span> |
||
| 708 | 00699 <span class="comment">unsigned char ax88796ReceiveEmpty(void)</span> |
||
| 709 | 00700 <span class="comment">{</span> |
||
| 710 | 00701 <span class="comment"> unsigned char temp;</span> |
||
| 711 | 00702 <span class="comment"></span> |
||
| 712 | 00703 <span class="comment"> // read CPR from page 1</span> |
||
| 713 | 00704 <span class="comment"> ax88796Write(CR,0x62);</span> |
||
| 714 | 00705 <span class="comment"> temp = ax88796Read(CPR);</span> |
||
| 715 | 00706 <span class="comment"> </span> |
||
| 716 | 00707 <span class="comment"> // return to page 0</span> |
||
| 717 | 00708 <span class="comment"> ax88796Write(CR,0x22);</span> |
||
| 718 | 00709 <span class="comment"> </span> |
||
| 719 | 00710 <span class="comment"> return ( ax88796Read(BNRY) == temp );</span> |
||
| 720 | 00711 <span class="comment"> </span> |
||
| 721 | 00712 <span class="comment">}*/</span> |
||
| 722 | 00713 |
||
| 723 | 00714 |
||
| 724 | 00715 |
||
| 725 | 00716 |
||
| 726 | </pre></div><hr size="1"><address style="align: right;"><small>Generated on Sun Oct 29 03:41:07 2006 for Procyon AVRlib by |
||
| 727 | <a href="http://www.doxygen.org/index.html"> |
||
| 728 | <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.2 </small></address> |
||
| 729 | </body> |
||
| 730 | </html> |
Powered by WebSVN v2.8.3