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| 10 | <h1>enc28j60.c</h1><a href="enc28j60_8c.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment">00001 <span class="comment">/*! \file enc28j60.c \brief Microchip ENC28J60 Ethernet Interface Driver. */</span> |
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| 11 | 00002 <span class="comment">//*****************************************************************************</span> |
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| 12 | 00003 <span class="comment">//</span> |
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| 13 | 00004 <span class="comment">// File Name : 'enc28j60.c'</span> |
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| 14 | 00005 <span class="comment">// Title : Microchip ENC28J60 Ethernet Interface Driver</span> |
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| 15 | 00006 <span class="comment">// Author : Pascal Stang (c)2005</span> |
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| 16 | 00007 <span class="comment">// Created : 9/22/2005</span> |
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| 17 | 00008 <span class="comment">// Revised : 9/22/2005</span> |
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| 18 | 00009 <span class="comment">// Version : 0.1</span> |
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| 19 | 00010 <span class="comment">// Target MCU : Atmel AVR series</span> |
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| 20 | 00011 <span class="comment">// Editor Tabs : 4</span> |
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| 21 | 00012 <span class="comment">//</span> |
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| 22 | 00013 <span class="comment">// Description : This driver provides initialization and transmit/receive</span> |
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| 23 | 00014 <span class="comment">// functions for the Microchip ENC28J60 10Mb Ethernet Controller and PHY.</span> |
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| 24 | 00015 <span class="comment">// This chip is novel in that it is a full MAC+PHY interface all in a 28-pin</span> |
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| 25 | 00016 <span class="comment">// chip, using an SPI interface to the host processor.</span> |
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| 26 | 00017 <span class="comment">//</span> |
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| 27 | 00018 <span class="comment">//*****************************************************************************</span> |
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| 28 | 00019 |
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| 29 | 00020 <span class="preprocessor">#include "avr/io.h"</span> |
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| 30 | 00021 |
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| 31 | 00022 <span class="preprocessor">#include "<a class="code" href="global_8h.html">global.h</a>"</span> |
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| 32 | 00023 <span class="preprocessor">#include "<a class="code" href="timer_8h.html">timer.h</a>"</span> |
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| 33 | 00024 <span class="preprocessor">#include "<a class="code" href="rprintf_8h.html">rprintf.h</a>"</span> |
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| 34 | 00025 |
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| 35 | 00026 <span class="preprocessor">#include "<a class="code" href="enc28j60_8h.html">enc28j60.h</a>"</span> |
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| 36 | 00027 |
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| 37 | 00028 <span class="preprocessor">#ifdef SPDR0</span> |
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| 38 | 00029 <span class="preprocessor"></span><span class="preprocessor"> #define SPDR SPDR0</span> |
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| 39 | 00030 <span class="preprocessor"></span><span class="preprocessor"> #define SPCR SPCR0</span> |
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| 40 | 00031 <span class="preprocessor"></span><span class="preprocessor"> #define SPSR SPSR0</span> |
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| 41 | 00032 <span class="preprocessor"></span> |
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| 42 | 00033 <span class="preprocessor"> #define SPIF SPIF0</span> |
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| 43 | 00034 <span class="preprocessor"></span><span class="preprocessor"> #define MSTR MSTR0</span> |
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| 44 | 00035 <span class="preprocessor"></span><span class="preprocessor"> #define CPOL CPOL0</span> |
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| 45 | 00036 <span class="preprocessor"></span><span class="preprocessor"> #define DORD DORD0</span> |
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| 46 | 00037 <span class="preprocessor"></span><span class="preprocessor"> #define SPR0 SPR00</span> |
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| 47 | 00038 <span class="preprocessor"></span><span class="preprocessor"> #define SPR1 SPR01</span> |
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| 48 | 00039 <span class="preprocessor"></span><span class="preprocessor"> #define SPI2X SPI2X0</span> |
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| 49 | 00040 <span class="preprocessor"></span><span class="preprocessor"> #define SPE SPE0</span> |
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| 50 | 00041 <span class="preprocessor"></span><span class="preprocessor">#endif</span> |
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| 51 | 00042 <span class="preprocessor"></span> |
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| 52 | 00043 <span class="comment">// include configuration</span> |
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| 53 | 00044 <span class="preprocessor">#include "<a class="code" href="enc28j60conf_8h.html">enc28j60conf.h</a>"</span> |
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| 54 | 00045 |
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| 55 | 00046 u08 Enc28j60Bank; |
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| 56 | 00047 u16 NextPacketPtr; |
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| 57 | 00048 |
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| 58 | <a name="l00049"></a><a class="code" href="group__nic.html#ga0">00049</a> <span class="keywordtype">void</span> <a class="code" href="group__nic.html#ga0">nicInit</a>(<span class="keywordtype">void</span>) |
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| 59 | 00050 { |
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| 60 | 00051 <a class="code" href="group__enc28j60.html#ga9">enc28j60Init</a>(); |
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| 61 | 00052 } |
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| 62 | 00053 |
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| 63 | <a name="l00054"></a><a class="code" href="group__nic.html#ga1">00054</a> <span class="keywordtype">void</span> <a class="code" href="group__nic.html#ga1">nicSend</a>(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> len, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>* packet) |
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| 64 | 00055 { |
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| 65 | 00056 <a class="code" href="group__enc28j60.html#ga10">enc28j60PacketSend</a>(len, packet); |
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| 66 | 00057 } |
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| 67 | 00058 |
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| 68 | <a name="l00059"></a><a class="code" href="group__nic.html#ga2">00059</a> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> <a class="code" href="group__nic.html#ga2">nicPoll</a>(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> maxlen, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>* packet) |
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| 69 | 00060 { |
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| 70 | 00061 <span class="keywordflow">return</span> <a class="code" href="group__enc28j60.html#ga11">enc28j60PacketReceive</a>(maxlen, packet); |
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| 71 | 00062 } |
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| 72 | 00063 |
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| 73 | 00064 <span class="keywordtype">void</span> nicGetMacAddress(u08* macaddr) |
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| 74 | 00065 { |
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| 75 | 00066 <span class="comment">// read MAC address registers</span> |
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| 76 | 00067 <span class="comment">// NOTE: MAC address in ENC28J60 is byte-backward</span> |
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| 77 | 00068 *macaddr++ = <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR5); |
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| 78 | 00069 *macaddr++ = <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR4); |
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| 79 | 00070 *macaddr++ = <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR3); |
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| 80 | 00071 *macaddr++ = <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR2); |
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| 81 | 00072 *macaddr++ = <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR1); |
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| 82 | 00073 *macaddr++ = <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR0); |
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| 83 | 00074 } |
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| 84 | 00075 |
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| 85 | 00076 <span class="keywordtype">void</span> nicSetMacAddress(u08* macaddr) |
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| 86 | 00077 { |
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| 87 | 00078 <span class="comment">// write MAC address</span> |
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| 88 | 00079 <span class="comment">// NOTE: MAC address in ENC28J60 is byte-backward</span> |
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| 89 | 00080 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR5, *macaddr++); |
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| 90 | 00081 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR4, *macaddr++); |
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| 91 | 00082 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR3, *macaddr++); |
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| 92 | 00083 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR2, *macaddr++); |
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| 93 | 00084 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR1, *macaddr++); |
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| 94 | 00085 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR0, *macaddr++); |
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| 95 | 00086 } |
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| 96 | 00087 |
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| 97 | <a name="l00088"></a><a class="code" href="group__nic.html#ga5">00088</a> <span class="keywordtype">void</span> <a class="code" href="group__nic.html#ga5">nicRegDump</a>(<span class="keywordtype">void</span>) |
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| 98 | 00089 { |
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| 99 | 00090 <a class="code" href="group__enc28j60.html#ga13">enc28j60RegDump</a>(); |
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| 100 | 00091 } |
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| 101 | 00092 |
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| 102 | 00093 <span class="comment">/*</span> |
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| 103 | 00094 <span class="comment">void ax88796SetupPorts(void)</span> |
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| 104 | 00095 <span class="comment">{</span> |
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| 105 | 00096 <span class="comment">#if NIC_CONNECTION == MEMORY_MAPPED</span> |
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| 106 | 00097 <span class="comment"> // enable external SRAM interface - no wait states</span> |
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| 107 | 00098 <span class="comment"> sbi(MCUCR, SRE);</span> |
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| 108 | 00099 <span class="comment">// sbi(MCUCR, SRW10);</span> |
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| 109 | 00100 <span class="comment">// sbi(XMCRA, SRW00);</span> |
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| 110 | 00101 <span class="comment">// sbi(XMCRA, SRW01);</span> |
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| 111 | 00102 <span class="comment">// sbi(XMCRA, SRW11);</span> |
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| 112 | 00103 <span class="comment">#else</span> |
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| 113 | 00104 <span class="comment"> // set address port to output</span> |
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| 114 | 00105 <span class="comment"> AX88796_ADDRESS_DDR = AX88796_ADDRESS_MASK;</span> |
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| 115 | 00106 <span class="comment"> </span> |
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| 116 | 00107 <span class="comment"> // set data port to input with pull-ups</span> |
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| 117 | 00108 <span class="comment"> AX88796_DATA_DDR = 0x00;</span> |
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| 118 | 00109 <span class="comment"> AX88796_DATA_PORT = 0xFF;</span> |
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| 119 | 00110 <span class="comment"></span> |
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| 120 | 00111 <span class="comment"> // initialize the control port read and write pins to de-asserted</span> |
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| 121 | 00112 <span class="comment"> sbi( AX88796_CONTROL_PORT, AX88796_CONTROL_READPIN );</span> |
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| 122 | 00113 <span class="comment"> sbi( AX88796_CONTROL_PORT, AX88796_CONTROL_WRITEPIN );</span> |
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| 123 | 00114 <span class="comment"> // set the read and write pins to output</span> |
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| 124 | 00115 <span class="comment"> sbi( AX88796_CONTROL_DDR, AX88796_CONTROL_READPIN );</span> |
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| 125 | 00116 <span class="comment"> sbi( AX88796_CONTROL_DDR, AX88796_CONTROL_WRITEPIN );</span> |
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| 126 | 00117 <span class="comment">#endif</span> |
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| 127 | 00118 <span class="comment"> // set reset pin to output</span> |
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| 128 | 00119 <span class="comment"> sbi( AX88796_RESET_DDR, AX88796_RESET_PIN );</span> |
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| 129 | 00120 <span class="comment">}</span> |
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| 130 | 00121 <span class="comment">*/</span> |
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| 131 | 00122 |
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| 132 | <a name="l00123"></a><a class="code" href="group__enc28j60.html#ga0">00123</a> u08 <a class="code" href="group__enc28j60.html#ga0">enc28j60ReadOp</a>(u08 <a class="code" href="structnetBootpHeader.html#o0">op</a>, u08 address) |
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| 133 | 00124 { |
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| 134 | 00125 u08 data; |
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| 135 | 00126 |
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| 136 | 00127 <span class="comment">// assert CS</span> |
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| 137 | 00128 ENC28J60_CONTROL_PORT &= ~(1<<ENC28J60_CONTROL_CS); |
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| 138 | 00129 |
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| 139 | 00130 <span class="comment">// issue read command</span> |
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| 140 | 00131 SPDR = op | (address & ADDR_MASK); |
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| 141 | 00132 <span class="keywordflow">while</span>(!(SPSR & (1<<SPIF))); |
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| 142 | 00133 <span class="comment">// read data</span> |
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| 143 | 00134 SPDR = 0x00; |
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| 144 | 00135 <span class="keywordflow">while</span>(!(SPSR & (1<<SPIF))); |
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| 145 | 00136 <span class="comment">// do dummy read if needed</span> |
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| 146 | 00137 <span class="keywordflow">if</span>(address & 0x80) |
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| 147 | 00138 { |
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| 148 | 00139 SPDR = 0x00; |
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| 149 | 00140 <span class="keywordflow">while</span>(!(inb(SPSR) & (1<<SPIF))); |
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| 150 | 00141 } |
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| 151 | 00142 data = SPDR; |
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| 152 | 00143 |
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| 153 | 00144 <span class="comment">// release CS</span> |
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| 154 | 00145 ENC28J60_CONTROL_PORT |= (1<<ENC28J60_CONTROL_CS); |
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| 155 | 00146 |
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| 156 | 00147 <span class="keywordflow">return</span> data; |
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| 157 | 00148 } |
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| 158 | 00149 |
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| 159 | <a name="l00150"></a><a class="code" href="group__enc28j60.html#ga1">00150</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(u08 <a class="code" href="structnetBootpHeader.html#o0">op</a>, u08 address, u08 data) |
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| 160 | 00151 { |
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| 161 | 00152 <span class="comment">// assert CS</span> |
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| 162 | 00153 ENC28J60_CONTROL_PORT &= ~(1<<ENC28J60_CONTROL_CS); |
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| 163 | 00154 |
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| 164 | 00155 <span class="comment">// issue write command</span> |
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| 165 | 00156 SPDR = op | (address & ADDR_MASK); |
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| 166 | 00157 <span class="keywordflow">while</span>(!(SPSR & (1<<SPIF))); |
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| 167 | 00158 <span class="comment">// write data</span> |
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| 168 | 00159 SPDR = data; |
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| 169 | 00160 <span class="keywordflow">while</span>(!(SPSR & (1<<SPIF))); |
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| 170 | 00161 |
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| 171 | 00162 <span class="comment">// release CS</span> |
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| 172 | 00163 ENC28J60_CONTROL_PORT |= (1<<ENC28J60_CONTROL_CS); |
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| 173 | 00164 } |
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| 174 | 00165 |
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| 175 | <a name="l00166"></a><a class="code" href="group__enc28j60.html#ga2">00166</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga2">enc28j60ReadBuffer</a>(u16 len, u08* data) |
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| 176 | 00167 { |
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| 177 | 00168 <span class="comment">// assert CS</span> |
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| 178 | 00169 ENC28J60_CONTROL_PORT &= ~(1<<ENC28J60_CONTROL_CS); |
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| 179 | 00170 |
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| 180 | 00171 <span class="comment">// issue read command</span> |
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| 181 | 00172 SPDR = ENC28J60_READ_BUF_MEM; |
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| 182 | 00173 <span class="keywordflow">while</span>(!(SPSR & (1<<SPIF))); |
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| 183 | 00174 <span class="keywordflow">while</span>(len--) |
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| 184 | 00175 { |
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| 185 | 00176 <span class="comment">// read data</span> |
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| 186 | 00177 SPDR = 0x00; |
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| 187 | 00178 <span class="keywordflow">while</span>(!(SPSR & (1<<SPIF))); |
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| 188 | 00179 *data++ = SPDR; |
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| 189 | 00180 } |
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| 190 | 00181 <span class="comment">// release CS</span> |
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| 191 | 00182 ENC28J60_CONTROL_PORT |= (1<<ENC28J60_CONTROL_CS); |
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| 192 | 00183 } |
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| 193 | 00184 |
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| 194 | <a name="l00185"></a><a class="code" href="group__enc28j60.html#ga3">00185</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga3">enc28j60WriteBuffer</a>(u16 len, u08* data) |
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| 195 | 00186 { |
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| 196 | 00187 <span class="comment">// assert CS</span> |
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| 197 | 00188 ENC28J60_CONTROL_PORT &= ~(1<<ENC28J60_CONTROL_CS); |
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| 198 | 00189 |
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| 199 | 00190 <span class="comment">// issue write command</span> |
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| 200 | 00191 SPDR = ENC28J60_WRITE_BUF_MEM; |
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| 201 | 00192 <span class="keywordflow">while</span>(!(SPSR & (1<<SPIF))); |
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| 202 | 00193 <span class="keywordflow">while</span>(len--) |
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| 203 | 00194 { |
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| 204 | 00195 <span class="comment">// write data</span> |
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| 205 | 00196 SPDR = *data++; |
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| 206 | 00197 <span class="keywordflow">while</span>(!(SPSR & (1<<SPIF))); |
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| 207 | 00198 } |
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| 208 | 00199 <span class="comment">// release CS</span> |
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| 209 | 00200 ENC28J60_CONTROL_PORT |= (1<<ENC28J60_CONTROL_CS); |
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| 210 | 00201 } |
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| 211 | 00202 |
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| 212 | <a name="l00203"></a><a class="code" href="group__enc28j60.html#ga4">00203</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga4">enc28j60SetBank</a>(u08 address) |
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| 213 | 00204 { |
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| 214 | 00205 <span class="comment">// set the bank (if needed)</span> |
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| 215 | 00206 <span class="keywordflow">if</span>((address & BANK_MASK) != Enc28j60Bank) |
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| 216 | 00207 { |
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| 217 | 00208 <span class="comment">// set the bank</span> |
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| 218 | 00209 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1|ECON1_BSEL0)); |
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| 219 | 00210 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK)>>5); |
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| 220 | 00211 Enc28j60Bank = (address & BANK_MASK); |
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| 221 | 00212 } |
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| 222 | 00213 } |
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| 223 | 00214 |
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| 224 | <a name="l00215"></a><a class="code" href="group__enc28j60.html#ga5">00215</a> u08 <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(u08 address) |
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| 225 | 00216 { |
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| 226 | 00217 <span class="comment">// set the bank</span> |
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| 227 | 00218 <a class="code" href="group__enc28j60.html#ga4">enc28j60SetBank</a>(address); |
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| 228 | 00219 <span class="comment">// do the read</span> |
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| 229 | 00220 <span class="keywordflow">return</span> <a class="code" href="group__enc28j60.html#ga0">enc28j60ReadOp</a>(ENC28J60_READ_CTRL_REG, address); |
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| 230 | 00221 } |
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| 231 | 00222 |
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| 232 | <a name="l00223"></a><a class="code" href="group__enc28j60.html#ga6">00223</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(u08 address, u08 data) |
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| 233 | 00224 { |
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| 234 | 00225 <span class="comment">// set the bank</span> |
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| 235 | 00226 <a class="code" href="group__enc28j60.html#ga4">enc28j60SetBank</a>(address); |
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| 236 | 00227 <span class="comment">// do the write</span> |
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| 237 | 00228 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_WRITE_CTRL_REG, address, data); |
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| 238 | 00229 } |
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| 239 | 00230 |
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| 240 | <a name="l00231"></a><a class="code" href="group__enc28j60.html#ga7">00231</a> u16 <a class="code" href="group__enc28j60.html#ga7">enc28j60PhyRead</a>(u08 address) |
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| 241 | 00232 { |
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| 242 | 00233 u16 data; |
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| 243 | 00234 |
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| 244 | 00235 <span class="comment">// Set the right address and start the register read operation</span> |
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| 245 | 00236 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MIREGADR, address); |
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| 246 | 00237 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MICMD, MICMD_MIIRD); |
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| 247 | 00238 |
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| 248 | 00239 <span class="comment">// wait until the PHY read completes</span> |
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| 249 | 00240 <span class="keywordflow">while</span>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MISTAT) & MISTAT_BUSY); |
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| 250 | 00241 |
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| 251 | 00242 <span class="comment">// quit reading</span> |
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| 252 | 00243 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MICMD, 0x00); |
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| 253 | 00244 |
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| 254 | 00245 <span class="comment">// get data value</span> |
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| 255 | 00246 data = <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MIRDL); |
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| 256 | 00247 data |= <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MIRDH); |
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| 257 | 00248 <span class="comment">// return the data</span> |
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| 258 | 00249 <span class="keywordflow">return</span> data; |
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| 259 | 00250 } |
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| 260 | 00251 |
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| 261 | <a name="l00252"></a><a class="code" href="group__enc28j60.html#ga8">00252</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga8">enc28j60PhyWrite</a>(u08 address, u16 data) |
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| 262 | 00253 { |
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| 263 | 00254 <span class="comment">// set the PHY register address</span> |
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| 264 | 00255 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MIREGADR, address); |
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| 265 | 00256 |
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| 266 | 00257 <span class="comment">// write the PHY data</span> |
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| 267 | 00258 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MIWRL, data); |
||
| 268 | 00259 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MIWRH, data>>8); |
||
| 269 | 00260 |
||
| 270 | 00261 <span class="comment">// wait until the PHY write completes</span> |
||
| 271 | 00262 <span class="keywordflow">while</span>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MISTAT) & MISTAT_BUSY); |
||
| 272 | 00263 } |
||
| 273 | 00264 |
||
| 274 | <a name="l00265"></a><a class="code" href="group__enc28j60.html#ga9">00265</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga9">enc28j60Init</a>(<span class="keywordtype">void</span>) |
||
| 275 | 00266 { |
||
| 276 | 00267 <span class="comment">// initialize I/O</span> |
||
| 277 | 00268 sbi(ENC28J60_CONTROL_DDR, ENC28J60_CONTROL_CS); |
||
| 278 | 00269 sbi(ENC28J60_CONTROL_PORT, ENC28J60_CONTROL_CS); |
||
| 279 | 00270 |
||
| 280 | 00271 <span class="comment">// setup SPI I/O pins</span> |
||
| 281 | 00272 sbi(ENC28J60_SPI_PORT, ENC28J60_SPI_SCK); <span class="comment">// set SCK hi</span> |
||
| 282 | 00273 sbi(ENC28J60_SPI_DDR, ENC28J60_SPI_SCK); <span class="comment">// set SCK as output</span> |
||
| 283 | 00274 cbi(ENC28J60_SPI_DDR, ENC28J60_SPI_MISO); <span class="comment">// set MISO as input</span> |
||
| 284 | 00275 sbi(ENC28J60_SPI_DDR, ENC28J60_SPI_MOSI); <span class="comment">// set MOSI as output</span> |
||
| 285 | 00276 sbi(ENC28J60_SPI_DDR, ENC28J60_SPI_SS); <span class="comment">// SS must be output for Master mode to work</span> |
||
| 286 | 00277 <span class="comment">// initialize SPI interface</span> |
||
| 287 | 00278 <span class="comment">// master mode</span> |
||
| 288 | 00279 sbi(SPCR, MSTR); |
||
| 289 | 00280 <span class="comment">// select clock phase positive-going in middle of data</span> |
||
| 290 | 00281 cbi(SPCR, CPOL); |
||
| 291 | 00282 <span class="comment">// Data order MSB first</span> |
||
| 292 | 00283 cbi(SPCR,DORD); |
||
| 293 | 00284 <span class="comment">// switch to f/4 2X = f/2 bitrate</span> |
||
| 294 | 00285 cbi(SPCR, SPR0); |
||
| 295 | 00286 cbi(SPCR, SPR1); |
||
| 296 | 00287 sbi(SPSR, SPI2X); |
||
| 297 | 00288 <span class="comment">// enable SPI</span> |
||
| 298 | 00289 sbi(SPCR, SPE); |
||
| 299 | 00290 |
||
| 300 | 00291 <span class="comment">// perform system reset</span> |
||
| 301 | 00292 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET); |
||
| 302 | 00293 <span class="comment">// check CLKRDY bit to see if reset is complete</span> |
||
| 303 | 00294 delay_us(50); |
||
| 304 | 00295 <span class="keywordflow">while</span>(!(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ESTAT) & ESTAT_CLKRDY)); |
||
| 305 | 00296 |
||
| 306 | 00297 <span class="comment">// do bank 0 stuff</span> |
||
| 307 | 00298 <span class="comment">// initialize receive buffer</span> |
||
| 308 | 00299 <span class="comment">// 16-bit transfers, must write low byte first</span> |
||
| 309 | 00300 <span class="comment">// set receive buffer start address</span> |
||
| 310 | 00301 NextPacketPtr = RXSTART_INIT; |
||
| 311 | 00302 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERXSTL, RXSTART_INIT&0xFF); |
||
| 312 | 00303 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERXSTH, RXSTART_INIT>>8); |
||
| 313 | 00304 <span class="comment">// set receive pointer address</span> |
||
| 314 | 00305 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERXRDPTL, RXSTART_INIT&0xFF); |
||
| 315 | 00306 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERXRDPTH, RXSTART_INIT>>8); |
||
| 316 | 00307 <span class="comment">// set receive buffer end</span> |
||
| 317 | 00308 <span class="comment">// ERXND defaults to 0x1FFF (end of ram)</span> |
||
| 318 | 00309 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERXNDL, RXSTOP_INIT&0xFF); |
||
| 319 | 00310 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERXNDH, RXSTOP_INIT>>8); |
||
| 320 | 00311 <span class="comment">// set transmit buffer start</span> |
||
| 321 | 00312 <span class="comment">// ETXST defaults to 0x0000 (beginnging of ram)</span> |
||
| 322 | 00313 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ETXSTL, TXSTART_INIT&0xFF); |
||
| 323 | 00314 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ETXSTH, TXSTART_INIT>>8); |
||
| 324 | 00315 |
||
| 325 | 00316 <span class="comment">// do bank 2 stuff</span> |
||
| 326 | 00317 <span class="comment">// enable MAC receive</span> |
||
| 327 | 00318 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS); |
||
| 328 | 00319 <span class="comment">// bring MAC out of reset</span> |
||
| 329 | 00320 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MACON2, 0x00); |
||
| 330 | 00321 <span class="comment">// enable automatic padding and CRC operations</span> |
||
| 331 | 00322 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN); |
||
| 332 | 00323 <span class="comment">// enc28j60Write(MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);</span> |
||
| 333 | 00324 <span class="comment">// set inter-frame gap (non-back-to-back)</span> |
||
| 334 | 00325 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAIPGL, 0x12); |
||
| 335 | 00326 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAIPGH, 0x0C); |
||
| 336 | 00327 <span class="comment">// set inter-frame gap (back-to-back)</span> |
||
| 337 | 00328 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MABBIPG, 0x12); |
||
| 338 | 00329 <span class="comment">// Set the maximum packet size which the controller will accept</span> |
||
| 339 | 00330 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAMXFLL, MAX_FRAMELEN&0xFF); |
||
| 340 | 00331 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAMXFLH, MAX_FRAMELEN>>8); |
||
| 341 | 00332 |
||
| 342 | 00333 <span class="comment">// do bank 3 stuff</span> |
||
| 343 | 00334 <span class="comment">// write MAC address</span> |
||
| 344 | 00335 <span class="comment">// NOTE: MAC address in ENC28J60 is byte-backward</span> |
||
| 345 | 00336 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR5, ENC28J60_MAC0); |
||
| 346 | 00337 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR4, ENC28J60_MAC1); |
||
| 347 | 00338 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR3, ENC28J60_MAC2); |
||
| 348 | 00339 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR2, ENC28J60_MAC3); |
||
| 349 | 00340 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR1, ENC28J60_MAC4); |
||
| 350 | 00341 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(MAADR0, ENC28J60_MAC5); |
||
| 351 | 00342 |
||
| 352 | 00343 <span class="comment">// no loopback of transmitted frames</span> |
||
| 353 | 00344 <a class="code" href="group__enc28j60.html#ga8">enc28j60PhyWrite</a>(PHCON2, PHCON2_HDLDIS); |
||
| 354 | 00345 |
||
| 355 | 00346 <span class="comment">// switch to bank 0</span> |
||
| 356 | 00347 <a class="code" href="group__enc28j60.html#ga4">enc28j60SetBank</a>(ECON1); |
||
| 357 | 00348 <span class="comment">// enable interrutps</span> |
||
| 358 | 00349 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE); |
||
| 359 | 00350 <span class="comment">// enable packet reception</span> |
||
| 360 | 00351 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN); |
||
| 361 | 00352 <span class="comment">/*</span> |
||
| 362 | 00353 <span class="comment"> enc28j60PhyWrite(PHLCON, 0x0AA2);</span> |
||
| 363 | 00354 <span class="comment"></span> |
||
| 364 | 00355 <span class="comment"> // setup duplex ----------------------</span> |
||
| 365 | 00356 <span class="comment"></span> |
||
| 366 | 00357 <span class="comment"> // Disable receive logic and abort any packets currently being transmitted</span> |
||
| 367 | 00358 <span class="comment"> enc28j60WriteOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS|ECON1_RXEN);</span> |
||
| 368 | 00359 <span class="comment"> </span> |
||
| 369 | 00360 <span class="comment"> {</span> |
||
| 370 | 00361 <span class="comment"> u16 temp;</span> |
||
| 371 | 00362 <span class="comment"> // Set the PHY to the proper duplex mode</span> |
||
| 372 | 00363 <span class="comment"> temp = enc28j60PhyRead(PHCON1);</span> |
||
| 373 | 00364 <span class="comment"> temp &= ~PHCON1_PDPXMD;</span> |
||
| 374 | 00365 <span class="comment"> enc28j60PhyWrite(PHCON1, temp);</span> |
||
| 375 | 00366 <span class="comment"> // Set the MAC to the proper duplex mode</span> |
||
| 376 | 00367 <span class="comment"> temp = enc28j60Read(MACON3);</span> |
||
| 377 | 00368 <span class="comment"> temp &= ~MACON3_FULDPX;</span> |
||
| 378 | 00369 <span class="comment"> enc28j60Write(MACON3, temp);</span> |
||
| 379 | 00370 <span class="comment"> }</span> |
||
| 380 | 00371 <span class="comment"></span> |
||
| 381 | 00372 <span class="comment"> // Set the back-to-back inter-packet gap time to IEEE specified </span> |
||
| 382 | 00373 <span class="comment"> // requirements. The meaning of the MABBIPG value changes with the duplex</span> |
||
| 383 | 00374 <span class="comment"> // state, so it must be updated in this function.</span> |
||
| 384 | 00375 <span class="comment"> // In full duplex, 0x15 represents 9.6us; 0x12 is 9.6us in half duplex</span> |
||
| 385 | 00376 <span class="comment"> //enc28j60Write(MABBIPG, DuplexState ? 0x15 : 0x12); </span> |
||
| 386 | 00377 <span class="comment"> </span> |
||
| 387 | 00378 <span class="comment"> // Reenable receive logic</span> |
||
| 388 | 00379 <span class="comment"> enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);</span> |
||
| 389 | 00380 <span class="comment"></span> |
||
| 390 | 00381 <span class="comment"> // setup duplex ----------------------</span> |
||
| 391 | 00382 <span class="comment">*/</span> |
||
| 392 | 00383 } |
||
| 393 | 00384 |
||
| 394 | <a name="l00385"></a><a class="code" href="group__enc28j60.html#ga10">00385</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga10">enc28j60PacketSend</a>(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> len, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>* packet) |
||
| 395 | 00386 { |
||
| 396 | 00387 <span class="comment">// Set the write pointer to start of transmit buffer area</span> |
||
| 397 | 00388 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(EWRPTL, TXSTART_INIT); |
||
| 398 | 00389 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(EWRPTH, TXSTART_INIT>>8); |
||
| 399 | 00390 <span class="comment">// Set the TXND pointer to correspond to the packet size given</span> |
||
| 400 | 00391 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ETXNDL, (TXSTART_INIT+len)); |
||
| 401 | 00392 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ETXNDH, (TXSTART_INIT+len)>>8); |
||
| 402 | 00393 |
||
| 403 | 00394 <span class="comment">// write per-packet control byte</span> |
||
| 404 | 00395 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_WRITE_BUF_MEM, 0, 0x00); |
||
| 405 | 00396 |
||
| 406 | 00397 <span class="comment">// copy the packet into the transmit buffer</span> |
||
| 407 | 00398 <a class="code" href="group__enc28j60.html#ga3">enc28j60WriteBuffer</a>(len, packet); |
||
| 408 | 00399 |
||
| 409 | 00400 <span class="comment">// send the contents of the transmit buffer onto the network</span> |
||
| 410 | 00401 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS); |
||
| 411 | 00402 } |
||
| 412 | 00403 |
||
| 413 | <a name="l00404"></a><a class="code" href="group__enc28j60.html#ga11">00404</a> <span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> <a class="code" href="group__enc28j60.html#ga11">enc28j60PacketReceive</a>(<span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> maxlen, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span>* packet) |
||
| 414 | 00405 { |
||
| 415 | 00406 u16 rxstat; |
||
| 416 | 00407 u16 len; |
||
| 417 | 00408 |
||
| 418 | 00409 <span class="comment">// check if a packet has been received and buffered</span> |
||
| 419 | 00410 <span class="comment">// if( !(enc28j60Read(EIR) & EIR_PKTIF) )</span> |
||
| 420 | 00411 <span class="keywordflow">if</span>( !<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(EPKTCNT) ) |
||
| 421 | 00412 <span class="keywordflow">return</span> 0; |
||
| 422 | 00413 |
||
| 423 | 00414 <span class="comment">// Make absolutely certain that any previous packet was discarded </span> |
||
| 424 | 00415 <span class="comment">//if( WasDiscarded == FALSE)</span> |
||
| 425 | 00416 <span class="comment">// MACDiscardRx();</span> |
||
| 426 | 00417 |
||
| 427 | 00418 <span class="comment">// Set the read pointer to the start of the received packet</span> |
||
| 428 | 00419 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERDPTL, (NextPacketPtr)); |
||
| 429 | 00420 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERDPTH, (NextPacketPtr)>>8); |
||
| 430 | 00421 <span class="comment">// read the next packet pointer</span> |
||
| 431 | 00422 NextPacketPtr = <a class="code" href="group__enc28j60.html#ga0">enc28j60ReadOp</a>(ENC28J60_READ_BUF_MEM, 0); |
||
| 432 | 00423 NextPacketPtr |= <a class="code" href="group__enc28j60.html#ga0">enc28j60ReadOp</a>(ENC28J60_READ_BUF_MEM, 0)<<8; |
||
| 433 | 00424 <span class="comment">// read the packet length</span> |
||
| 434 | 00425 len = <a class="code" href="group__enc28j60.html#ga0">enc28j60ReadOp</a>(ENC28J60_READ_BUF_MEM, 0); |
||
| 435 | 00426 len |= <a class="code" href="group__enc28j60.html#ga0">enc28j60ReadOp</a>(ENC28J60_READ_BUF_MEM, 0)<<8; |
||
| 436 | 00427 <span class="comment">// read the receive status</span> |
||
| 437 | 00428 rxstat = <a class="code" href="group__enc28j60.html#ga0">enc28j60ReadOp</a>(ENC28J60_READ_BUF_MEM, 0); |
||
| 438 | 00429 rxstat |= <a class="code" href="group__enc28j60.html#ga0">enc28j60ReadOp</a>(ENC28J60_READ_BUF_MEM, 0)<<8; |
||
| 439 | 00430 |
||
| 440 | 00431 <span class="comment">// limit retrieve length</span> |
||
| 441 | 00432 <span class="comment">// (we reduce the MAC-reported length by 4 to remove the CRC)</span> |
||
| 442 | 00433 len = MIN(len, maxlen); |
||
| 443 | 00434 |
||
| 444 | 00435 <span class="comment">// copy the packet from the receive buffer</span> |
||
| 445 | 00436 <a class="code" href="group__enc28j60.html#ga2">enc28j60ReadBuffer</a>(len, packet); |
||
| 446 | 00437 |
||
| 447 | 00438 <span class="comment">// Move the RX read pointer to the start of the next received packet</span> |
||
| 448 | 00439 <span class="comment">// This frees the memory we just read out</span> |
||
| 449 | 00440 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERXRDPTL, (NextPacketPtr)); |
||
| 450 | 00441 <a class="code" href="group__enc28j60.html#ga6">enc28j60Write</a>(ERXRDPTH, (NextPacketPtr)>>8); |
||
| 451 | 00442 |
||
| 452 | 00443 <span class="comment">// decrement the packet counter indicate we are done with this packet</span> |
||
| 453 | 00444 <a class="code" href="group__enc28j60.html#ga1">enc28j60WriteOp</a>(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC); |
||
| 454 | 00445 |
||
| 455 | 00446 <span class="keywordflow">return</span> len; |
||
| 456 | 00447 } |
||
| 457 | 00448 |
||
| 458 | <a name="l00449"></a><a class="code" href="group__enc28j60.html#ga12">00449</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga12">enc28j60ReceiveOverflowRecover</a>(<span class="keywordtype">void</span>) |
||
| 459 | 00450 { |
||
| 460 | 00451 <span class="comment">// receive buffer overflow handling procedure</span> |
||
| 461 | 00452 |
||
| 462 | 00453 <span class="comment">// recovery completed</span> |
||
| 463 | 00454 } |
||
| 464 | 00455 |
||
| 465 | <a name="l00456"></a><a class="code" href="group__enc28j60.html#ga13">00456</a> <span class="keywordtype">void</span> <a class="code" href="group__enc28j60.html#ga13">enc28j60RegDump</a>(<span class="keywordtype">void</span>) |
||
| 466 | 00457 { |
||
| 467 | 00458 <span class="comment">// unsigned char macaddr[6];</span> |
||
| 468 | 00459 <span class="comment">// result = ax88796Read(TR);</span> |
||
| 469 | 00460 |
||
| 470 | 00461 <span class="comment">// rprintf("Media State: ");</span> |
||
| 471 | 00462 <span class="comment">// if(!(result & AUTOD))</span> |
||
| 472 | 00463 <span class="comment">// rprintf("Autonegotiation\r\n");</span> |
||
| 473 | 00464 <span class="comment">// else if(result & RST_B)</span> |
||
| 474 | 00465 <span class="comment">// rprintf("PHY in Reset \r\n");</span> |
||
| 475 | 00466 <span class="comment">// else if(!(result & RST_10B))</span> |
||
| 476 | 00467 <span class="comment">// rprintf("10BASE-T \r\n");</span> |
||
| 477 | 00468 <span class="comment">// else if(!(result & RST_TXB))</span> |
||
| 478 | 00469 <span class="comment">// rprintf("100BASE-T \r\n");</span> |
||
| 479 | 00470 |
||
| 480 | 00471 rprintf(<span class="stringliteral">"RevID: 0x%x\r\n"</span>, <a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(EREVID)); |
||
| 481 | 00472 |
||
| 482 | 00473 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">"Cntrl: ECON1 ECON2 ESTAT EIR EIE\r\n"</span>); |
||
| 483 | 00474 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 484 | 00475 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ECON1)); |
||
| 485 | 00476 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 486 | 00477 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ECON2)); |
||
| 487 | 00478 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 488 | 00479 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ESTAT)); |
||
| 489 | 00480 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 490 | 00481 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(EIR)); |
||
| 491 | 00482 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 492 | 00483 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(EIE)); |
||
| 493 | 00484 <a class="code" href="group__rprintf.html#ga5">rprintfCRLF</a>(); |
||
| 494 | 00485 |
||
| 495 | 00486 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">"MAC : MACON1 MACON2 MACON3 MACON4 MAC-Address\r\n"</span>); |
||
| 496 | 00487 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 497 | 00488 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MACON1)); |
||
| 498 | 00489 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 499 | 00490 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MACON2)); |
||
| 500 | 00491 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 501 | 00492 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MACON3)); |
||
| 502 | 00493 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 503 | 00494 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MACON4)); |
||
| 504 | 00495 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" "</span>); |
||
| 505 | 00496 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR5)); |
||
| 506 | 00497 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR4)); |
||
| 507 | 00498 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR3)); |
||
| 508 | 00499 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR2)); |
||
| 509 | 00500 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR1)); |
||
| 510 | 00501 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAADR0)); |
||
| 511 | 00502 <a class="code" href="group__rprintf.html#ga5">rprintfCRLF</a>(); |
||
| 512 | 00503 |
||
| 513 | 00504 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">"Rx : ERXST ERXND ERXWRPT ERXRDPT ERXFCON EPKTCNT MAMXFL\r\n"</span>); |
||
| 514 | 00505 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 515 | 00506 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXSTH)); |
||
| 516 | 00507 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXSTL)); |
||
| 517 | 00508 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 518 | 00509 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXNDH)); |
||
| 519 | 00510 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXNDL)); |
||
| 520 | 00511 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 521 | 00512 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXWRPTH)); |
||
| 522 | 00513 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXWRPTL)); |
||
| 523 | 00514 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 524 | 00515 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXRDPTH)); |
||
| 525 | 00516 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXRDPTL)); |
||
| 526 | 00517 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 527 | 00518 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ERXFCON)); |
||
| 528 | 00519 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 529 | 00520 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(EPKTCNT)); |
||
| 530 | 00521 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 531 | 00522 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAMXFLH)); |
||
| 532 | 00523 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAMXFLL)); |
||
| 533 | 00524 <a class="code" href="group__rprintf.html#ga5">rprintfCRLF</a>(); |
||
| 534 | 00525 |
||
| 535 | 00526 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">"Tx : ETXST ETXND MACLCON1 MACLCON2 MAPHSUP\r\n"</span>); |
||
| 536 | 00527 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 537 | 00528 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ETXSTH)); |
||
| 538 | 00529 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ETXSTL)); |
||
| 539 | 00530 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 540 | 00531 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ETXNDH)); |
||
| 541 | 00532 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(ETXNDL)); |
||
| 542 | 00533 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 543 | 00534 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MACLCON1)); |
||
| 544 | 00535 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 545 | 00536 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MACLCON2)); |
||
| 546 | 00537 <a class="code" href="group__rprintf.html#ga15">rprintfProgStrM</a>(<span class="stringliteral">" 0x"</span>); |
||
| 547 | 00538 <a class="code" href="group__rprintf.html#ga7">rprintfu08</a>(<a class="code" href="group__enc28j60.html#ga5">enc28j60Read</a>(MAPHSUP)); |
||
| 548 | 00539 <a class="code" href="group__rprintf.html#ga5">rprintfCRLF</a>(); |
||
| 549 | 00540 |
||
| 550 | 00541 delay_ms(25); |
||
| 551 | 00542 } |
||
| 552 | 00543 |
||
| 553 | 00544 |
||
| 554 | 00545 |
||
| 555 | </pre></div><hr size="1"><address style="align: right;"><small>Generated on Sun Oct 29 03:41:07 2006 for Procyon AVRlib by |
||
| 556 | <a href="http://www.doxygen.org/index.html"> |
||
| 557 | <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.2 </small></address> |
||
| 558 | </body> |
||
| 559 | </html> |
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