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| 3 | <title>Procyon AVRlib: ASIX AX88796 Ethernet Interface Driver (ax88796.c)</title> |
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| 7 | <div class="qindex"><a class="qindex" href="main.html">Main Page</a> | <a class="qindex" href="modules.html">Modules</a> | <a class="qindex" href="annotated.html">Data Structures</a> | <a class="qindex" href="dirs.html">Directories</a> | <a class="qindex" href="files.html">File List</a> | <a class="qindex" href="functions.html">Data Fields</a> | <a class="qindex" href="globals.html">Globals</a> | <a class="qindex" href="pages.html">Related Pages</a></div> |
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| 8 | <h1>ASIX AX88796 Ethernet Interface Driver (ax88796.c)<br> |
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| 9 | <small> |
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| 10 | [<a class="el" href="group__network.html">Network Library</a>]</small> |
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| 11 | </h1><hr><a name="_details"></a><h2>Detailed Description</h2> |
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| 12 | <div class="fragment"><pre class="fragment"><span class="preprocessor"> #include "<a class="code" href="ax88796_8h.html">net/ax88796.h</a>"</span> |
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| 13 | </pre></div> <dl compact><dt><b>Overview</b></dt><dd>This driver provides initialization and transmit/receive functions for the ASIX AX88796 10/100Mb Ethernet Controller and PHY.</dd></dl> |
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| 14 | Based in part on code by Louis Beaudoin (www.embedded-creations.com). Thanks to Adam Dunkels and Louis Beaudoin for providing the initial structure in which to write this driver. |
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| 15 | <p> |
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| 16 | <table border="0" cellpadding="0" cellspacing="0"> |
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| 17 | <tr><td></td></tr> |
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| 18 | <tr><td colspan="2"><br><h2>Defines</h2></td></tr> |
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| 19 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga15" doxytag="ax88796::nop"></a> |
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| 20 | #define </td><td class="memItemRight" valign="bottom"><b>nop</b>() asm volatile ("nop")</td></tr> |
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| 21 | |||
| 22 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga16" doxytag="ax88796::CR"></a> |
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| 23 | #define </td><td class="memItemRight" valign="bottom"><b>CR</b> 0x00</td></tr> |
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| 24 | |||
| 25 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga17" doxytag="ax88796::PSTART"></a> |
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| 26 | #define </td><td class="memItemRight" valign="bottom"><b>PSTART</b> 0x01</td></tr> |
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| 27 | |||
| 28 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga18" doxytag="ax88796::PSTOP"></a> |
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| 29 | #define </td><td class="memItemRight" valign="bottom"><b>PSTOP</b> 0x02</td></tr> |
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| 30 | |||
| 31 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga19" doxytag="ax88796::BNRY"></a> |
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| 32 | #define </td><td class="memItemRight" valign="bottom"><b>BNRY</b> 0x03</td></tr> |
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| 33 | |||
| 34 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga20" doxytag="ax88796::RDMAPORT"></a> |
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| 35 | #define </td><td class="memItemRight" valign="bottom"><b>RDMAPORT</b> 0x10</td></tr> |
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| 36 | |||
| 37 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga21" doxytag="ax88796::MEMR"></a> |
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| 38 | #define </td><td class="memItemRight" valign="bottom"><b>MEMR</b> 0x14</td></tr> |
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| 39 | |||
| 40 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga22" doxytag="ax88796::TR"></a> |
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| 41 | #define </td><td class="memItemRight" valign="bottom"><b>TR</b> 0x15</td></tr> |
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| 42 | |||
| 43 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga23" doxytag="ax88796::SPP_DPR"></a> |
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| 44 | #define </td><td class="memItemRight" valign="bottom"><b>SPP_DPR</b> 0x18</td></tr> |
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| 45 | |||
| 46 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga24" doxytag="ax88796::SSP_SPR"></a> |
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| 47 | #define </td><td class="memItemRight" valign="bottom"><b>SSP_SPR</b> 0x19</td></tr> |
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| 48 | |||
| 49 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga25" doxytag="ax88796::SSP_CPR"></a> |
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| 50 | #define </td><td class="memItemRight" valign="bottom"><b>SSP_CPR</b> 0x1A</td></tr> |
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| 51 | |||
| 52 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga26" doxytag="ax88796::TSR"></a> |
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| 53 | #define </td><td class="memItemRight" valign="bottom"><b>TSR</b> 0x04</td></tr> |
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| 54 | |||
| 55 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga27" doxytag="ax88796::NCR"></a> |
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| 56 | #define </td><td class="memItemRight" valign="bottom"><b>NCR</b> 0x05</td></tr> |
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| 57 | |||
| 58 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga28" doxytag="ax88796::ISR"></a> |
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| 59 | #define </td><td class="memItemRight" valign="bottom"><b>ISR</b> 0x07</td></tr> |
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| 60 | |||
| 61 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga29" doxytag="ax88796::CRDA0"></a> |
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| 62 | #define </td><td class="memItemRight" valign="bottom"><b>CRDA0</b> 0x08</td></tr> |
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| 63 | |||
| 64 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga30" doxytag="ax88796::CRDA1"></a> |
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| 65 | #define </td><td class="memItemRight" valign="bottom"><b>CRDA1</b> 0x09</td></tr> |
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| 66 | |||
| 67 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga31" doxytag="ax88796::RSR"></a> |
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| 68 | #define </td><td class="memItemRight" valign="bottom"><b>RSR</b> 0x0C</td></tr> |
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| 69 | |||
| 70 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga32" doxytag="ax88796::CNTR0"></a> |
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| 71 | #define </td><td class="memItemRight" valign="bottom"><b>CNTR0</b> 0x0D</td></tr> |
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| 72 | |||
| 73 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga33" doxytag="ax88796::CNTR1"></a> |
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| 74 | #define </td><td class="memItemRight" valign="bottom"><b>CNTR1</b> 0x0E</td></tr> |
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| 75 | |||
| 76 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga34" doxytag="ax88796::CNTR2"></a> |
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| 77 | #define </td><td class="memItemRight" valign="bottom"><b>CNTR2</b> 0x0F</td></tr> |
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| 78 | |||
| 79 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga35" doxytag="ax88796::GPI"></a> |
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| 80 | #define </td><td class="memItemRight" valign="bottom"><b>GPI</b> 0x17</td></tr> |
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| 81 | |||
| 82 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga36" doxytag="ax88796::RSTPORT"></a> |
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| 83 | #define </td><td class="memItemRight" valign="bottom"><b>RSTPORT</b> 0x1F</td></tr> |
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| 84 | |||
| 85 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga37" doxytag="ax88796::TPSR"></a> |
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| 86 | #define </td><td class="memItemRight" valign="bottom"><b>TPSR</b> 0x04</td></tr> |
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| 87 | |||
| 88 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga38" doxytag="ax88796::TBCR0"></a> |
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| 89 | #define </td><td class="memItemRight" valign="bottom"><b>TBCR0</b> 0x05</td></tr> |
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| 90 | |||
| 91 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga39" doxytag="ax88796::TBCR1"></a> |
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| 92 | #define </td><td class="memItemRight" valign="bottom"><b>TBCR1</b> 0x06</td></tr> |
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| 93 | |||
| 94 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga40" doxytag="ax88796::RSAR0"></a> |
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| 95 | #define </td><td class="memItemRight" valign="bottom"><b>RSAR0</b> 0x08</td></tr> |
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| 96 | |||
| 97 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga41" doxytag="ax88796::RSAR1"></a> |
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| 98 | #define </td><td class="memItemRight" valign="bottom"><b>RSAR1</b> 0x09</td></tr> |
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| 99 | |||
| 100 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga42" doxytag="ax88796::RBCR0"></a> |
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| 101 | #define </td><td class="memItemRight" valign="bottom"><b>RBCR0</b> 0x0A</td></tr> |
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| 102 | |||
| 103 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga43" doxytag="ax88796::RBCR1"></a> |
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| 104 | #define </td><td class="memItemRight" valign="bottom"><b>RBCR1</b> 0x0B</td></tr> |
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| 105 | |||
| 106 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga44" doxytag="ax88796::RCR"></a> |
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| 107 | #define </td><td class="memItemRight" valign="bottom"><b>RCR</b> 0x0C</td></tr> |
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| 108 | |||
| 109 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga45" doxytag="ax88796::TCR"></a> |
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| 110 | #define </td><td class="memItemRight" valign="bottom"><b>TCR</b> 0x0D</td></tr> |
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| 111 | |||
| 112 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga46" doxytag="ax88796::DCR"></a> |
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| 113 | #define </td><td class="memItemRight" valign="bottom"><b>DCR</b> 0x0E</td></tr> |
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| 114 | |||
| 115 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga47" doxytag="ax88796::IMR"></a> |
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| 116 | #define </td><td class="memItemRight" valign="bottom"><b>IMR</b> 0x0F</td></tr> |
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| 117 | |||
| 118 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga48" doxytag="ax88796::GPOC"></a> |
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| 119 | #define </td><td class="memItemRight" valign="bottom"><b>GPOC</b> 0x17</td></tr> |
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| 120 | |||
| 121 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga49" doxytag="ax88796::PAR0"></a> |
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| 122 | #define </td><td class="memItemRight" valign="bottom"><b>PAR0</b> 0x01</td></tr> |
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| 123 | |||
| 124 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga50" doxytag="ax88796::PAR1"></a> |
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| 125 | #define </td><td class="memItemRight" valign="bottom"><b>PAR1</b> 0x02</td></tr> |
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| 126 | |||
| 127 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga51" doxytag="ax88796::PAR2"></a> |
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| 128 | #define </td><td class="memItemRight" valign="bottom"><b>PAR2</b> 0x03</td></tr> |
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| 129 | |||
| 130 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga52" doxytag="ax88796::PAR3"></a> |
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| 131 | #define </td><td class="memItemRight" valign="bottom"><b>PAR3</b> 0x04</td></tr> |
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| 132 | |||
| 133 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga53" doxytag="ax88796::PAR4"></a> |
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| 134 | #define </td><td class="memItemRight" valign="bottom"><b>PAR4</b> 0x05</td></tr> |
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| 135 | |||
| 136 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga54" doxytag="ax88796::PAR5"></a> |
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| 137 | #define </td><td class="memItemRight" valign="bottom"><b>PAR5</b> 0x06</td></tr> |
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| 138 | |||
| 139 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga55" doxytag="ax88796::CURR"></a> |
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| 140 | #define </td><td class="memItemRight" valign="bottom"><b>CURR</b> 0x07</td></tr> |
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| 141 | |||
| 142 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga56" doxytag="ax88796::CPR"></a> |
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| 143 | #define </td><td class="memItemRight" valign="bottom"><b>CPR</b> 0x07</td></tr> |
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| 144 | |||
| 145 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga57" doxytag="ax88796::PS1"></a> |
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| 146 | #define </td><td class="memItemRight" valign="bottom"><b>PS1</b> 0x80</td></tr> |
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| 147 | |||
| 148 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga58" doxytag="ax88796::PS0"></a> |
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| 149 | #define </td><td class="memItemRight" valign="bottom"><b>PS0</b> 0x40</td></tr> |
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| 150 | |||
| 151 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga59" doxytag="ax88796::RD2"></a> |
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| 152 | #define </td><td class="memItemRight" valign="bottom"><b>RD2</b> 0x20</td></tr> |
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| 153 | |||
| 154 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga60" doxytag="ax88796::RD1"></a> |
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| 155 | #define </td><td class="memItemRight" valign="bottom"><b>RD1</b> 0x10</td></tr> |
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| 156 | |||
| 157 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga61" doxytag="ax88796::RD0"></a> |
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| 158 | #define </td><td class="memItemRight" valign="bottom"><b>RD0</b> 0x08</td></tr> |
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| 159 | |||
| 160 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga62" doxytag="ax88796::TXP"></a> |
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| 161 | #define </td><td class="memItemRight" valign="bottom"><b>TXP</b> 0x04</td></tr> |
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| 162 | |||
| 163 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga63" doxytag="ax88796::START"></a> |
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| 164 | #define </td><td class="memItemRight" valign="bottom"><b>START</b> 0x02</td></tr> |
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| 165 | |||
| 166 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga64" doxytag="ax88796::STOP"></a> |
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| 167 | #define </td><td class="memItemRight" valign="bottom"><b>STOP</b> 0x01</td></tr> |
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| 168 | |||
| 169 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga65" doxytag="ax88796::INTT"></a> |
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| 170 | #define </td><td class="memItemRight" valign="bottom"><b>INTT</b> 0x40</td></tr> |
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| 171 | |||
| 172 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga66" doxytag="ax88796::MON"></a> |
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| 173 | #define </td><td class="memItemRight" valign="bottom"><b>MON</b> 0x20</td></tr> |
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| 174 | |||
| 175 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga67" doxytag="ax88796::PRO"></a> |
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| 176 | #define </td><td class="memItemRight" valign="bottom"><b>PRO</b> 0x10</td></tr> |
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| 177 | |||
| 178 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga68" doxytag="ax88796::AM"></a> |
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| 179 | #define </td><td class="memItemRight" valign="bottom"><b>AM</b> 0x08</td></tr> |
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| 180 | |||
| 181 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga69" doxytag="ax88796::AB"></a> |
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| 182 | #define </td><td class="memItemRight" valign="bottom"><b>AB</b> 0x04</td></tr> |
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| 183 | |||
| 184 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga70" doxytag="ax88796::AR"></a> |
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| 185 | #define </td><td class="memItemRight" valign="bottom"><b>AR</b> 0x02</td></tr> |
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| 186 | |||
| 187 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga71" doxytag="ax88796::SEP"></a> |
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| 188 | #define </td><td class="memItemRight" valign="bottom"><b>SEP</b> 0x01</td></tr> |
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| 189 | |||
| 190 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga72" doxytag="ax88796::RST"></a> |
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| 191 | #define </td><td class="memItemRight" valign="bottom"><b>RST</b> 0x80</td></tr> |
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| 192 | |||
| 193 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga73" doxytag="ax88796::RDC"></a> |
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| 194 | #define </td><td class="memItemRight" valign="bottom"><b>RDC</b> 0x40</td></tr> |
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| 195 | |||
| 196 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga74" doxytag="ax88796::OVW"></a> |
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| 197 | #define </td><td class="memItemRight" valign="bottom"><b>OVW</b> 0x10</td></tr> |
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| 198 | |||
| 199 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga75" doxytag="ax88796::RXE"></a> |
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| 200 | #define </td><td class="memItemRight" valign="bottom"><b>RXE</b> 0x08</td></tr> |
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| 201 | |||
| 202 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga76" doxytag="ax88796::TXE"></a> |
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| 203 | #define </td><td class="memItemRight" valign="bottom"><b>TXE</b> 0x04</td></tr> |
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| 204 | |||
| 205 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga77" doxytag="ax88796::PTX"></a> |
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| 206 | #define </td><td class="memItemRight" valign="bottom"><b>PTX</b> 0x02</td></tr> |
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| 207 | |||
| 208 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga78" doxytag="ax88796::PRX"></a> |
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| 209 | #define </td><td class="memItemRight" valign="bottom"><b>PRX</b> 0x01</td></tr> |
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| 210 | |||
| 211 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga79" doxytag="ax88796::AUTOD"></a> |
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| 212 | #define </td><td class="memItemRight" valign="bottom"><b>AUTOD</b> 0x01</td></tr> |
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| 213 | |||
| 214 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga80" doxytag="ax88796::RST_B"></a> |
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| 215 | #define </td><td class="memItemRight" valign="bottom"><b>RST_B</b> 0x02</td></tr> |
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| 216 | |||
| 217 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga81" doxytag="ax88796::RST_10B"></a> |
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| 218 | #define </td><td class="memItemRight" valign="bottom"><b>RST_10B</b> 0x04</td></tr> |
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| 219 | |||
| 220 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga82" doxytag="ax88796::RST_TXB"></a> |
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| 221 | #define </td><td class="memItemRight" valign="bottom"><b>RST_TXB</b> 0x08</td></tr> |
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| 222 | |||
| 223 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga83" doxytag="ax88796::GPO0"></a> |
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| 224 | #define </td><td class="memItemRight" valign="bottom"><b>GPO0</b> 0x01</td></tr> |
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| 225 | |||
| 226 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga84" doxytag="ax88796::MPSEL"></a> |
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| 227 | #define </td><td class="memItemRight" valign="bottom"><b>MPSEL</b> 0x10</td></tr> |
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| 228 | |||
| 229 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga85" doxytag="ax88796::MPSET"></a> |
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| 230 | #define </td><td class="memItemRight" valign="bottom"><b>MPSET</b> 0x20</td></tr> |
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| 231 | |||
| 232 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga86" doxytag="ax88796::PPDSET"></a> |
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| 233 | #define </td><td class="memItemRight" valign="bottom"><b>PPDSET</b> 0x40</td></tr> |
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| 234 | |||
| 235 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga87" doxytag="ax88796::MDC"></a> |
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| 236 | #define </td><td class="memItemRight" valign="bottom"><b>MDC</b> 0x01</td></tr> |
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| 237 | |||
| 238 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga88" doxytag="ax88796::MDIR"></a> |
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| 239 | #define </td><td class="memItemRight" valign="bottom"><b>MDIR</b> 0x02</td></tr> |
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| 240 | |||
| 241 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga89" doxytag="ax88796::MDI"></a> |
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| 242 | #define </td><td class="memItemRight" valign="bottom"><b>MDI</b> 0x04</td></tr> |
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| 243 | |||
| 244 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga90" doxytag="ax88796::MDO"></a> |
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| 245 | #define </td><td class="memItemRight" valign="bottom"><b>MDO</b> 0x08</td></tr> |
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| 246 | |||
| 247 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga91" doxytag="ax88796::EECS"></a> |
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| 248 | #define </td><td class="memItemRight" valign="bottom"><b>EECS</b> 0x10</td></tr> |
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| 249 | |||
| 250 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga92" doxytag="ax88796::EEI"></a> |
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| 251 | #define </td><td class="memItemRight" valign="bottom"><b>EEI</b> 0x20</td></tr> |
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| 252 | |||
| 253 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga93" doxytag="ax88796::EEO"></a> |
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| 254 | #define </td><td class="memItemRight" valign="bottom"><b>EEO</b> 0x40</td></tr> |
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| 255 | |||
| 256 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga94" doxytag="ax88796::EECLK"></a> |
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| 257 | #define </td><td class="memItemRight" valign="bottom"><b>EECLK</b> 0x80</td></tr> |
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| 258 | |||
| 259 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga95" doxytag="ax88796::GPI2"></a> |
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| 260 | #define </td><td class="memItemRight" valign="bottom"><b>GPI2</b> 0x40</td></tr> |
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| 261 | |||
| 262 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga96" doxytag="ax88796::GPI1"></a> |
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| 263 | #define </td><td class="memItemRight" valign="bottom"><b>GPI1</b> 0x20</td></tr> |
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| 264 | |||
| 265 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga97" doxytag="ax88796::GPI0"></a> |
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| 266 | #define </td><td class="memItemRight" valign="bottom"><b>GPI0</b> 0x10</td></tr> |
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| 267 | |||
| 268 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga98" doxytag="ax88796::I_SPD"></a> |
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| 269 | #define </td><td class="memItemRight" valign="bottom"><b>I_SPD</b> 0x04</td></tr> |
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| 270 | |||
| 271 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga99" doxytag="ax88796::I_DPX"></a> |
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| 272 | #define </td><td class="memItemRight" valign="bottom"><b>I_DPX</b> 0x02</td></tr> |
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| 273 | |||
| 274 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga100" doxytag="ax88796::I_LINK"></a> |
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| 275 | #define </td><td class="memItemRight" valign="bottom"><b>I_LINK</b> 0x01</td></tr> |
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| 276 | |||
| 277 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga101" doxytag="ax88796::FDU"></a> |
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| 278 | #define </td><td class="memItemRight" valign="bottom"><b>FDU</b> 0x80</td></tr> |
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| 279 | |||
| 280 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga102" doxytag="ax88796::PD"></a> |
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| 281 | #define </td><td class="memItemRight" valign="bottom"><b>PD</b> 0x40</td></tr> |
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| 282 | |||
| 283 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga103" doxytag="ax88796::RLO"></a> |
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| 284 | #define </td><td class="memItemRight" valign="bottom"><b>RLO</b> 0x20</td></tr> |
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| 285 | |||
| 286 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga104" doxytag="ax88796::LB1"></a> |
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| 287 | #define </td><td class="memItemRight" valign="bottom"><b>LB1</b> 0x04</td></tr> |
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| 288 | |||
| 289 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga105" doxytag="ax88796::LB0"></a> |
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| 290 | #define </td><td class="memItemRight" valign="bottom"><b>LB0</b> 0x02</td></tr> |
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| 291 | |||
| 292 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga106" doxytag="ax88796::CRC"></a> |
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| 293 | #define </td><td class="memItemRight" valign="bottom"><b>CRC</b> 0x01</td></tr> |
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| 294 | |||
| 295 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga107" doxytag="ax88796::RCR_INIT"></a> |
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| 296 | #define </td><td class="memItemRight" valign="bottom"><b>RCR_INIT</b> (INTT | AB)</td></tr> |
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| 297 | |||
| 298 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga108" doxytag="ax88796::DCR_INIT"></a> |
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| 299 | #define </td><td class="memItemRight" valign="bottom"><b>DCR_INIT</b> 0x00</td></tr> |
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| 300 | |||
| 301 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga109" doxytag="ax88796::TCR_INIT"></a> |
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| 302 | #define </td><td class="memItemRight" valign="bottom"><b>TCR_INIT</b> 0x00</td></tr> |
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| 303 | |||
| 304 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga110" doxytag="ax88796::IMR_INIT"></a> |
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| 305 | #define </td><td class="memItemRight" valign="bottom"><b>IMR_INIT</b> 0x11</td></tr> |
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| 306 | |||
| 307 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga111" doxytag="ax88796::TXSTART_INIT"></a> |
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| 308 | #define </td><td class="memItemRight" valign="bottom"><b>TXSTART_INIT</b> 0x40</td></tr> |
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| 309 | |||
| 310 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga112" doxytag="ax88796::RXSTART_INIT"></a> |
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| 311 | #define </td><td class="memItemRight" valign="bottom"><b>RXSTART_INIT</b> 0x46</td></tr> |
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| 312 | |||
| 313 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga113" doxytag="ax88796::RXSTOP_INIT"></a> |
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| 314 | #define </td><td class="memItemRight" valign="bottom"><b>RXSTOP_INIT</b> 0x60</td></tr> |
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| 315 | |||
| 316 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga114" doxytag="ax88796::ETHERNET_MIN_PACKET_LENGTH"></a> |
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| 317 | #define </td><td class="memItemRight" valign="bottom"><b>ETHERNET_MIN_PACKET_LENGTH</b> 0x3C</td></tr> |
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| 318 | |||
| 319 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga115" doxytag="ax88796::PKTHEADER_STATUS"></a> |
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| 320 | #define </td><td class="memItemRight" valign="bottom"><b>PKTHEADER_STATUS</b> 0x00</td></tr> |
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| 321 | |||
| 322 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga116" doxytag="ax88796::PKTHEADER_NEXTPAGE"></a> |
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| 323 | #define </td><td class="memItemRight" valign="bottom"><b>PKTHEADER_NEXTPAGE</b> 0x01</td></tr> |
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| 324 | |||
| 325 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga117" doxytag="ax88796::PKTHEADER_PKTLENL"></a> |
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| 326 | #define </td><td class="memItemRight" valign="bottom"><b>PKTHEADER_PKTLENL</b> 0x02</td></tr> |
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| 327 | |||
| 328 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga118" doxytag="ax88796::PKTHEADER_PKTLENH"></a> |
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| 329 | #define </td><td class="memItemRight" valign="bottom"><b>PKTHEADER_PKTLENH</b> 0x03</td></tr> |
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| 330 | |||
| 331 | <tr><td colspan="2"><br><h2>Functions</h2></td></tr> |
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| 332 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga0" doxytag="ax88796::ax88796SetupPorts"></a> |
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| 333 | void </td><td class="memItemRight" valign="bottom"><b>ax88796SetupPorts</b> (void)</td></tr> |
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| 334 | |||
| 335 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga1" doxytag="ax88796::ax88796Read"></a> |
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| 336 | u08 </td><td class="memItemRight" valign="bottom"><b>ax88796Read</b> (u08 address)</td></tr> |
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| 337 | |||
| 338 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga2" doxytag="ax88796::ax88796Write"></a> |
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| 339 | void </td><td class="memItemRight" valign="bottom"><b>ax88796Write</b> (u08 address, u08 data)</td></tr> |
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| 340 | |||
| 341 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga3" doxytag="ax88796::ax88796Init"></a> |
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| 342 | void </td><td class="memItemRight" valign="bottom"><b>ax88796Init</b> (void)</td></tr> |
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| 343 | |||
| 344 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga4" doxytag="ax88796::ax88796BeginPacketSend"></a> |
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| 345 | void </td><td class="memItemRight" valign="bottom"><b>ax88796BeginPacketSend</b> (unsigned int packetLength)</td></tr> |
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| 346 | |||
| 347 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga5" doxytag="ax88796::ax88796SendPacketData"></a> |
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| 348 | void </td><td class="memItemRight" valign="bottom"><b>ax88796SendPacketData</b> (unsigned char *localBuffer, unsigned int length)</td></tr> |
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| 349 | |||
| 350 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga6" doxytag="ax88796::ax88796EndPacketSend"></a> |
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| 351 | void </td><td class="memItemRight" valign="bottom"><b>ax88796EndPacketSend</b> (void)</td></tr> |
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| 352 | |||
| 353 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga7" doxytag="ax88796::ax88796BeginPacketRetreive"></a> |
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| 354 | unsigned int </td><td class="memItemRight" valign="bottom"><b>ax88796BeginPacketRetreive</b> (void)</td></tr> |
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| 355 | |||
| 356 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga8" doxytag="ax88796::ax88796RetreivePacketData"></a> |
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| 357 | void </td><td class="memItemRight" valign="bottom"><b>ax88796RetreivePacketData</b> (unsigned char *localBuffer, unsigned int length)</td></tr> |
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| 358 | |||
| 359 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga9" doxytag="ax88796::ax88796EndPacketRetreive"></a> |
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| 360 | void </td><td class="memItemRight" valign="bottom"><b>ax88796EndPacketRetreive</b> (void)</td></tr> |
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| 361 | |||
| 362 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga10" doxytag="ax88796::ax88796ProcessInterrupt"></a> |
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| 363 | void </td><td class="memItemRight" valign="bottom"><b>ax88796ProcessInterrupt</b> (void)</td></tr> |
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| 364 | |||
| 365 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga11" doxytag="ax88796::ax88796ReceiveOverflowRecover"></a> |
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| 366 | void </td><td class="memItemRight" valign="bottom"><b>ax88796ReceiveOverflowRecover</b> (void)</td></tr> |
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| 367 | |||
| 368 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga12" doxytag="ax88796::ax88796WriteMii"></a> |
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| 369 | void </td><td class="memItemRight" valign="bottom"><b>ax88796WriteMii</b> (unsigned char phyad, unsigned char regad, unsigned int mii_data)</td></tr> |
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| 370 | |||
| 371 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga13" doxytag="ax88796::ax88796ReadMii"></a> |
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| 372 | unsigned int </td><td class="memItemRight" valign="bottom"><b>ax88796ReadMii</b> (unsigned char phyad, unsigned char regad)</td></tr> |
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| 373 | |||
| 374 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="ga14" doxytag="ax88796::ax88796RegDump"></a> |
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| 375 | void </td><td class="memItemRight" valign="bottom"><b>ax88796RegDump</b> (void)</td></tr> |
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| 376 | |||
| 377 | </table> |
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| 378 | <hr size="1"><address style="align: right;"><small>Generated on Sun Oct 29 03:41:09 2006 for Procyon AVRlib by |
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| 379 | <a href="http://www.doxygen.org/index.html"> |
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| 380 | <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.2 </small></address> |
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| 381 | </body> |
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| 382 | </html> |
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