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Blame information for rev 6

Line No.	Rev	Author	Line
1	6	kaklik	`/! \file encoderconf.h \brief Quadrature Encoder driver configuration. /`
2			`//*****************************************************************************`
3			`//`
4			`// File Name : 'encoderconf.h'`
5			`// Title : Quadrature Encoder driver configuration`
6			`// Author : Pascal Stang - Copyright (C) 2003-2004`
7			`// Created : 2003.01.26`
8			`// Revised : 2004.06.25`
9			`// Version : 0.2`
10			`// Target MCU : Atmel AVR Series`
11			`// Editor Tabs : 4`
12			`//`
13			`// The default number of encoders supported is 2 because most AVR processors`
14			`// have two external interrupts. To use more or fewer encoders, you must do`
15			`// four things:`
16			`//`
17			`// 1. Use a processor with at least as many external interrutps as number of`
18			`// encoders you want to have.`
19			`// 2. Set NUM_ENCODERS to the number of encoders you will use.`
20			`// 3. Comment/Uncomment the proper ENCx_SIGNAL defines for your encoders`
21			`// (the encoders must be used sequentially, 0 then 1 then 2 then 3)`
22			`// 4. Configure the various defines so that they match your processor and`
23			`// specific hardware. The notes below may help.`
24			`//`
25			`//`
26			`// -------------------- NOTES --------------------`
27			`// The external interrupt pins are mapped as follows on most AVR processors:`
28			`// (90s8515, mega161, mega163, mega323, mega16, mega32, etc)`
29			`//`
30			`// INT0 -> PD2 (PORTD, pin 2)`
31			`// INT1 -> PD3 (PORTD, pin 3)`
32			`//`
33			`// The external interrupt pins on the processors mega128 and mega64 are:`
34			`//`
35			`// INT0 -> PD0 (PORTD, pin 0)`
36			`// INT1 -> PD1 (PORTD, pin 1)`
37			`// INT2 -> PD2 (PORTD, pin 2)`
38			`// INT3 -> PD3 (PORTD, pin 3)`
39			`// INT4 -> PE4 (PORTE, pin 4)`
40			`// INT5 -> PE5 (PORTE, pin 5)`
41			`// INT6 -> PE6 (PORTE, pin 6)`
42			`// INT7 -> PE7 (PORTE, pin 7)`
43			`//`
44			`// This code is distributed under the GNU Public License`
45			`// which can be found at http://www.gnu.org/licenses/gpl.txt`
46			`//`
47			`//*****************************************************************************`
48
49			`#ifndef ENCODERCONF_H`
50			`#define ENCODERCONF_H`
51
52			`// constants/macros/typdefs`
53
54			`// defines for processor compatibility`
55			`// quick compatiblity for mega128, mega64`
56			`//#ifndef MCUCR`
57			`// #define MCUCR EICRA`
58			`//#endif`
59
60			`// Set the total number of encoders you wish to support`
61			`#define NUM_ENCODERS 2`
62
63
64			`// -------------------- Encoder 0 connections --------------------`
65			`// Phase A quadrature encoder output should connect to this interrupt line:`
66			`// *** NOTE: the choice of interrupt PORT, DDR, and PIN must match the external`
67			`// interrupt you are using on your processor. Consult the External Interrupts`
68			`// section of your processor's datasheet for more information.`
69
70			`// Interrupt Configuration`
71			`#define ENC0_SIGNAL SIG_INTERRUPT0 // Interrupt signal name`
72			`#define ENC0_INT INT0 // matching INTx bit in GIMSK/EIMSK`
73			`#define ENC0_ICR MCUCR // matching Int. Config Register (MCUCR,EICRA/B)`
74			`#define ENC0_ISCX0 ISC00 // matching Interrupt Sense Config bit0`
75			`#define ENC0_ISCX1 ISC01 // matching Interrupt Sense Config bit1`
76			`// PhaseA Port/Pin Configuration`
77			`// * PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" *`
78			`#define ENC0_PHASEA_PORT PORTD // PhaseA port register`
79			`#define ENC0_PHASEA_DDR DDRD // PhaseA port direction register`
80			`#define ENC0_PHASEA_PORTIN PIND // PhaseA port input register`
81			`#define ENC0_PHASEA_PIN PD2 // PhaseA port pin`
82			`// Phase B quadrature encoder output should connect to this direction line:`
83			`// * PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" *`
84			`#define ENC0_PHASEB_PORT PORTC // PhaseB port register`
85			`#define ENC0_PHASEB_DDR DDRC // PhaseB port direction register`
86			`#define ENC0_PHASEB_PORTIN PINC // PhaseB port input register`
87			`#define ENC0_PHASEB_PIN PC0 // PhaseB port pin`
88
89
90			`// -------------------- Encoder 1 connections --------------------`
91			`// Phase A quadrature encoder output should connect to this interrupt line:`
92			`// *** NOTE: the choice of interrupt pin and port must match the external`
93			`// interrupt you are using on your processor. Consult the External Interrupts`
94			`// section of your processor's datasheet for more information.`
95
96			`// Interrupt Configuration`
97			`#define ENC1_SIGNAL SIG_INTERRUPT1 // Interrupt signal name`
98			`#define ENC1_INT INT1 // matching INTx bit in GIMSK/EIMSK`
99			`#define ENC1_ICR MCUCR // matching Int. Config Register (MCUCR,EICRA/B)`
100			`#define ENC1_ISCX0 ISC10 // matching Interrupt Sense Config bit0`
101			`#define ENC1_ISCX1 ISC11 // matching Interrupt Sense Config bit1`
102			`// PhaseA Port/Pin Configuration`
103			`// * PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" *`
104			`#define ENC1_PHASEA_PORT PORTD // PhaseA port register`
105			`#define ENC1_PHASEA_PORTIN PIND // PhaseA port input register`
106			`#define ENC1_PHASEA_DDR DDRD // PhaseA port direction register`
107			`#define ENC1_PHASEA_PIN PD3 // PhaseA port pin`
108			`// Phase B quadrature encoder output should connect to this direction line:`
109			`// * PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" *`
110			`#define ENC1_PHASEB_PORT PORTC // PhaseB port register`
111			`#define ENC1_PHASEB_DDR DDRC // PhaseB port direction register`
112			`#define ENC1_PHASEB_PORTIN PINC // PhaseB port input register`
113			`#define ENC1_PHASEB_PIN PC1 // PhaseB port pin`
114
115
116			`// -------------------- Encoder 2 connections --------------------`
117			`// Phase A quadrature encoder output should connect to this interrupt line:`
118			`// *** NOTE: the choice of interrupt pin and port must match the external`
119			`// interrupt you are using on your processor. Consult the External Interrupts`
120			`// section of your processor's datasheet for more information.`
121
122			`// Interrupt Configuration`
123			`//#define ENC2_SIGNAL SIG_INTERRUPT6 // Interrupt signal name`
124			`#define ENC2_INT INT6 // matching INTx bit in GIMSK/EIMSK`
125			`#define ENC2_ICR EICRB // matching Int. Config Register (MCUCR,EICRA/B)`
126			`#define ENC2_ISCX0 ISC60 // matching Interrupt Sense Config bit0`
127			`#define ENC2_ISCX1 ISC61 // matching Interrupt Sense Config bit1`
128			`// PhaseA Port/Pin Configuration`
129			`// * PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" *`
130			`#define ENC2_PHASEA_PORT PORTE // PhaseA port register`
131			`#define ENC2_PHASEA_PORTIN PINE // PhaseA port input register`
132			`#define ENC2_PHASEA_DDR DDRE // PhaseA port direction register`
133			`#define ENC2_PHASEA_PIN PE6 // PhaseA port pin`
134			`// Phase B quadrature encoder output should connect to this direction line:`
135			`// * PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" *`
136			`#define ENC2_PHASEB_PORT PORTC // PhaseB port register`
137			`#define ENC2_PHASEB_DDR DDRC // PhaseB port direction register`
138			`#define ENC2_PHASEB_PORTIN PINC // PhaseB port input register`
139			`#define ENC2_PHASEB_PIN PC2 // PhaseB port pin`
140
141
142			`// -------------------- Encoder 3 connections --------------------`
143			`// Phase A quadrature encoder output should connect to this interrupt line:`
144			`// *** NOTE: the choice of interrupt pin and port must match the external`
145			`// interrupt you are using on your processor. Consult the External Interrupts`
146			`// section of your processor's datasheet for more information.`
147
148			`// Interrupt Configuration`
149			`//#define ENC3_SIGNAL SIG_INTERRUPT7 // Interrupt signal name`
150			`#define ENC3_INT INT7 // matching INTx bit in GIMSK/EIMSK`
151			`#define ENC3_ICR EICRB // matching Int. Config Register (MCUCR,EICRA/B)`
152			`#define ENC3_ISCX0 ISC70 // matching Interrupt Sense Config bit0`
153			`#define ENC3_ISCX1 ISC71 // matching Interrupt Sense Config bit1`
154			`// PhaseA Port/Pin Configuration`
155			`// * PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" *`
156			`#define ENC3_PHASEA_PORT PORTE // PhaseA port register`
157			`#define ENC3_PHASEA_PORTIN PINE // PhaseA port input register`
158			`#define ENC3_PHASEA_DDR DDRE // PhaseA port direction register`
159			`#define ENC3_PHASEA_PIN PE7 // PhaseA port pin`
160			`// Phase B quadrature encoder output should connect to this direction line:`
161			`// * PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" *`
162			`#define ENC3_PHASEB_PORT PORTC // PhaseB port register`
163			`#define ENC3_PHASEB_DDR DDRC // PhaseB port direction register`
164			`#define ENC3_PHASEB_PORTIN PINC // PhaseB port input register`
165			`#define ENC3_PHASEB_PIN PC3 // PhaseB port pin`
166
167			`#endif`