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Blame information for rev 6

Line No. Rev Author Line
1 6 kaklik /*! \file rtl8019conf.h \brief Realtek RTL8019AS Ethernet Interface Driver Configuration. */
2 //*****************************************************************************
3 //
4 // File Name : 'rtl8019conf.h'
5 // Title : Realtek RTL8019AS Ethernet Interface Driver Configuration
6 // Author : Pascal Stang
7 // Created : 10/5/2004
8 // Revised : 8/22/2005
9 // Version : 0.1
10 // Target MCU : Atmel AVR series
11 // Editor Tabs : 4
12 //
13 // Description : This driver provides initialization and transmit/receive
14 // functions for the RTL8019AS 10Mb Ethernet Controller and PHY.
15 //
16 // This code is distributed under the GNU Public License
17 // which can be found at http://www.gnu.org/licenses/gpl.txt
18 //
19 //*****************************************************************************
20  
21 #ifndef RTL8019CONF_H
22 #define RTL8019CONF_H
23  
24 // This driver supports an RTL8019 connected in memory-mapped or direct I/O mode.
25 //
26 #define GENERAL_IO 0
27 // Direct I/O mode assumes the NIC address, data, and control lines are
28 // connected directly to processor I/O pins. The memory-bus accesses are
29 // software emulated.
30 //
31 #define MEMORY_MAPPED 1
32 // Memory-mapped mode assumes that the NIC is connected the processor via
33 // the external memory bus, and that the NIC address space starts at the
34 // memory location RTL8019_MEMORY_MAPPED_OFFSET.
35 //
36 // In either mode, a seperate I/O pins is required for control of the NIC's
37 // hardware RESET line.
38  
39 // set the connection type used to communicate with the NIC
40 #define NIC_CONNECTION GENERAL_IO
41  
42  
43 #if NIC_CONNECTION != GENERAL_IO
44 // NIC is memory-mapped starting at this address
45 #define RTL8019_MEMORY_MAPPED_OFFSET 0x8000
46 #else // NIC Interface through General I/O
47 // RTL8019 address port
48 #define RTL8019_ADDRESS_PORT PORTB
49 #define RTL8019_ADDRESS_DDR DDRB
50 #define RTL8019_ADDRESS_MASK 0x1F
51 // RTL8019 data port
52 #define RTL8019_DATA_PORT PORTA
53 #define RTL8019_DATA_DDR DDRA
54 #define RTL8019_DATA_PIN PINA
55 // RTL8019 control port
56 #define RTL8019_CONTROL_PORT PORTD
57 #define RTL8019_CONTROL_DDR DDRD
58 #define RTL8019_CONTROL_READPIN 6
59 #define RTL8019_CONTROL_WRITEPIN 7
60 #endif
61  
62 // RTL8019 RESET pin
63 #define RTL8019_RESET_PORT PORTD
64 #define RTL8019_RESET_DDR DDRD
65 #define RTL8019_RESET_PIN 4
66  
67 // MAC address for this interface
68 #ifdef ETHADDR0
69 #define RTL8019_MAC0 ETHADDR0
70 #define RTL8019_MAC1 ETHADDR1
71 #define RTL8019_MAC2 ETHADDR2
72 #define RTL8019_MAC3 ETHADDR3
73 #define RTL8019_MAC4 ETHADDR4
74 #define RTL8019_MAC5 ETHADDR5
75 #else
76 #define RTL8019_MAC0 '0'
77 #define RTL8019_MAC1 'F'
78 #define RTL8019_MAC2 'F'
79 #define RTL8019_MAC3 'I'
80 #define RTL8019_MAC4 'C'
81 #define RTL8019_MAC5 'E'
82 #endif
83  
84 #endif
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