| Line No. | Rev | Author | Line |
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| 1 | 6 | kaklik | /*! \file rtl8019conf.h \brief Realtek RTL8019AS Ethernet Interface Driver Configuration. */ |
| 2 | //***************************************************************************** |
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| 3 | // |
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| 4 | // File Name : 'rtl8019conf.h' |
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| 5 | // Title : Realtek RTL8019AS Ethernet Interface Driver Configuration |
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| 6 | // Author : Pascal Stang |
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| 7 | // Created : 10/5/2004 |
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| 8 | // Revised : 8/22/2005 |
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| 9 | // Version : 0.1 |
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| 10 | // Target MCU : Atmel AVR series |
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| 11 | // Editor Tabs : 4 |
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| 12 | // |
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| 13 | // Description : This driver provides initialization and transmit/receive |
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| 14 | // functions for the RTL8019AS 10Mb Ethernet Controller and PHY. |
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| 15 | // |
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| 16 | // This code is distributed under the GNU Public License |
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| 17 | // which can be found at http://www.gnu.org/licenses/gpl.txt |
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| 18 | // |
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| 19 | //***************************************************************************** |
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| 20 | |||
| 21 | #ifndef RTL8019CONF_H |
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| 22 | #define RTL8019CONF_H |
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| 23 | |||
| 24 | // This driver supports an RTL8019 connected in memory-mapped or direct I/O mode. |
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| 25 | // |
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| 26 | #define GENERAL_IO 0 |
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| 27 | // Direct I/O mode assumes the NIC address, data, and control lines are |
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| 28 | // connected directly to processor I/O pins. The memory-bus accesses are |
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| 29 | // software emulated. |
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| 30 | // |
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| 31 | #define MEMORY_MAPPED 1 |
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| 32 | // Memory-mapped mode assumes that the NIC is connected the processor via |
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| 33 | // the external memory bus, and that the NIC address space starts at the |
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| 34 | // memory location RTL8019_MEMORY_MAPPED_OFFSET. |
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| 35 | // |
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| 36 | // In either mode, a seperate I/O pins is required for control of the NIC's |
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| 37 | // hardware RESET line. |
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| 38 | |||
| 39 | // set the connection type used to communicate with the NIC |
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| 40 | #define NIC_CONNECTION GENERAL_IO |
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| 41 | |||
| 42 | |||
| 43 | #if NIC_CONNECTION != GENERAL_IO |
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| 44 | // NIC is memory-mapped starting at this address |
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| 45 | #define RTL8019_MEMORY_MAPPED_OFFSET 0x8000 |
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| 46 | #else // NIC Interface through General I/O |
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| 47 | // RTL8019 address port |
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| 48 | #define RTL8019_ADDRESS_PORT PORTB |
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| 49 | #define RTL8019_ADDRESS_DDR DDRB |
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| 50 | #define RTL8019_ADDRESS_MASK 0x1F |
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| 51 | // RTL8019 data port |
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| 52 | #define RTL8019_DATA_PORT PORTA |
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| 53 | #define RTL8019_DATA_DDR DDRA |
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| 54 | #define RTL8019_DATA_PIN PINA |
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| 55 | // RTL8019 control port |
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| 56 | #define RTL8019_CONTROL_PORT PORTD |
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| 57 | #define RTL8019_CONTROL_DDR DDRD |
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| 58 | #define RTL8019_CONTROL_READPIN 6 |
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| 59 | #define RTL8019_CONTROL_WRITEPIN 7 |
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| 60 | #endif |
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| 61 | |||
| 62 | // RTL8019 RESET pin |
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| 63 | #define RTL8019_RESET_PORT PORTD |
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| 64 | #define RTL8019_RESET_DDR DDRD |
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| 65 | #define RTL8019_RESET_PIN 4 |
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| 66 | |||
| 67 | // MAC address for this interface |
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| 68 | #ifdef ETHADDR0 |
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| 69 | #define RTL8019_MAC0 ETHADDR0 |
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| 70 | #define RTL8019_MAC1 ETHADDR1 |
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| 71 | #define RTL8019_MAC2 ETHADDR2 |
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| 72 | #define RTL8019_MAC3 ETHADDR3 |
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| 73 | #define RTL8019_MAC4 ETHADDR4 |
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| 74 | #define RTL8019_MAC5 ETHADDR5 |
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| 75 | #else |
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| 76 | #define RTL8019_MAC0 '0' |
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| 77 | #define RTL8019_MAC1 'F' |
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| 78 | #define RTL8019_MAC2 'F' |
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| 79 | #define RTL8019_MAC3 'I' |
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| 80 | #define RTL8019_MAC4 'C' |
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| 81 | #define RTL8019_MAC5 'E' |
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| 82 | #endif |
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| 83 | |||
| 84 | #endif |
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