| Line No. | Rev | Author | Line |
|---|---|---|---|
| 1 | 6 | kaklik | /*! \file i2c.c \brief I2C interface using AVR Two-Wire Interface (TWI) hardware. */ |
| 2 | //***************************************************************************** |
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| 3 | // |
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| 4 | // File Name : 'i2c.c' |
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| 5 | // Title : I2C interface using AVR Two-Wire Interface (TWI) hardware |
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| 6 | // Author : Pascal Stang - Copyright (C) 2002-2003 |
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| 7 | // Created : 2002.06.25 |
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| 8 | // Revised : 2003.03.02 |
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| 9 | // Version : 0.9 |
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| 10 | // Target MCU : Atmel AVR series |
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| 11 | // Editor Tabs : 4 |
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| 12 | // |
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| 13 | // This code is distributed under the GNU Public License |
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| 14 | // which can be found at http://www.gnu.org/licenses/gpl.txt |
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| 15 | // |
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| 16 | //***************************************************************************** |
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| 17 | |||
| 18 | #include <avr/io.h> |
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| 19 | #include <avr/interrupt.h> |
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| 20 | |||
| 21 | #include "i2c.h" |
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| 22 | |||
| 23 | #include "rprintf.h" // include printf function library |
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| 24 | #include "uart2.h" |
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| 25 | |||
| 26 | // Standard I2C bit rates are: |
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| 27 | // 100KHz for slow speed |
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| 28 | // 400KHz for high speed |
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| 29 | |||
| 30 | //#define I2C_DEBUG |
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| 31 | |||
| 32 | // I2C state and address variables |
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| 33 | static volatile eI2cStateType I2cState; |
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| 34 | static u08 I2cDeviceAddrRW; |
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| 35 | // send/transmit buffer (outgoing data) |
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| 36 | static u08 I2cSendData[I2C_SEND_DATA_BUFFER_SIZE]; |
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| 37 | static u08 I2cSendDataIndex; |
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| 38 | static u08 I2cSendDataLength; |
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| 39 | // receive buffer (incoming data) |
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| 40 | static u08 I2cReceiveData[I2C_RECEIVE_DATA_BUFFER_SIZE]; |
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| 41 | static u08 I2cReceiveDataIndex; |
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| 42 | static u08 I2cReceiveDataLength; |
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| 43 | |||
| 44 | // function pointer to i2c receive routine |
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| 45 | //! I2cSlaveReceive is called when this processor |
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| 46 | // is addressed as a slave for writing |
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| 47 | static void (*i2cSlaveReceive)(u08 receiveDataLength, u08* recieveData); |
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| 48 | //! I2cSlaveTransmit is called when this processor |
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| 49 | // is addressed as a slave for reading |
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| 50 | static u08 (*i2cSlaveTransmit)(u08 transmitDataLengthMax, u08* transmitData); |
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| 51 | |||
| 52 | // functions |
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| 53 | void i2cInit(void) |
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| 54 | { |
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| 55 | // set pull-up resistors on I2C bus pins |
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| 56 | // TODO: should #ifdef these |
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| 57 | sbi(PORTC, 0); // i2c SCL on ATmega163,323,16,32,etc |
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| 58 | sbi(PORTC, 1); // i2c SDA on ATmega163,323,16,32,etc |
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| 59 | sbi(PORTD, 0); // i2c SCL on ATmega128,64 |
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| 60 | sbi(PORTD, 1); // i2c SDA on ATmega128,64 |
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| 61 | |||
| 62 | // clear SlaveReceive and SlaveTransmit handler to null |
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| 63 | i2cSlaveReceive = 0; |
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| 64 | i2cSlaveTransmit = 0; |
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| 65 | // set i2c bit rate to 100KHz |
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| 66 | i2cSetBitrate(100); |
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| 67 | // enable TWI (two-wire interface) |
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| 68 | sbi(TWCR, TWEN); |
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| 69 | // set state |
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| 70 | I2cState = I2C_IDLE; |
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| 71 | // enable TWI interrupt and slave address ACK |
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| 72 | sbi(TWCR, TWIE); |
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| 73 | sbi(TWCR, TWEA); |
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| 74 | //outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWEA)); |
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| 75 | // enable interrupts |
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| 76 | sei(); |
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| 77 | } |
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| 78 | |||
| 79 | void i2cSetBitrate(u16 bitrateKHz) |
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| 80 | { |
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| 81 | u08 bitrate_div; |
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| 82 | // set i2c bitrate |
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| 83 | // SCL freq = F_CPU/(16+2*TWBR)) |
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| 84 | #ifdef TWPS0 |
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| 85 | // for processors with additional bitrate division (mega128) |
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| 86 | // SCL freq = F_CPU/(16+2*TWBR*4^TWPS) |
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| 87 | // set TWPS to zero |
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| 88 | cbi(TWSR, TWPS0); |
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| 89 | cbi(TWSR, TWPS1); |
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| 90 | #endif |
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| 91 | // calculate bitrate division |
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| 92 | bitrate_div = ((F_CPU/1000l)/bitrateKHz); |
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| 93 | if(bitrate_div >= 16) |
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| 94 | bitrate_div = (bitrate_div-16)/2; |
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| 95 | outb(TWBR, bitrate_div); |
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| 96 | } |
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| 97 | |||
| 98 | void i2cSetLocalDeviceAddr(u08 deviceAddr, u08 genCallEn) |
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| 99 | { |
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| 100 | // set local device address (used in slave mode only) |
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| 101 | outb(TWAR, ((deviceAddr&0xFE) | (genCallEn?1:0)) ); |
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| 102 | } |
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| 103 | |||
| 104 | void i2cSetSlaveReceiveHandler(void (*i2cSlaveRx_func)(u08 receiveDataLength, u08* recieveData)) |
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| 105 | { |
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| 106 | i2cSlaveReceive = i2cSlaveRx_func; |
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| 107 | } |
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| 108 | |||
| 109 | void i2cSetSlaveTransmitHandler(u08 (*i2cSlaveTx_func)(u08 transmitDataLengthMax, u08* transmitData)) |
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| 110 | { |
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| 111 | i2cSlaveTransmit = i2cSlaveTx_func; |
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| 112 | } |
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| 113 | |||
| 114 | inline void i2cSendStart(void) |
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| 115 | { |
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| 116 | // send start condition |
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| 117 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWSTA)); |
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| 118 | } |
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| 119 | |||
| 120 | inline void i2cSendStop(void) |
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| 121 | { |
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| 122 | // transmit stop condition |
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| 123 | // leave with TWEA on for slave receiving |
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| 124 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWEA)|BV(TWSTO)); |
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| 125 | } |
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| 126 | |||
| 127 | inline void i2cWaitForComplete(void) |
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| 128 | { |
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| 129 | // wait for i2c interface to complete operation |
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| 130 | while( !(inb(TWCR) & BV(TWINT)) ); |
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| 131 | } |
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| 132 | |||
| 133 | inline void i2cSendByte(u08 data) |
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| 134 | { |
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| 135 | // save data to the TWDR |
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| 136 | outb(TWDR, data); |
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| 137 | // begin send |
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| 138 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)); |
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| 139 | } |
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| 140 | |||
| 141 | inline void i2cReceiveByte(u08 ackFlag) |
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| 142 | { |
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| 143 | // begin receive over i2c |
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| 144 | if( ackFlag ) |
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| 145 | { |
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| 146 | // ackFlag = TRUE: ACK the recevied data |
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| 147 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWEA)); |
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| 148 | } |
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| 149 | else |
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| 150 | { |
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| 151 | // ackFlag = FALSE: NACK the recevied data |
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| 152 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)); |
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| 153 | } |
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| 154 | } |
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| 155 | |||
| 156 | inline u08 i2cGetReceivedByte(void) |
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| 157 | { |
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| 158 | // retieve received data byte from i2c TWDR |
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| 159 | return( inb(TWDR) ); |
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| 160 | } |
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| 161 | |||
| 162 | inline u08 i2cGetStatus(void) |
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| 163 | { |
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| 164 | // retieve current i2c status from i2c TWSR |
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| 165 | return( inb(TWSR) ); |
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| 166 | } |
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| 167 | |||
| 168 | void i2cMasterSend(u08 deviceAddr, u08 length, u08* data) |
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| 169 | { |
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| 170 | u08 i; |
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| 171 | // wait for interface to be ready |
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| 172 | while(I2cState); |
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| 173 | // set state |
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| 174 | I2cState = I2C_MASTER_TX; |
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| 175 | // save data |
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| 176 | I2cDeviceAddrRW = (deviceAddr & 0xFE); // RW cleared: write operation |
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| 177 | for(i=0; i<length; i++) |
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| 178 | I2cSendData[i] = *data++; |
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| 179 | I2cSendDataIndex = 0; |
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| 180 | I2cSendDataLength = length; |
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| 181 | // send start condition |
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| 182 | i2cSendStart(); |
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| 183 | } |
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| 184 | |||
| 185 | void i2cMasterReceive(u08 deviceAddr, u08 length, u08* data) |
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| 186 | { |
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| 187 | u08 i; |
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| 188 | // wait for interface to be ready |
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| 189 | while(I2cState); |
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| 190 | // set state |
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| 191 | I2cState = I2C_MASTER_RX; |
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| 192 | // save data |
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| 193 | I2cDeviceAddrRW = (deviceAddr|0x01); // RW set: read operation |
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| 194 | I2cReceiveDataIndex = 0; |
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| 195 | I2cReceiveDataLength = length; |
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| 196 | // send start condition |
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| 197 | i2cSendStart(); |
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| 198 | // wait for data |
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| 199 | while(I2cState); |
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| 200 | // return data |
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| 201 | for(i=0; i<length; i++) |
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| 202 | *data++ = I2cReceiveData[i]; |
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| 203 | } |
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| 204 | |||
| 205 | u08 i2cMasterSendNI(u08 deviceAddr, u08 length, u08* data) |
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| 206 | { |
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| 207 | u08 retval = I2C_OK; |
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| 208 | |||
| 209 | // disable TWI interrupt |
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| 210 | cbi(TWCR, TWIE); |
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| 211 | |||
| 212 | // send start condition |
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| 213 | i2cSendStart(); |
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| 214 | i2cWaitForComplete(); |
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| 215 | |||
| 216 | // send device address with write |
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| 217 | i2cSendByte( deviceAddr & 0xFE ); |
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| 218 | i2cWaitForComplete(); |
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| 219 | |||
| 220 | // check if device is present and live |
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| 221 | if( inb(TWSR) == TW_MT_SLA_ACK) |
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| 222 | { |
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| 223 | // send data |
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| 224 | while(length) |
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| 225 | { |
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| 226 | i2cSendByte( *data++ ); |
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| 227 | i2cWaitForComplete(); |
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| 228 | length--; |
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| 229 | } |
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| 230 | } |
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| 231 | else |
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| 232 | { |
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| 233 | // device did not ACK it's address, |
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| 234 | // data will not be transferred |
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| 235 | // return error |
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| 236 | retval = I2C_ERROR_NODEV; |
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| 237 | } |
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| 238 | |||
| 239 | // transmit stop condition |
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| 240 | // leave with TWEA on for slave receiving |
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| 241 | i2cSendStop(); |
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| 242 | while( !(inb(TWCR) & BV(TWSTO)) ); |
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| 243 | |||
| 244 | // enable TWI interrupt |
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| 245 | sbi(TWCR, TWIE); |
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| 246 | |||
| 247 | return retval; |
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| 248 | } |
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| 249 | |||
| 250 | u08 i2cMasterReceiveNI(u08 deviceAddr, u08 length, u08 *data) |
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| 251 | { |
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| 252 | u08 retval = I2C_OK; |
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| 253 | |||
| 254 | // disable TWI interrupt |
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| 255 | cbi(TWCR, TWIE); |
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| 256 | |||
| 257 | // send start condition |
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| 258 | i2cSendStart(); |
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| 259 | i2cWaitForComplete(); |
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| 260 | |||
| 261 | // send device address with read |
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| 262 | i2cSendByte( deviceAddr | 0x01 ); |
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| 263 | i2cWaitForComplete(); |
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| 264 | |||
| 265 | // check if device is present and live |
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| 266 | if( inb(TWSR) == TW_MR_SLA_ACK) |
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| 267 | { |
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| 268 | // accept receive data and ack it |
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| 269 | while(length > 1) |
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| 270 | { |
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| 271 | i2cReceiveByte(TRUE); |
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| 272 | i2cWaitForComplete(); |
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| 273 | *data++ = i2cGetReceivedByte(); |
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| 274 | // decrement length |
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| 275 | length--; |
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| 276 | } |
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| 277 | |||
| 278 | // accept receive data and nack it (last-byte signal) |
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| 279 | i2cReceiveByte(FALSE); |
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| 280 | i2cWaitForComplete(); |
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| 281 | *data++ = i2cGetReceivedByte(); |
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| 282 | } |
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| 283 | else |
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| 284 | { |
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| 285 | // device did not ACK it's address, |
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| 286 | // data will not be transferred |
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| 287 | // return error |
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| 288 | retval = I2C_ERROR_NODEV; |
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| 289 | } |
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| 290 | |||
| 291 | // transmit stop condition |
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| 292 | // leave with TWEA on for slave receiving |
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| 293 | i2cSendStop(); |
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| 294 | |||
| 295 | // enable TWI interrupt |
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| 296 | sbi(TWCR, TWIE); |
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| 297 | |||
| 298 | return retval; |
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| 299 | } |
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| 300 | /* |
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| 301 | void i2cMasterTransferNI(u08 deviceAddr, u08 sendlength, u08* senddata, u08 receivelength, u08* receivedata) |
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| 302 | { |
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| 303 | // disable TWI interrupt |
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| 304 | cbi(TWCR, TWIE); |
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| 305 | |||
| 306 | // send start condition |
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| 307 | i2cSendStart(); |
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| 308 | i2cWaitForComplete(); |
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| 309 | |||
| 310 | // if there's data to be sent, do it |
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| 311 | if(sendlength) |
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| 312 | { |
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| 313 | // send device address with write |
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| 314 | i2cSendByte( deviceAddr & 0xFE ); |
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| 315 | i2cWaitForComplete(); |
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| 316 | |||
| 317 | // send data |
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| 318 | while(sendlength) |
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| 319 | { |
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| 320 | i2cSendByte( *senddata++ ); |
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| 321 | i2cWaitForComplete(); |
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| 322 | sendlength--; |
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| 323 | } |
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| 324 | } |
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| 325 | |||
| 326 | // if there's data to be received, do it |
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| 327 | if(receivelength) |
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| 328 | { |
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| 329 | // send repeated start condition |
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| 330 | i2cSendStart(); |
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| 331 | i2cWaitForComplete(); |
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| 332 | |||
| 333 | // send device address with read |
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| 334 | i2cSendByte( deviceAddr | 0x01 ); |
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| 335 | i2cWaitForComplete(); |
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| 336 | |||
| 337 | // accept receive data and ack it |
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| 338 | while(receivelength > 1) |
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| 339 | { |
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| 340 | i2cReceiveByte(TRUE); |
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| 341 | i2cWaitForComplete(); |
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| 342 | *receivedata++ = i2cGetReceivedByte(); |
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| 343 | // decrement length |
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| 344 | receivelength--; |
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| 345 | } |
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| 346 | |||
| 347 | // accept receive data and nack it (last-byte signal) |
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| 348 | i2cReceiveByte(TRUE); |
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| 349 | i2cWaitForComplete(); |
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| 350 | *receivedata++ = i2cGetReceivedByte(); |
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| 351 | } |
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| 352 | |||
| 353 | // transmit stop condition |
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| 354 | // leave with TWEA on for slave receiving |
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| 355 | i2cSendStop(); |
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| 356 | while( !(inb(TWCR) & BV(TWSTO)) ); |
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| 357 | |||
| 358 | // enable TWI interrupt |
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| 359 | sbi(TWCR, TWIE); |
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| 360 | } |
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| 361 | */ |
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| 362 | |||
| 363 | //! I2C (TWI) interrupt service routine |
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| 364 | SIGNAL(SIG_2WIRE_SERIAL) |
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| 365 | { |
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| 366 | // read status bits |
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| 367 | u08 status = inb(TWSR) & TWSR_STATUS_MASK; |
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| 368 | |||
| 369 | switch(status) |
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| 370 | { |
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| 371 | // Master General |
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| 372 | case TW_START: // 0x08: Sent start condition |
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| 373 | case TW_REP_START: // 0x10: Sent repeated start condition |
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| 374 | #ifdef I2C_DEBUG |
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| 375 | rprintfInit(uart1AddToTxBuffer); |
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| 376 | rprintf("I2C: M->START\r\n"); |
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| 377 | rprintfInit(uart1SendByte); |
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| 378 | #endif |
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| 379 | // send device address |
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| 380 | i2cSendByte(I2cDeviceAddrRW); |
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| 381 | break; |
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| 382 | |||
| 383 | // Master Transmitter & Receiver status codes |
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| 384 | case TW_MT_SLA_ACK: // 0x18: Slave address acknowledged |
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| 385 | case TW_MT_DATA_ACK: // 0x28: Data acknowledged |
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| 386 | #ifdef I2C_DEBUG |
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| 387 | rprintfInit(uart1AddToTxBuffer); |
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| 388 | rprintf("I2C: MT->SLA_ACK or DATA_ACK\r\n"); |
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| 389 | rprintfInit(uart1SendByte); |
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| 390 | #endif |
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| 391 | if(I2cSendDataIndex < I2cSendDataLength) |
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| 392 | { |
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| 393 | // send data |
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| 394 | i2cSendByte( I2cSendData[I2cSendDataIndex++] ); |
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| 395 | } |
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| 396 | else |
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| 397 | { |
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| 398 | // transmit stop condition, enable SLA ACK |
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| 399 | i2cSendStop(); |
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| 400 | // set state |
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| 401 | I2cState = I2C_IDLE; |
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| 402 | } |
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| 403 | break; |
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| 404 | case TW_MR_DATA_NACK: // 0x58: Data received, NACK reply issued |
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| 405 | #ifdef I2C_DEBUG |
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| 406 | rprintfInit(uart1AddToTxBuffer); |
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| 407 | rprintf("I2C: MR->DATA_NACK\r\n"); |
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| 408 | rprintfInit(uart1SendByte); |
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| 409 | #endif |
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| 410 | // store final received data byte |
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| 411 | I2cReceiveData[I2cReceiveDataIndex++] = inb(TWDR); |
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| 412 | // continue to transmit STOP condition |
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| 413 | case TW_MR_SLA_NACK: // 0x48: Slave address not acknowledged |
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| 414 | case TW_MT_SLA_NACK: // 0x20: Slave address not acknowledged |
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| 415 | case TW_MT_DATA_NACK: // 0x30: Data not acknowledged |
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| 416 | #ifdef I2C_DEBUG |
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| 417 | rprintfInit(uart1AddToTxBuffer); |
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| 418 | rprintf("I2C: MTR->SLA_NACK or MT->DATA_NACK\r\n"); |
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| 419 | rprintfInit(uart1SendByte); |
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| 420 | #endif |
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| 421 | // transmit stop condition, enable SLA ACK |
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| 422 | i2cSendStop(); |
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| 423 | // set state |
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| 424 | I2cState = I2C_IDLE; |
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| 425 | break; |
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| 426 | case TW_MT_ARB_LOST: // 0x38: Bus arbitration lost |
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| 427 | //case TW_MR_ARB_LOST: // 0x38: Bus arbitration lost |
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| 428 | #ifdef I2C_DEBUG |
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| 429 | rprintfInit(uart1AddToTxBuffer); |
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| 430 | rprintf("I2C: MT->ARB_LOST\r\n"); |
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| 431 | rprintfInit(uart1SendByte); |
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| 432 | #endif |
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| 433 | // release bus |
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| 434 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)); |
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| 435 | // set state |
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| 436 | I2cState = I2C_IDLE; |
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| 437 | // release bus and transmit start when bus is free |
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| 438 | //outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWSTA)); |
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| 439 | break; |
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| 440 | case TW_MR_DATA_ACK: // 0x50: Data acknowledged |
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| 441 | #ifdef I2C_DEBUG |
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| 442 | rprintfInit(uart1AddToTxBuffer); |
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| 443 | rprintf("I2C: MR->DATA_ACK\r\n"); |
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| 444 | rprintfInit(uart1SendByte); |
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| 445 | #endif |
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| 446 | // store received data byte |
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| 447 | I2cReceiveData[I2cReceiveDataIndex++] = inb(TWDR); |
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| 448 | // fall-through to see if more bytes will be received |
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| 449 | case TW_MR_SLA_ACK: // 0x40: Slave address acknowledged |
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| 450 | #ifdef I2C_DEBUG |
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| 451 | rprintfInit(uart1AddToTxBuffer); |
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| 452 | rprintf("I2C: MR->SLA_ACK\r\n"); |
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| 453 | rprintfInit(uart1SendByte); |
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| 454 | #endif |
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| 455 | if(I2cReceiveDataIndex < (I2cReceiveDataLength-1)) |
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| 456 | // data byte will be received, reply with ACK (more bytes in transfer) |
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| 457 | i2cReceiveByte(TRUE); |
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| 458 | else |
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| 459 | // data byte will be received, reply with NACK (final byte in transfer) |
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| 460 | i2cReceiveByte(FALSE); |
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| 461 | break; |
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| 462 | |||
| 463 | // Slave Receiver status codes |
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| 464 | case TW_SR_SLA_ACK: // 0x60: own SLA+W has been received, ACK has been returned |
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| 465 | case TW_SR_ARB_LOST_SLA_ACK: // 0x68: own SLA+W has been received, ACK has been returned |
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| 466 | case TW_SR_GCALL_ACK: // 0x70: GCA+W has been received, ACK has been returned |
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| 467 | case TW_SR_ARB_LOST_GCALL_ACK: // 0x78: GCA+W has been received, ACK has been returned |
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| 468 | #ifdef I2C_DEBUG |
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| 469 | rprintfInit(uart1AddToTxBuffer); |
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| 470 | rprintf("I2C: SR->SLA_ACK\r\n"); |
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| 471 | rprintfInit(uart1SendByte); |
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| 472 | #endif |
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| 473 | // we are being addressed as slave for writing (data will be received from master) |
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| 474 | // set state |
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| 475 | I2cState = I2C_SLAVE_RX; |
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| 476 | // prepare buffer |
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| 477 | I2cReceiveDataIndex = 0; |
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| 478 | // receive data byte and return ACK |
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| 479 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWEA)); |
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| 480 | break; |
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| 481 | case TW_SR_DATA_ACK: // 0x80: data byte has been received, ACK has been returned |
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| 482 | case TW_SR_GCALL_DATA_ACK: // 0x90: data byte has been received, ACK has been returned |
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| 483 | #ifdef I2C_DEBUG |
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| 484 | rprintfInit(uart1AddToTxBuffer); |
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| 485 | rprintf("I2C: SR->DATA_ACK\r\n"); |
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| 486 | rprintfInit(uart1SendByte); |
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| 487 | #endif |
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| 488 | // get previously received data byte |
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| 489 | I2cReceiveData[I2cReceiveDataIndex++] = inb(TWDR); |
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| 490 | // check receive buffer status |
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| 491 | if(I2cReceiveDataIndex < I2C_RECEIVE_DATA_BUFFER_SIZE) |
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| 492 | { |
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| 493 | // receive data byte and return ACK |
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| 494 | i2cReceiveByte(TRUE); |
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| 495 | //outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWEA)); |
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| 496 | } |
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| 497 | else |
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| 498 | { |
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| 499 | // receive data byte and return NACK |
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| 500 | i2cReceiveByte(FALSE); |
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| 501 | //outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)); |
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| 502 | } |
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| 503 | break; |
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| 504 | case TW_SR_DATA_NACK: // 0x88: data byte has been received, NACK has been returned |
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| 505 | case TW_SR_GCALL_DATA_NACK: // 0x98: data byte has been received, NACK has been returned |
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| 506 | #ifdef I2C_DEBUG |
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| 507 | rprintfInit(uart1AddToTxBuffer); |
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| 508 | rprintf("I2C: SR->DATA_NACK\r\n"); |
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| 509 | rprintfInit(uart1SendByte); |
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| 510 | #endif |
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| 511 | // receive data byte and return NACK |
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| 512 | i2cReceiveByte(FALSE); |
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| 513 | //outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)); |
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| 514 | break; |
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| 515 | case TW_SR_STOP: // 0xA0: STOP or REPEATED START has been received while addressed as slave |
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| 516 | #ifdef I2C_DEBUG |
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| 517 | rprintfInit(uart1AddToTxBuffer); |
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| 518 | rprintf("I2C: SR->SR_STOP\r\n"); |
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| 519 | rprintfInit(uart1SendByte); |
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| 520 | #endif |
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| 521 | // switch to SR mode with SLA ACK |
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| 522 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWEA)); |
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| 523 | // i2c receive is complete, call i2cSlaveReceive |
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| 524 | if(i2cSlaveReceive) i2cSlaveReceive(I2cReceiveDataIndex, I2cReceiveData); |
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| 525 | // set state |
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| 526 | I2cState = I2C_IDLE; |
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| 527 | break; |
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| 528 | |||
| 529 | // Slave Transmitter |
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| 530 | case TW_ST_SLA_ACK: // 0xA8: own SLA+R has been received, ACK has been returned |
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| 531 | case TW_ST_ARB_LOST_SLA_ACK: // 0xB0: GCA+R has been received, ACK has been returned |
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| 532 | #ifdef I2C_DEBUG |
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| 533 | rprintfInit(uart1AddToTxBuffer); |
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| 534 | rprintf("I2C: ST->SLA_ACK\r\n"); |
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| 535 | rprintfInit(uart1SendByte); |
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| 536 | #endif |
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| 537 | // we are being addressed as slave for reading (data must be transmitted back to master) |
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| 538 | // set state |
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| 539 | I2cState = I2C_SLAVE_TX; |
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| 540 | // request data from application |
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| 541 | if(i2cSlaveTransmit) I2cSendDataLength = i2cSlaveTransmit(I2C_SEND_DATA_BUFFER_SIZE, I2cSendData); |
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| 542 | // reset data index |
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| 543 | I2cSendDataIndex = 0; |
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| 544 | // fall-through to transmit first data byte |
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| 545 | case TW_ST_DATA_ACK: // 0xB8: data byte has been transmitted, ACK has been received |
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| 546 | #ifdef I2C_DEBUG |
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| 547 | rprintfInit(uart1AddToTxBuffer); |
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| 548 | rprintf("I2C: ST->DATA_ACK\r\n"); |
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| 549 | rprintfInit(uart1SendByte); |
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| 550 | #endif |
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| 551 | // transmit data byte |
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| 552 | outb(TWDR, I2cSendData[I2cSendDataIndex++]); |
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| 553 | if(I2cSendDataIndex < I2cSendDataLength) |
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| 554 | // expect ACK to data byte |
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| 555 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWEA)); |
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| 556 | else |
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| 557 | // expect NACK to data byte |
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| 558 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)); |
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| 559 | break; |
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| 560 | case TW_ST_DATA_NACK: // 0xC0: data byte has been transmitted, NACK has been received |
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| 561 | case TW_ST_LAST_DATA: // 0xC8: |
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| 562 | #ifdef I2C_DEBUG |
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| 563 | rprintfInit(uart1AddToTxBuffer); |
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| 564 | rprintf("I2C: ST->DATA_NACK or LAST_DATA\r\n"); |
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| 565 | rprintfInit(uart1SendByte); |
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| 566 | #endif |
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| 567 | // all done |
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| 568 | // switch to open slave |
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| 569 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWEA)); |
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| 570 | // set state |
||
| 571 | I2cState = I2C_IDLE; |
||
| 572 | break; |
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| 573 | |||
| 574 | // Misc |
||
| 575 | case TW_NO_INFO: // 0xF8: No relevant state information |
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| 576 | // do nothing |
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| 577 | #ifdef I2C_DEBUG |
||
| 578 | rprintfInit(uart1AddToTxBuffer); |
||
| 579 | rprintf("I2C: NO_INFO\r\n"); |
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| 580 | rprintfInit(uart1SendByte); |
||
| 581 | #endif |
||
| 582 | break; |
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| 583 | case TW_BUS_ERROR: // 0x00: Bus error due to illegal start or stop condition |
||
| 584 | #ifdef I2C_DEBUG |
||
| 585 | rprintfInit(uart1AddToTxBuffer); |
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| 586 | rprintf("I2C: BUS_ERROR\r\n"); |
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| 587 | rprintfInit(uart1SendByte); |
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| 588 | #endif |
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| 589 | // reset internal hardware and release bus |
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| 590 | outb(TWCR, (inb(TWCR)&TWCR_CMD_MASK)|BV(TWINT)|BV(TWSTO)|BV(TWEA)); |
||
| 591 | // set state |
||
| 592 | I2cState = I2C_IDLE; |
||
| 593 | break; |
||
| 594 | } |
||
| 595 | } |
||
| 596 | |||
| 597 | eI2cStateType i2cGetState(void) |
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| 598 | { |
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| 599 | return I2cState; |
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| 600 | } |
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