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library

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Blame information for rev 6

Line No.	Rev	Author	Line
1	6	kaklik	`/! \file prism2.h \brief Prism2 802.11b Wireless-LAN Interface Driver. /`
2			`//*****************************************************************************`
3			`//`
4			`// File Name : 'prism2.h'`
5			`// Title : Prism2 802.11b Wireless-LAN Interface Driver`
6			`// Author : Pascal Stang`
7			`// Created : 12/27/2004`
8			`// Revised : 1/7/2005`
9			`// Version : 0.1`
10			`// Target MCU : Atmel AVR series`
11			`// Editor Tabs : 4`
12			`//`
13			`/// \ingroup network`
14			`/// \defgroup prism2 PrismII 802.11b WLAN Interface Driver (prism2.c)`
15			`/// \code #include "net/prism2.h" \endcode`
16			`/// \par Overview`
17			`/// This driver provides initialization and transmit/receive`
18			`/// functions for the Prism2 802.11b Wireless-LAN Controller.`
19			`///`
20			`/// \note This driver works but is still in development.`
21			`//`
22			`//*****************************************************************************`
23			`//@{`
24
25			`#ifndef PRISM2_H`
26			`#define PRISM2_H`
27
28			`#include "global.h"`
29
30			`#define nop() asm volatile ("nop")`
31
32			`// PRISM2 I/O register defines`
33			`#define PRISM2_REG_CMD 0x00`
34			`#define PRISM2_REG_PARAM0 0x02`
35			`#define PRISM2_REG_PARAM1 0x04`
36			`#define PRISM2_REG_PARAM2 0x06`
37			`#define PRISM2_REG_STATUS 0x08`
38			`#define PRISM2_REG_RESP0 0x0A`
39			`#define PRISM2_REG_RESP1 0x0C`
40			`#define PRISM2_REG_RESP2 0x0E`
41
42			`#define PRISM2_REG_INFOFID 0x10`
43			`#define PRISM2_REG_RXFID 0x20`
44			`#define PRISM2_REG_ALLOCFID 0x22`
45			`#define PRISM2_REG_TXFID 0x24`
46
47			`#define PRISM2_REG_BAP0SEL 0x18`
48			`#define PRISM2_REG_BAP0OFFSET 0x1C`
49			`#define PRISM2_REG_BAP0DATA 0x36`
50
51			`#define PRISM2_REG_BAP1SEL 0x1A`
52			`#define PRISM2_REG_BAP1OFFSET 0x1E`
53			`#define PRISM2_REG_BAP1DATA 0x38`
54
55			`#define PRISM2_REG_EVSTAT 0x30`
56			`#define PRISM2_REG_INTEN 0x32`
57			`#define PRISM2_REG_EVACK 0x34`
58
59			`#define PRISM2_REG_SWSUP0 0x28`
60			`#define PRISM2_REG_SWSUP1 0x2A`
61			`#define PRISM2_REG_SWSUP2 0x2C`
62
63			`#define PRISM2_REG_AUXPAGE 0x3A`
64			`#define PRISM2_REG_AUXOFFSET 0x3C`
65			`#define PRISM2_REG_AUXDATA 0x3E`
66
67
68			`// PRISM2 commands defines`
69			`#define PRISM2_CMD_INIT 0x0000`
70			`#define PRISM2_CMD_ENABLE_MAC0 0x0001`
71			`#define PRISM2_CMD_DISABLE_MAC0 0x0002`
72			`#define PRISM2_CMD_DIAG 0x0003`
73			`#define PRISM2_CMD_ALLOC 0x000A`
74			`#define PRISM2_CMD_TX 0x000B`
75			`#define PRISM2_CMD_TX_RECL 0x010B`
76			`#define PRISM2_CMD_NOTIFY 0x0010`
77			`#define PRISM2_CMD_INQUIRE 0x0011`
78			`#define PRISM2_CMD_ACCESS_RD 0x0021`
79			`#define PRISM2_CMD_ACCESS_WR 0x0121`
80			`#define PRISM2_CMD_BUSY 0x8000`
81			`#define PRISM2_CMD_NORESP 0xFFFF`
82
83			`// PRISM2 command result codes`
84			`#define PRISM2_RESULT_SUCCESS 0x00`
85			`#define PRISM2_RESULT_CARDFAIL 0x01`
86			`#define PRISM2_RESULT_NOBUFFER 0x05`
87			`#define PRISM2_RESULT_CMDERROR 0x7F`
88
89			`// PRISM2 BAP Offset defines`
90			`#define PRISM2_BAPOFFSET_ERROR 0x4000`
91			`#define PRISM2_BAPOFFSET_BUSY 0x8000`
92
93			`// PRISM2 event bit defines`
94			`#define PRISM2_EVENT_RX 0x0001`
95			`#define PRISM2_EVENT_TX 0x0002`
96			`#define PRISM2_EVENT_TXEXEC 0x0004`
97			`#define PRISM2_EVENT_ALLOC 0x0008`
98			`#define PRISM2_EVENT_CMD 0x0010`
99			`#define PRISM2_EVENT_DTIM 0x0020`
100			`#define PRISM2_EVENT_INFO 0x0080`
101			`#define PRISM2_EVENT_INFDROP 0x2000`
102			`#define PRISM2_EVENT_WTERR 0x4000`
103			`#define PRISM2_EVENT_TICK 0x8000`
104			`#define PRISM2_EVENT_ALL 0xFFFF`
105
106			`// PRISM2 Record ID defines (RIDs)`
107			`#define PRISM2_RID_CNFPORTTYPE 0xFC00`
108			`#define PRISM2_RID_CNFOWNMACADDR 0xFC01`
109			`#define PRISM2_RID_CNFDESIREDSSID 0xFC02`
110			`#define PRISM2_RID_CNFOWNCHANNEL 0xFC03`
111			`#define PRISM2_RID_CNFOWNSSID 0xFC04`
112			`#define PRISM2_RID_CNFOWNATIMWIN 0xFC05`
113			`#define PRISM2_RID_CNFSYSSCALE 0xFC06`
114			`#define PRISM2_RID_CNFMAXDATALEN 0xFC07`
115			`#define PRISM2_RID_CNFWDSADDR 0xFC08`
116			`#define PRISM2_RID_CNFPMENABLED 0xFC09`
117			`#define PRISM2_RID_CNFPMEPS 0xFC0A`
118			`#define PRISM2_RID_CNFMULTICASTRX 0xFC0B`
119			`#define PRISM2_RID_CNFMAXSLEEPDUR 0xFC0C`
120			`#define PRISM2_RID_CNFPMHOLDDUR 0xFC0D`
121			`#define PRISM2_RID_CNFOWNNAME 0xFC0E`
122			`#define PRISM2_RID_CNFOWNDTIMPER 0xFC10`
123			`#define PRISM2_RID_CNFWDSADDR1 0xFC11`
124			`#define PRISM2_RID_CNFWDSADDR2 0xFC12`
125			`#define PRISM2_RID_CNFWDSADDR3 0xFC13`
126			`#define PRISM2_RID_CNFWDSADDR4 0xFC14`
127			`#define PRISM2_RID_CNFWDSADDR5 0xFC15`
128			`#define PRISM2_RID_CNFWDSADDR6 0xFC16`
129			`#define PRISM2_RID_CNFMCASTPMBUFF 0xFC17`
130			`#define PRISM2_RID_CNFWEPDEFAULTKEYID 0xFC23`
131			`#define PRISM2_RID_CNFWEPDEFAULTKEY0 0xFC24`
132			`#define PRISM2_RID_CNFWEPDEFAULTKEY1 0xFC25`
133			`#define PRISM2_RID_CNFWEPDEFAULTKEY2 0xFC26`
134			`#define PRISM2_RID_CNFWEPDEFAULTKEY3 0xFC27`
135			`#define PRISM2_RID_CNFWEPFLAGS 0xFC28`
136			`#define PRISM2_RID_CNFWEPKEYMAPTABLE 0xFC29`
137			`#define PRISM2_RID_CNFAUTHENTICATION 0xFC2A`
138			`#define PRISM2_RID_CNFMAXASSOCSTATIONS 0xFC2B`
139			`#define PRISM2_RID_CNFTXCONTROL 0xFC2C`
140			`#define PRISM2_RID_CNFROAMINGMODE 0xFC2D`
141			`#define PRISM2_RID_CNFHOSTAUTH 0xFC2E`
142			`#define PRISM2_RID_CNFRCVCRCERROR 0xFC30`
143			`#define PRISM2_RID_CNFALTRETRYCNT 0xFC32`
144			`#define PRISM2_RID_CNFAPBCNINT 0xFC33`
145			`#define PRISM2_RID_CNFAPPCFINFO 0xFC34`
146			`#define PRISM2_RID_CNFSTAPCFINFO 0xFC35`
147			`#define PRISM2_RID_CNFPRIORITYQUSAGE 0xFC37`
148			`#define PRISM2_RID_CNFTIMCTRL 0xFC40`
149			`#define PRISM2_RID_CNFTHIRTY2TALLY 0xFC42`
150			`#define PRISM2_RID_CNFENHSECURITY 0xFC43`
151			`#define PRISM2_RID_CNFDBMADJUST 0xFC46`
152			`#define PRISM2_RID_SSNGENERICELEMENT 0xFC48`
153			`#define PRISM2_RID_CNFSHORTPREAMBLE 0xFCB0`
154			`#define PRISM2_RID_CNFEXCLONGPREAMBLE 0xFCB1`
155			`#define PRISM2_RID_CNFAUTHRSPTIMEOUT 0xFCB2`
156			`#define PRISM2_RID_CNFBASICRATES 0xFCB3`
157			`#define PRISM2_RID_CNFSUPPRATES 0xFCB4`
158			`#define PRISM2_RID_CNFFALLBACKCTRL 0xFCB5`
159			`#define PRISM2_RID_WEPKEYDISABLE 0xFCB6`
160			`#define PRISM2_RID_WEPKEYMAPINDEX 0xFCB7`
161			`#define PRISM2_RID_BROADCASTKEYID 0xFCB8`
162			`#define PRISM2_RID_ENTSECFLAGEYID 0xFCB9`
163			`#define PRISM2_RID_CNFPASSIVESCANCTRL 0xFCBA`
164			`#define PRISM2_RID_SSNHANDLINGMODE 0xFCBB`
165			`#define PRISM2_RID_MDCCONTROL 0xFCBC`
166			`#define PRISM2_RID_MDCCOUNTRY 0xFCBD`
167			`#define PRISM2_RID_TXPOWERMAX 0xFCBE`
168			`#define PRISM2_RID_CNFLFOENBLED 0xFCBF`
169			`#define PRISM2_RID_CAPINFO 0xFCC0`
170			`#define PRISM2_RID_LISTENINTERVAL 0xFCC1`
171			`#define PRISM2_RID_SCANREQUEST 0xFCE1`
172			`#define PRISM2_RID_JOINREQUEST 0xFCE2`
173			`#define PRISM2_RID_AUTHENTICATESTA 0xFCE3`
174			`#define PRISM2_RID_CHANNELINFOREQUEST 0xFCE4`
175			`#define PRISM2_RID_HOSTSCAN 0xFCE5`
176
177			`#define PCMCIA_ATTR_COR 0x0000`
178			`#define PCMCIA_ATTR_CSR 0x0002`
179			`#define PCMCIA_ATTR_PRR 0x0004`
180			`#define PCMCIA_ATTR_SCR 0x0006`
181			`#define PCMCIA_ATTR_IOBASE0 0x0010`
182			`#define PCMCIA_ATTR_IOBASE1 0x0012`
183			`#define PCMCIA_ATTR_IOLIMIT 0x0018`
184
185			`// typedefs`
186
187			`// constants`
188
189			`// prototypes`
190			`#include "nic.h"`
191
192
193			`unsigned int prism2BeginPacketRetreive(void);`
194			`void prism2RetreivePacketData(u08* packet, unsigned int packetLength);`
195			`void prism2EndPacketRetreive(void);`
196
197			`void prism2SetupTxHeader(u16* header);`
198			`void prism2EventCheck(void);`
199
200			`// initialize the network interface for transmit/receive`
201			`void prism2Init(void);`
202
203			`void prism2GetMacAddress(u08* macaddr);`
204			`void prism2SetSSID(u08* ssid);`
205			`void prism2SetWEPKey(u08* wepkey);`
206
207			`u08 prism2Command(u16 cmd, u16 param0);`
208			`u08 prism2WriteBAP0(u16 id, u16 offset, u16* data, u16 len);`
209			`u08 prism2ReadBAP0(u16 id, u16 offset, u16* data, u16 len);`
210
211			`u08 prism2ReadRID(u16 id, u16 offset, u16* data, u16 len);`
212			`u08 prism2WriteRID(u16 id, u16 offset, u16* data, u16 len);`
213
214
215			`// hardware access commands`
216			`void prism2Write(unsigned short address, unsigned char data);`
217			`unsigned char prism2Read(unsigned short address);`
218			`void prism2Write16(unsigned short address, unsigned short data);`
219			`unsigned short prism2Read16(unsigned short address);`
220			`void prism2WriteMem(unsigned short address, unsigned short data);`
221			`unsigned short prism2ReadMem(unsigned short address);`
222
223			`// debugging commands`
224			`void prism2CardRegDump(void);`
225			`void prism2RegDump(void);`
226
227			`#endif`
228			`//@}`
229