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1 | 6 | kaklik | /*! \file rtl8019.h \brief Realtek RTL8019AS Ethernet Interface Driver. */ |
2 | //***************************************************************************** |
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3 | // |
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4 | // File Name : 'rtl8019.h' |
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5 | // Title : Realtek RTL8019AS Ethernet Interface Driver |
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6 | // Author : Pascal Stang |
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7 | // Created : 7/6/2004 |
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8 | // Revised : 8/22/2005 |
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9 | // Version : 0.1 |
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10 | // Target MCU : Atmel AVR series |
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11 | // Editor Tabs : 4 |
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12 | // |
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13 | /// \ingroup network |
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14 | /// \defgroup rtl8019 Realtek RTL8019AS Ethernet Interface Driver (rtl8019.c) |
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15 | /// \code #include "net/rtl8019.h" \endcode |
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16 | /// \par Overview |
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17 | /// This driver provides initialization and transmit/receive |
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18 | /// functions for the Realtek RTL8019AS 10Mb Ethernet Controller and PHY. |
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19 | /// |
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20 | /// Based in part on code by Louis Beaudoin (www.embedded-creations.com). |
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21 | /// Thanks to Adam Dunkels and Louis Beaudoin for providing the initial |
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22 | /// structure in which to write this driver. |
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23 | // |
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24 | //***************************************************************************** |
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25 | //@{ |
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26 | |||
27 | #ifndef RTL8019_H |
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28 | #define RTL8019_H |
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29 | |||
30 | #define nop() asm volatile ("nop") |
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31 | |||
32 | // RTL8019 Control Register Offsets |
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33 | // Page 0 - Read/Write |
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34 | #define CR 0x00 // Command Register |
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35 | #define PSTART 0x01 // Page Start Register |
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36 | #define PSTOP 0x02 // Page Stop Register |
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37 | #define BNRY 0x03 // Boundary Pointer |
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38 | #define RDMAPORT 0x10 // DMA Data Port |
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39 | #define MEMR 0x14 // MII/EEPROM Access Register |
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40 | #define TR 0x15 // Test Register |
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41 | #define SPP_DPR 0x18 // Standard Printer Port Data |
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42 | #define SSP_SPR 0x19 // Standard Printer Port Status |
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43 | #define SSP_CPR 0x1A // Standard Printer Port Control |
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44 | // Page 0 - Read |
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45 | #define TSR 0x04 // Transmit Status Register |
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46 | #define NCR 0x05 // Number of Collisions Register |
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47 | #define ISR 0x07 // Interrupt Status Register |
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48 | #define CRDA0 0x08 // Current Remote DMA Address 0 |
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49 | #define CRDA1 0x09 // Current Remote DMA Address 1 |
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50 | #define RSR 0x0C // Receive Status Register |
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51 | #define CNTR0 0x0D |
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52 | #define CNTR1 0x0E |
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53 | #define CNTR2 0x0F |
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54 | #define GPI 0x17 // General-Purpose Input |
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55 | #define RSTPORT 0x1F // Reset |
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56 | // Page 0 - Write |
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57 | #define TPSR 0x04 // Transmit Page Start Address |
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58 | #define TBCR0 0x05 // Transmit Byte Count Register 0 |
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59 | #define TBCR1 0x06 // Transmit Byte Count Register 1 |
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60 | #define RSAR0 0x08 // Remote Start Address Register 0 |
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61 | #define RSAR1 0x09 // Remote Start Address Register 1 |
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62 | #define RBCR0 0x0A // Remote Byte Count 0 |
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63 | #define RBCR1 0x0B // Remote Byte Count 1 |
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64 | #define RCR 0x0C // Receive Config Register |
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65 | #define TCR 0x0D // Transmit Config Register |
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66 | #define DCR 0x0E // Data Config Register |
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67 | #define IMR 0x0F // Interrupt Mask Register |
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68 | #define GPOC 0x17 // General-Purpose Output Control |
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69 | // Page 1 - Read/Write |
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70 | #define PAR0 0x01 // Physical Address Register 0 |
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71 | #define PAR1 0x02 // Physical Address Register 1 |
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72 | #define PAR2 0x03 // Physical Address Register 2 |
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73 | #define PAR3 0x04 // Physical Address Register 3 |
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74 | #define PAR4 0x05 // Physical Address Register 4 |
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75 | #define PAR5 0x06 // Physical Address Register 5 |
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76 | #define CURR 0x07 // Page 1 |
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77 | #define CPR 0x07 // Current Page Register |
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78 | |||
79 | #define RTL_EECR 0x01 // page 3 |
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80 | #define CR9346 0x01 // Page 3 |
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81 | #define CONFIG2 0x05 // page 3 |
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82 | #define CONFIG3 0x06 // page 3 |
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83 | |||
84 | // RTL8019/NE2000 CR Register Bit Definitions |
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85 | #define PS1 0x80 |
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86 | #define PS0 0x40 |
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87 | #define RD2 0x20 |
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88 | #define RD1 0x10 |
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89 | #define RD0 0x08 |
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90 | #define TXP 0x04 |
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91 | #define START 0x02 |
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92 | #define STOP 0x01 |
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93 | // RTL8019/NE2000 ISR Register Bit Definitions |
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94 | #define RST 0x80 |
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95 | #define RDC 0x40 |
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96 | #define OVW 0x10 |
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97 | #define RXE 0x08 |
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98 | #define TXE 0x04 |
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99 | #define PTX 0x02 |
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100 | #define PRX 0x01 |
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101 | // RTL8019/NE2000 RCR Register Bit Definitions |
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102 | #define MON 0x20 |
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103 | #define PRO 0x10 |
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104 | #define AM 0x08 |
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105 | #define AB 0x04 |
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106 | #define AR 0x02 |
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107 | #define SEP 0x01 |
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108 | // RTL8019/NE2000 TCR Register Bit Definitions |
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109 | #define FDU 0x80 // full duplex |
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110 | #define PD 0x40 // pad disable |
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111 | #define RLO 0x20 // retry of late collisions |
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112 | #define LB1 0x04 // loopback 1 |
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113 | #define LB0 0x02 // loopback 0 |
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114 | #define CRC 0x01 // generate CRC |
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115 | // RTL8019 EECR Register Bit Definitions |
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116 | #define EEM1 0x80 |
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117 | #define EEM0 0x40 |
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118 | #define EECS 0x08 |
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119 | #define EESK 0x04 |
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120 | #define EEDI 0x02 |
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121 | #define EEDO 0x01 |
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122 | |||
123 | |||
124 | // RTL8019 Initial Register Values |
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125 | // RCR : INT trigger active high and Accept Broadcast ENET packets |
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126 | #define RCR_INIT (AB) |
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127 | #define DCR_INIT 0x58 // FIFO thrsh. 8bits, 8bit DMA transfer |
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128 | // TCR : default transmit operation - CRC is generated |
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129 | #define TCR_INIT 0x00 |
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130 | // IMR : interrupt enabled for receive and overrun events |
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131 | #define IMR_INIT 0x11 // PRX and OVW interrupt enabled |
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132 | // buffer boundaries |
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133 | // transmit has 6 256-byte pages |
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134 | // receive has 26 256-byte pages |
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135 | // entire available packet buffer space is allocated |
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136 | #define TXSTART_INIT 0x40 |
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137 | #define RXSTART_INIT 0x46 |
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138 | #define RXSTOP_INIT 0x60 |
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139 | |||
140 | // Ethernet constants |
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141 | #define ETHERNET_MIN_PACKET_LENGTH 0x3C |
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142 | //#define ETHERNET_HEADER_LENGTH 0x0E |
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143 | |||
144 | // offsets into ax88796 ethernet packet header |
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145 | #define PKTHEADER_STATUS 0x00 // packet status |
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146 | #define PKTHEADER_NEXTPAGE 0x01 // next buffer page |
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147 | #define PKTHEADER_PKTLENL 0x02 // packet length low |
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148 | #define PKTHEADER_PKTLENH 0x03 // packet length high |
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149 | |||
150 | |||
151 | // functions |
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152 | #include "nic.h" |
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153 | |||
154 | // setup ports for I/O |
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155 | void rtl8019SetupPorts(void); |
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156 | |||
157 | // read ax88796 register |
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158 | unsigned char rtl8019Read(unsigned char address); |
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159 | |||
160 | // write ax88796 register |
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161 | void rtl8019Write(unsigned char address, unsigned char data); |
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162 | |||
163 | // initialize the ethernet interface for transmit/receive |
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164 | void rtl8019Init(void); |
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165 | |||
166 | // packet transmit functions |
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167 | void rtl8019BeginPacketSend(unsigned int packetLength); |
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168 | void rtl8019SendPacketData(unsigned char * localBuffer, unsigned int length); |
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169 | void rtl8019EndPacketSend(void); |
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170 | |||
171 | // packet receive functions |
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172 | unsigned int rtl8019BeginPacketRetreive(void); |
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173 | void rtl8019RetreivePacketData(unsigned char * localBuffer, unsigned int length); |
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174 | void rtl8019EndPacketRetreive(void); |
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175 | |||
176 | // Processes RTL8019 interrupts. |
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177 | // Currently, this function looks only for a receive overflow condition. |
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178 | // The function need not be called in response to an interrupt, |
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179 | // but can be executed just before checking the receive buffer for incoming packets. |
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180 | void rtl8019ProcessInterrupt(void); |
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181 | |||
182 | // execute procedure for recovering from a receive overflow |
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183 | // this should be done when the receive memory fills up with packets |
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184 | void rtl8019ReceiveOverflowRecover(void); |
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185 | |||
186 | // formatted print of all important RTL8019 registers |
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187 | void rtl8019RegDump(void); |
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188 | |||
189 | #endif |
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190 | //@} |
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