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1 | 6 | kaklik | /*! \file uartsw.c \brief Software Interrupt-driven UART function library. */ |
2 | //***************************************************************************** |
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3 | // |
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4 | // File Name : 'uartsw.c' |
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5 | // Title : Software Interrupt-driven UART function library |
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6 | // Author : Pascal Stang - Copyright (C) 2002-2004 |
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7 | // Created : 7/20/2002 |
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8 | // Revised : 4/27/2004 |
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9 | // Version : 0.1 |
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10 | // Target MCU : Atmel AVR Series (intended for the ATmega16 and ATmega32) |
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11 | // Editor Tabs : 4 |
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12 | // |
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13 | // This code is distributed under the GNU Public License |
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14 | // which can be found at http://www.gnu.org/licenses/gpl.txt |
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15 | // |
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16 | //***************************************************************************** |
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17 | |||
18 | #include <avr/io.h> |
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19 | #include <avr/interrupt.h> |
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20 | |||
21 | #include "global.h" |
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22 | #include "timer.h" |
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23 | #include "uartsw.h" |
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24 | |||
25 | // Program ROM constants |
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26 | |||
27 | // Global variables |
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28 | |||
29 | // uartsw transmit status and data variables |
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30 | static volatile u08 UartswTxBusy; |
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31 | static volatile u08 UartswTxData; |
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32 | static volatile u08 UartswTxBitNum; |
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33 | |||
34 | // baud rate common to transmit and receive |
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35 | static volatile u16 UartswBaudRateDiv; |
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36 | |||
37 | // uartsw receive status and data variables |
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38 | static volatile u08 UartswRxBusy; |
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39 | static volatile u08 UartswRxData; |
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40 | static volatile u08 UartswRxBitNum; |
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41 | // receive buffer |
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42 | static cBuffer uartswRxBuffer; ///< uartsw receive buffer |
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43 | // automatically allocate space in ram for each buffer |
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44 | static char uartswRxData[UARTSW_RX_BUFFER_SIZE]; |
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45 | |||
46 | // functions |
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47 | |||
48 | //! enable and initialize the software uart |
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49 | void uartswInit(void) |
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50 | { |
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51 | // initialize the buffers |
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52 | uartswInitBuffers(); |
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53 | // initialize the ports |
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54 | sbi(UARTSW_TX_DDR, UARTSW_TX_PIN); |
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55 | cbi(UARTSW_RX_DDR, UARTSW_RX_PIN); |
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56 | cbi(UARTSW_RX_PORT, UARTSW_RX_PIN); |
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57 | // initialize baud rate |
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58 | uartswSetBaudRate(9600); |
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59 | |||
60 | // setup the transmitter |
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61 | UartswTxBusy = FALSE; |
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62 | // disable OC1A interrupt |
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63 | cbi(TIMSK, OCIE1A); |
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64 | // attach TxBit service routine to OC1A |
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65 | timerAttach(TIMER1OUTCOMPAREA_INT, uartswTxBitService); |
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66 | |||
67 | // setup the receiver |
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68 | UartswRxBusy = FALSE; |
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69 | // disable OC1B interrupt |
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70 | cbi(TIMSK, OCIE1B); |
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71 | // attach RxBit service routine to OC1B |
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72 | timerAttach(TIMER1OUTCOMPAREB_INT, uartswRxBitService); |
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73 | // attach RxBit service routine to ICP |
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74 | timerAttach(TIMER1INPUTCAPTURE_INT, uartswRxBitService); |
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75 | // trigger on rising edge |
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76 | sbi(TCCR1B, ICES1); |
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77 | // enable ICP interrupt |
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78 | sbi(TIMSK, TICIE1); |
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79 | |||
80 | // turn on interrupts |
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81 | sei(); |
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82 | } |
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83 | |||
84 | //! create and initialize the uart buffers |
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85 | void uartswInitBuffers(void) |
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86 | { |
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87 | // initialize the UART receive buffer |
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88 | bufferInit(&uartswRxBuffer, uartswRxData, UARTSW_RX_BUFFER_SIZE); |
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89 | } |
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90 | |||
91 | //! turns off software UART |
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92 | void uartswOff(void) |
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93 | { |
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94 | // disable interrupts |
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95 | cbi(TIMSK, OCIE1A); |
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96 | cbi(TIMSK, OCIE1B); |
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97 | cbi(TIMSK, TICIE1); |
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98 | // detach the service routines |
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99 | timerDetach(TIMER1OUTCOMPAREA_INT); |
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100 | timerDetach(TIMER1OUTCOMPAREB_INT); |
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101 | timerDetach(TIMER1INPUTCAPTURE_INT); |
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102 | } |
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103 | |||
104 | void uartswSetBaudRate(u32 baudrate) |
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105 | { |
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106 | // set timer prescaler |
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107 | timer1SetPrescaler(TIMER_CLK_DIV1); |
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108 | // calculate division factor for requested baud rate, and set it |
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109 | UartswBaudRateDiv = (u16)((F_CPU+(baudrate/2L))/(baudrate*1L)); |
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110 | } |
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111 | |||
112 | //! returns the receive buffer structure |
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113 | cBuffer* uartswGetRxBuffer(void) |
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114 | { |
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115 | // return rx buffer pointer |
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116 | return &uartswRxBuffer; |
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117 | } |
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118 | |||
119 | void uartswSendByte(u08 data) |
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120 | { |
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121 | // wait until uart is ready |
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122 | while(UartswTxBusy); |
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123 | // set busy flag |
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124 | UartswTxBusy = TRUE; |
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125 | // save data |
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126 | UartswTxData = data; |
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127 | // set number of bits (+1 for stop bit) |
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128 | UartswTxBitNum = 9; |
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129 | |||
130 | // set the start bit |
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131 | sbi(UARTSW_TX_PORT, UARTSW_TX_PIN); |
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132 | // schedule the next bit |
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133 | outw(OCR1A, inw(TCNT1) + UartswBaudRateDiv); |
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134 | // enable OC1A interrupt |
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135 | sbi(TIMSK, OCIE1A); |
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136 | } |
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137 | |||
138 | //! gets a byte (if available) from the uart receive buffer |
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139 | u08 uartswReceiveByte(u08* rxData) |
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140 | { |
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141 | // make sure we have a receive buffer |
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142 | if(uartswRxBuffer.size) |
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143 | { |
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144 | // make sure we have data |
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145 | if(uartswRxBuffer.datalength) |
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146 | { |
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147 | // get byte from beginning of buffer |
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148 | *rxData = bufferGetFromFront(&uartswRxBuffer); |
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149 | return TRUE; |
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150 | } |
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151 | else |
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152 | { |
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153 | // no data |
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154 | return FALSE; |
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155 | } |
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156 | } |
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157 | else |
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158 | { |
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159 | // no buffer |
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160 | return FALSE; |
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161 | } |
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162 | } |
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163 | |||
164 | void uartswTxBitService(void) |
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165 | { |
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166 | if(UartswTxBitNum) |
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167 | { |
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168 | // there are bits still waiting to be transmitted |
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169 | if(UartswTxBitNum > 1) |
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170 | { |
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171 | // transmit data bits (inverted, LSB first) |
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172 | if( !(UartswTxData & 0x01) ) |
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173 | sbi(UARTSW_TX_PORT, UARTSW_TX_PIN); |
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174 | else |
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175 | cbi(UARTSW_TX_PORT, UARTSW_TX_PIN); |
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176 | // shift bits down |
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177 | UartswTxData = UartswTxData>>1; |
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178 | } |
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179 | else |
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180 | { |
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181 | // transmit stop bit |
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182 | cbi(UARTSW_TX_PORT, UARTSW_TX_PIN); |
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183 | } |
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184 | // schedule the next bit |
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185 | outw(OCR1A, inw(OCR1A) + UartswBaudRateDiv); |
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186 | // count down |
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187 | UartswTxBitNum--; |
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188 | } |
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189 | else |
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190 | { |
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191 | // transmission is done |
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192 | // clear busy flag |
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193 | UartswTxBusy = FALSE; |
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194 | } |
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195 | } |
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196 | |||
197 | void uartswRxBitService(void) |
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198 | { |
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199 | // this function runs on either: |
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200 | // - a rising edge interrupt |
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201 | // - OC1B |
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202 | if(!UartswRxBusy) |
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203 | { |
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204 | // this is a start bit |
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205 | // disable ICP interrupt |
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206 | cbi(TIMSK, TICIE1); |
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207 | // schedule data bit sampling 1.5 bit periods from now |
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208 | outw(OCR1B, inw(TCNT1) + UartswBaudRateDiv + UartswBaudRateDiv/2); |
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209 | // clear OC1B interrupt flag |
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210 | sbi(TIFR, OCF1B); |
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211 | // enable OC1B interrupt |
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212 | sbi(TIMSK, OCIE1B); |
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213 | // set start bit flag |
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214 | UartswRxBusy = TRUE; |
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215 | // reset bit counter |
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216 | UartswRxBitNum = 0; |
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217 | // reset data |
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218 | UartswRxData = 0; |
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219 | } |
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220 | else |
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221 | { |
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222 | // start bit has already been received |
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223 | // we're in the data bits |
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224 | |||
225 | // shift data byte to make room for new bit |
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226 | UartswRxData = UartswRxData>>1; |
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227 | |||
228 | // sample the data line |
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229 | if( !(inb(UARTSW_RX_PORTIN) & (1<<UARTSW_RX_PIN)) ) |
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230 | { |
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231 | // serial line is low |
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232 | // record '1' bit (data inverted) |
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233 | UartswRxData |= 0x80; |
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234 | } |
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235 | |||
236 | // increment bit counter |
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237 | UartswRxBitNum++; |
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238 | // schedule next bit sample |
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239 | outw(OCR1B, inw(OCR1B) + UartswBaudRateDiv); |
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240 | |||
241 | // check if we have a full byte |
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242 | if(UartswRxBitNum >= 8) |
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243 | { |
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244 | // save data in receive buffer |
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245 | bufferAddToEnd(&uartswRxBuffer, UartswRxData); |
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246 | // disable OC1B interrupt |
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247 | cbi(TIMSK, OCIE1B); |
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248 | // clear ICP interrupt flag |
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249 | sbi(TIFR, ICF1); |
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250 | // enable ICP interrupt |
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251 | sbi(TIMSK, TICIE1); |
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252 | // clear start bit flag |
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253 | UartswRxBusy = FALSE; |
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254 | } |
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255 | } |
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256 | } |
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257 | |||
258 | /* |
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259 | void uartswRxBitService(void) |
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260 | { |
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261 | u16 thisBitTime; |
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262 | u08 bitperiods; |
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263 | u08 i; |
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264 | |||
265 | // bit transition was detected |
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266 | // record bit's edge time |
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267 | thisBitTime = inw(ICR1); |
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268 | |||
269 | cbi(PORTB, 0); |
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270 | |||
271 | if(!UartswRxStartBit) |
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272 | { |
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273 | // this is a start bit |
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274 | // switch to falling-edge trigger |
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275 | cbi(TCCR1B, ICES1); |
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276 | // record bit time |
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277 | UartswRxBitTime = thisBitTime; |
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278 | // set start bit flag |
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279 | UartswRxStartBit = TRUE; |
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280 | // reset bit counter |
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281 | UartswRxBitNum = 0; |
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282 | // reset data |
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283 | UartswRxData = 0; |
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284 | } |
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285 | else |
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286 | { |
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287 | // start bit has already been received |
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288 | // we're in the data bits |
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289 | |||
290 | // how many bit periods since last edge? |
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291 | bitperiods = (thisBitTime - UartswRxBitTime + UartswBaudRateDiv/2)/UartswBaudRateDiv; |
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292 | // set last edge time |
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293 | UartswRxBitTime = thisBitTime; |
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294 | |||
295 | if(bitperiods > 10) |
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296 | { |
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297 | // switch to trigger on rising edge |
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298 | sbi(TCCR1B, ICES1); |
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299 | // clear start bit flag |
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300 | UartswRxStartBit = FALSE; |
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301 | } |
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302 | else |
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303 | { |
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304 | |||
305 | |||
306 | if( inb(TCCR1B) & (1<<ICES1) ) |
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307 | { |
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308 | // just triggered on a rising edge |
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309 | // previous bits were zero |
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310 | // shift in the data (data bits are inverted) |
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311 | for(i=0; i<bitperiods; i++) |
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312 | { |
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313 | UartswRxData = UartswRxData<<1; |
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314 | UartswRxData |= 0x01; |
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315 | } |
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316 | // switch to trigger on falling edge |
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317 | cbi(TCCR1B, ICES1); |
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318 | } |
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319 | else |
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320 | { |
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321 | // just triggered on a falling edge |
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322 | // previous bits were one |
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323 | // shift in the data (data bits are inverted) |
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324 | for(i=0; i<bitperiods; i++) |
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325 | { |
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326 | UartswRxData = UartswRxData<<1; |
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327 | } |
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328 | // switch to trigger on rising edge |
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329 | sbi(TCCR1B, ICES1); |
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330 | } |
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331 | |||
332 | // increment bit counter |
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333 | UartswRxBitNum += bitperiods; |
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334 | |||
335 | // check if we have a full byte + start bit |
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336 | if(bitperiods > 8) |
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337 | { |
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338 | // save data in receive buffer |
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339 | bufferAddToEnd(&uartswRxBuffer, UartswRxData); |
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340 | // switch to trigger on rising edge |
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341 | sbi(TCCR1B, ICES1); |
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342 | // clear start bit flag |
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343 | UartswRxStartBit = FALSE; |
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344 | } |
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345 | } |
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346 | } |
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347 | |||
348 | // turn off debug LEDs |
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349 | delay(10); |
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350 | sbi(PORTB, 0); |
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351 | sbi(PORTB, 1); |
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352 | } |
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353 | */ |
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