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library

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Blame information for rev 6

Line No. Rev Author Line
1 6 kaklik /*! \file sramsw.c \brief Software-driven SRAM memory bus access functions. */
2 //*****************************************************************************
3 //
4 // File Name : 'sramsw.c'
5 // Title : Software-driven SRAM memory bus access functions
6 // Author : Pascal Stang - Copyright (C) 2002
7 // Created : 11/11/2002
8 // Revised : 11/13/2002
9 // Version : 1.0
10 // Target MCU : Atmel AVR series
11 // Editor Tabs : 4
12 //
13 // This code is distributed under the GNU Public License
14 // which can be found at http://www.gnu.org/licenses/gpl.txt
15 //
16 //*****************************************************************************
17  
18 #include <avr/io.h>
19 #include <avr/interrupt.h>
20  
21 #include "global.h"
22 #include "sramsw.h"
23  
24 // global variables
25  
26 // functions
27 void sramswInit(void)
28 {
29 // initialize port state
30 outb(SRAM_ADL, 0xFF); // addr/data port set to 0xFF (pull-ups enabled)
31 outb(SRAM_AH, 0x00); // high addr port set to 0x00
32 // initialize port directions
33 outb(SRAM_ADL_DDR, 0x00); // addr/data port set to input
34 outb(SRAM_AH_DDR, 0xFF); // high addr port set to output
35 // initialize control line states
36 sbi(SRAM_CTRL, SRAM_WR); // de-assert write (active low)
37 sbi(SRAM_CTRL, SRAM_RD); // de-assert read (active low)
38 cbi(SRAM_CTRL, SRAM_ALE); // de-assert ALE (active high)
39 // set control line direction
40 sbi(SRAM_CTRL_DDR, SRAM_WR);
41 sbi(SRAM_CTRL_DDR, SRAM_RD);
42 sbi(SRAM_CTRL_DDR, SRAM_ALE);
43 // set page lines direction
44 outb(SRAM_PAGE_DDR, inb(SRAM_PAGE_DDR) | SRAM_PAGE_MASK );
45 // initialize page
46 sramswSetPage(0);
47 }
48  
49 void sramswOff(void)
50 {
51 }
52  
53 void sramswWrite(u32 addr, u08 data)
54 {
55 // set page
56 sramswSetPage( (addr & 0x00FF0000)>>16 );
57 // set high-order address
58 outb(SRAM_AH, (addr & 0x0000FF00)>>8 );
59 // set low-order address
60 outb(SRAM_ADL, addr & 0x000000FF);
61 // apply low-order address to latch
62 outb(SRAM_ADL_DDR, 0xFF);
63 // clock latch to save low-order address
64 sbi(SRAM_CTRL, SRAM_ALE); // assert ALE (active high)
65 asm volatile ("nop");
66 cbi(SRAM_CTRL, SRAM_ALE); // de-assert ALE (active high)
67  
68 // apply data to memory
69 outb(SRAM_ADL, data);
70 // clock write line to store data
71 cbi(SRAM_CTRL, SRAM_WR); // assert write (active low)
72 asm volatile ("nop");
73 sbi(SRAM_CTRL, SRAM_WR); // de-assert write (active low)
74 }
75  
76 u08 sramswRead(u32 addr)
77 {
78 u08 data;
79  
80 // set page
81 sramswSetPage( (addr & 0x00FF0000)>>16 );
82 // set high-order address
83 outb(SRAM_AH, (addr & 0x0000FF00)>>8 );
84 // set low-order address
85 outb(SRAM_ADL, addr & 0x000000FF);
86 // apply low-order address to latch
87 outb(SRAM_ADL_DDR, 0xFF);
88 // clock latch to save low-order address
89 sbi(SRAM_CTRL, SRAM_ALE); // assert ALE (active high)
90 asm volatile ("nop");
91 cbi(SRAM_CTRL, SRAM_ALE); // de-assert ALE (active high)
92  
93 // switch data bus to input
94 outb(SRAM_ADL_DDR, 0x00);
95 // clear pullups
96 outb(SRAM_ADL, 0x00);
97 // request data from memory
98 cbi(SRAM_CTRL, SRAM_RD); // assert read (active low)
99 // retrieve data
100 asm volatile ("nop");
101 data = inb(SRAM_ADL_IN);
102 // release read line
103 sbi(SRAM_CTRL, SRAM_RD); // de-assert read (active low)
104 // switch data bus to output
105 outb(SRAM_ADL_DDR, 0xFF);
106  
107 return data;
108 }
109  
110 void sramswSetPage(u08 page)
111 {
112 outb(SRAM_PAGE, (page & SRAM_PAGE_MASK));
113 }
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