| Line No. | Rev | Author | Line |
|---|---|---|---|
| 1 | 6 | kaklik | /*! \file timer128.c \brief System Timer function library for Mega128. */ |
| 2 | //***************************************************************************** |
||
| 3 | // |
||
| 4 | // File Name : 'timer128.c' |
||
| 5 | // Title : System Timer function library for Mega128 |
||
| 6 | // Author : Pascal Stang - Copyright (C) 2000-2003 |
||
| 7 | // Created : 11/22/2000 |
||
| 8 | // Revised : 02/24/2003 |
||
| 9 | // Version : 1.2 |
||
| 10 | // Target MCU : Atmel AVR Series |
||
| 11 | // Editor Tabs : 4 |
||
| 12 | // |
||
| 13 | // This code is distributed under the GNU Public License |
||
| 14 | // which can be found at http://www.gnu.org/licenses/gpl.txt |
||
| 15 | // |
||
| 16 | //***************************************************************************** |
||
| 17 | |||
| 18 | #include <avr/io.h> |
||
| 19 | #include <avr/interrupt.h> |
||
| 20 | #include <avr/pgmspace.h> |
||
| 21 | #include <avr/sleep.h> |
||
| 22 | |||
| 23 | #include "global.h" |
||
| 24 | #include "timer128.h" |
||
| 25 | |||
| 26 | // Program ROM constants |
||
| 27 | // the prescale division values stored in order of timer control register index |
||
| 28 | // STOP, CLK, CLK/8, CLK/64, CLK/256, CLK/1024 |
||
| 29 | unsigned short __attribute__ ((progmem)) TimerPrescaleFactor[] = {0,1,8,64,256,1024}; |
||
| 30 | // the prescale division values stored in order of timer control register index |
||
| 31 | // STOP, CLK, CLK/8, CLK/32, CLK/64, CLK/128, CLK/256, CLK/1024 |
||
| 32 | unsigned short __attribute__ ((progmem)) TimerRTCPrescaleFactor[] = {0,1,8,32,64,128,256,1024}; |
||
| 33 | |||
| 34 | // Global variables |
||
| 35 | // time registers |
||
| 36 | volatile unsigned long TimerPauseReg; |
||
| 37 | volatile unsigned long Timer0Reg0; |
||
| 38 | volatile unsigned long Timer0Reg1; |
||
| 39 | volatile unsigned long Timer2Reg0; |
||
| 40 | volatile unsigned long Timer2Reg1; |
||
| 41 | |||
| 42 | typedef void (*voidFuncPtr)(void); |
||
| 43 | volatile static voidFuncPtr TimerIntFunc[TIMER_NUM_INTERRUPTS]; |
||
| 44 | |||
| 45 | // delay for a minimum of <us> microseconds |
||
| 46 | // the time resolution is dependent on the time the loop takes |
||
| 47 | // e.g. with 4Mhz and 5 cycles per loop, the resolution is 1.25 us |
||
| 48 | void delay_us(unsigned short time_us) |
||
| 49 | { |
||
| 50 | unsigned short delay_loops; |
||
| 51 | register unsigned short i; |
||
| 52 | |||
| 53 | delay_loops = (time_us+3)/5*CYCLES_PER_US; // +3 for rounding up (dirty) |
||
| 54 | |||
| 55 | // one loop takes 5 cpu cycles |
||
| 56 | for (i=0; i < delay_loops; i++) {}; |
||
| 57 | } |
||
| 58 | /* |
||
| 59 | void delay_ms(unsigned char time_ms) |
||
| 60 | { |
||
| 61 | unsigned short delay_count = F_CPU / 4000; |
||
| 62 | |||
| 63 | unsigned short cnt; |
||
| 64 | asm volatile ("\n" |
||
| 65 | "L_dl1%=:\n\t" |
||
| 66 | "mov %A0, %A2\n\t" |
||
| 67 | "mov %B0, %B2\n" |
||
| 68 | "L_dl2%=:\n\t" |
||
| 69 | "sbiw %A0, 1\n\t" |
||
| 70 | "brne L_dl2%=\n\t" |
||
| 71 | "dec %1\n\t" "brne L_dl1%=\n\t":"=&w" (cnt) |
||
| 72 | :"r"(time_ms), "r"((unsigned short) (delay_count)) |
||
| 73 | ); |
||
| 74 | } |
||
| 75 | */ |
||
| 76 | void timerInit(void) |
||
| 77 | { |
||
| 78 | u08 intNum; |
||
| 79 | // detach all user functions from interrupts |
||
| 80 | for(intNum=0; intNum<TIMER_NUM_INTERRUPTS; intNum++) |
||
| 81 | timerDetach(intNum); |
||
| 82 | |||
| 83 | // initialize all timers |
||
| 84 | timer0Init(); |
||
| 85 | timer1Init(); |
||
| 86 | timer2Init(); |
||
| 87 | timer3Init(); |
||
| 88 | // enable interrupts |
||
| 89 | sei(); |
||
| 90 | } |
||
| 91 | |||
| 92 | void timer0Init() |
||
| 93 | { |
||
| 94 | // initialize timer 0 |
||
| 95 | timer0SetPrescaler( TIMER0PRESCALE ); // set prescaler |
||
| 96 | outb(TCNT0, 0); // reset TCNT0 |
||
| 97 | sbi(TIMSK, TOIE0); // enable TCNT0 overflow interrupt |
||
| 98 | |||
| 99 | timer0ClearOverflowCount(); // initialize time registers |
||
| 100 | } |
||
| 101 | |||
| 102 | void timer1Init(void) |
||
| 103 | { |
||
| 104 | // initialize timer 1 |
||
| 105 | timer1SetPrescaler( TIMER1PRESCALE ); // set prescaler |
||
| 106 | outb(TCNT1H, 0); // reset TCNT1 |
||
| 107 | outb(TCNT1L, 0); |
||
| 108 | sbi(TIMSK, TOIE1); // enable TCNT1 overflow |
||
| 109 | } |
||
| 110 | |||
| 111 | void timer2Init(void) |
||
| 112 | { |
||
| 113 | // initialize timer 2 |
||
| 114 | timer2SetPrescaler( TIMER2PRESCALE ); // set prescaler |
||
| 115 | outb(TCNT2, 0); // reset TCNT2 |
||
| 116 | sbi(TIMSK, TOIE2); // enable TCNT2 overflow |
||
| 117 | |||
| 118 | timer2ClearOverflowCount(); // initialize time registers |
||
| 119 | } |
||
| 120 | |||
| 121 | void timer3Init(void) |
||
| 122 | { |
||
| 123 | // initialize timer 3 |
||
| 124 | timer3SetPrescaler( TIMER3PRESCALE ); // set prescaler |
||
| 125 | outb(TCNT3H, 0); // reset TCNT3 |
||
| 126 | outb(TCNT3L, 0); |
||
| 127 | sbi(ETIMSK, TOIE3); // enable TCNT3 overflow |
||
| 128 | } |
||
| 129 | |||
| 130 | void timer0SetPrescaler(u08 prescale) |
||
| 131 | { |
||
| 132 | // set prescaler on timer 0 |
||
| 133 | outb(TCCR0, (inb(TCCR0) & ~TIMER_PRESCALE_MASK) | prescale); |
||
| 134 | } |
||
| 135 | |||
| 136 | void timer1SetPrescaler(u08 prescale) |
||
| 137 | { |
||
| 138 | // set prescaler on timer 1 |
||
| 139 | outb(TCCR1B, (inb(TCCR1B) & ~TIMER_PRESCALE_MASK) | prescale); |
||
| 140 | } |
||
| 141 | |||
| 142 | void timer2SetPrescaler(u08 prescale) |
||
| 143 | { |
||
| 144 | // set prescaler on timer 2 |
||
| 145 | outb(TCCR2, (inb(TCCR2) & ~TIMER_PRESCALE_MASK) | prescale); |
||
| 146 | } |
||
| 147 | |||
| 148 | void timer3SetPrescaler(u08 prescale) |
||
| 149 | { |
||
| 150 | // set prescaler on timer 2 |
||
| 151 | outb(TCCR3B, (inb(TCCR3B) & ~TIMER_PRESCALE_MASK) | prescale); |
||
| 152 | } |
||
| 153 | |||
| 154 | u16 timer0GetPrescaler(void) |
||
| 155 | { |
||
| 156 | // get the current prescaler setting |
||
| 157 | return (pgm_read_word(TimerPrescaleFactor+(inb(TCCR0) & TIMER_PRESCALE_MASK))); |
||
| 158 | } |
||
| 159 | |||
| 160 | u16 timer1GetPrescaler(void) |
||
| 161 | { |
||
| 162 | // get the current prescaler setting |
||
| 163 | return (pgm_read_word(TimerPrescaleFactor+(inb(TCCR1B) & TIMER_PRESCALE_MASK))); |
||
| 164 | } |
||
| 165 | |||
| 166 | u16 timer2GetPrescaler(void) |
||
| 167 | { |
||
| 168 | // get the current prescaler setting |
||
| 169 | return (pgm_read_word(TimerPrescaleFactor+(inb(TCCR2) & TIMER_PRESCALE_MASK))); |
||
| 170 | } |
||
| 171 | |||
| 172 | u16 timer3GetPrescaler(void) |
||
| 173 | { |
||
| 174 | // get the current prescaler setting |
||
| 175 | return (pgm_read_word(TimerPrescaleFactor+(inb(TCCR3B) & TIMER_PRESCALE_MASK))); |
||
| 176 | } |
||
| 177 | |||
| 178 | void timerAttach(u08 interruptNum, void (*userFunc)(void) ) |
||
| 179 | { |
||
| 180 | // make sure the interrupt number is within bounds |
||
| 181 | if(interruptNum < TIMER_NUM_INTERRUPTS) |
||
| 182 | { |
||
| 183 | // set the interrupt function to run |
||
| 184 | // the supplied user's function |
||
| 185 | TimerIntFunc[interruptNum] = userFunc; |
||
| 186 | } |
||
| 187 | } |
||
| 188 | |||
| 189 | void timerDetach(u08 interruptNum) |
||
| 190 | { |
||
| 191 | // make sure the interrupt number is within bounds |
||
| 192 | if(interruptNum < TIMER_NUM_INTERRUPTS) |
||
| 193 | { |
||
| 194 | // set the interrupt function to run nothing |
||
| 195 | TimerIntFunc[interruptNum] = 0; |
||
| 196 | } |
||
| 197 | } |
||
| 198 | |||
| 199 | void timerPause(unsigned short pause_ms) |
||
| 200 | { |
||
| 201 | // pauses for exactly <pause_ms> number of milliseconds |
||
| 202 | u08 timerThres; |
||
| 203 | u32 ticRateHz; |
||
| 204 | u32 pause; |
||
| 205 | |||
| 206 | // capture current pause timer value |
||
| 207 | timerThres = inb(TCNT2); |
||
| 208 | // reset pause timer overflow count |
||
| 209 | TimerPauseReg = 0; |
||
| 210 | // calculate delay for [pause_ms] milliseconds |
||
| 211 | // prescaler division = 1<<(pgm_read_byte(TimerPrescaleFactor+inb(TCCR2))) |
||
| 212 | ticRateHz = F_CPU/timer2GetPrescaler(); |
||
| 213 | // precision management |
||
| 214 | // prevent overflow and precision underflow |
||
| 215 | // -could add more conditions to improve accuracy |
||
| 216 | if( ((ticRateHz < 429497) && (pause_ms <= 10000)) ) |
||
| 217 | pause = (pause_ms*ticRateHz)/1000; |
||
| 218 | else |
||
| 219 | pause = pause_ms*(ticRateHz/1000); |
||
| 220 | |||
| 221 | // loop until time expires |
||
| 222 | while( ((TimerPauseReg<<8) | inb(TCNT2)) < (pause+timerThres) ) |
||
| 223 | { |
||
| 224 | if( TimerPauseReg < (pause>>8)); |
||
| 225 | { |
||
| 226 | // save power by idling the processor |
||
| 227 | set_sleep_mode(SLEEP_MODE_IDLE); |
||
| 228 | sleep_mode(); |
||
| 229 | } |
||
| 230 | } |
||
| 231 | } |
||
| 232 | |||
| 233 | void timer0ClearOverflowCount(void) |
||
| 234 | { |
||
| 235 | // clear the timer overflow counter registers |
||
| 236 | Timer0Reg0 = 0; // initialize time registers |
||
| 237 | Timer0Reg1 = 0; // initialize time registers |
||
| 238 | } |
||
| 239 | |||
| 240 | long timer0GetOverflowCount(void) |
||
| 241 | { |
||
| 242 | // return the current timer overflow count |
||
| 243 | // (this is since the last timer0ClearOverflowCount() command was called) |
||
| 244 | return Timer0Reg0; |
||
| 245 | } |
||
| 246 | |||
| 247 | void timer2ClearOverflowCount(void) |
||
| 248 | { |
||
| 249 | // clear the timer overflow counter registers |
||
| 250 | Timer2Reg0 = 0; // initialize time registers |
||
| 251 | Timer2Reg1 = 0; // initialize time registers |
||
| 252 | } |
||
| 253 | |||
| 254 | long timer2GetOverflowCount(void) |
||
| 255 | { |
||
| 256 | // return the current timer overflow count |
||
| 257 | // (this is since the last timer2ClearOverflowCount() command was called) |
||
| 258 | return Timer2Reg0; |
||
| 259 | } |
||
| 260 | |||
| 261 | |||
| 262 | void timer1PWMInit(u08 bitRes) |
||
| 263 | { |
||
| 264 | // configures timer1 for use with PWM output |
||
| 265 | // on pins OC1A, OC1B, and OC1C |
||
| 266 | |||
| 267 | // enable Timer1 as 8,9,10bit PWM |
||
| 268 | if(bitRes == 9) |
||
| 269 | { // 9bit mode |
||
| 270 | sbi(TCCR1A,WGMA1); |
||
| 271 | cbi(TCCR1A,WGMA0); |
||
| 272 | } |
||
| 273 | else if( bitRes == 10 ) |
||
| 274 | { // 10bit mode |
||
| 275 | sbi(TCCR1A,WGMA1); |
||
| 276 | sbi(TCCR1A,WGMA0); |
||
| 277 | } |
||
| 278 | else |
||
| 279 | { // default 8bit mode |
||
| 280 | cbi(TCCR1A,WGMA1); |
||
| 281 | sbi(TCCR1A,WGMA0); |
||
| 282 | } |
||
| 283 | |||
| 284 | // set clear-timer-on-compare-match |
||
| 285 | //cbi(TCCR1B,CTC1); |
||
| 286 | // clear output compare value A |
||
| 287 | outb(OCR1AH, 0); |
||
| 288 | outb(OCR1AL, 0); |
||
| 289 | // clear output compare value B |
||
| 290 | outb(OCR1BH, 0); |
||
| 291 | outb(OCR1BL, 0); |
||
| 292 | // clear output compare value C |
||
| 293 | outb(OCR1CH, 0); |
||
| 294 | outb(OCR1CL, 0); |
||
| 295 | } |
||
| 296 | |||
| 297 | void timer1PWMInitICR(u16 topcount) |
||
| 298 | { |
||
| 299 | // set PWM mode with ICR top-count |
||
| 300 | cbi(TCCR1A,WGM10); |
||
| 301 | sbi(TCCR1A,WGM11); |
||
| 302 | sbi(TCCR1B,WGM12); |
||
| 303 | sbi(TCCR1B,WGM13); |
||
| 304 | |||
| 305 | // set top count value |
||
| 306 | ICR1H = (u08)(topcount>>8); |
||
| 307 | ICR1L = (u08)topcount; |
||
| 308 | |||
| 309 | // clear output compare value A |
||
| 310 | outb(OCR1AH, 0); |
||
| 311 | outb(OCR1AL, 0); |
||
| 312 | // clear output compare value B |
||
| 313 | outb(OCR1BH, 0); |
||
| 314 | outb(OCR1BL, 0); |
||
| 315 | // clear output compare value C |
||
| 316 | outb(OCR1CH, 0); |
||
| 317 | outb(OCR1CL, 0); |
||
| 318 | } |
||
| 319 | |||
| 320 | void timer1PWMOff(void) |
||
| 321 | { |
||
| 322 | // turn off PWM on Timer1 |
||
| 323 | cbi(TCCR1A,WGMA1); |
||
| 324 | cbi(TCCR1A,WGMA0); |
||
| 325 | // clear (disable) clear-timer-on-compare-match |
||
| 326 | //cbi(TCCR1B,CTC1); |
||
| 327 | // set PWM1A/B/C (OutputCompare action) to none |
||
| 328 | timer1PWMAOff(); |
||
| 329 | timer1PWMBOff(); |
||
| 330 | timer1PWMCOff(); |
||
| 331 | } |
||
| 332 | |||
| 333 | void timer1PWMAOn(void) |
||
| 334 | { |
||
| 335 | // turn on channel A (OC1A) PWM output |
||
| 336 | // set OC1A as non-inverted PWM |
||
| 337 | sbi(TCCR1A,COMA1); |
||
| 338 | cbi(TCCR1A,COMA0); |
||
| 339 | } |
||
| 340 | |||
| 341 | void timer1PWMBOn(void) |
||
| 342 | { |
||
| 343 | // turn on channel B (OC1B) PWM output |
||
| 344 | // set OC1B as non-inverted PWM |
||
| 345 | sbi(TCCR1A,COMB1); |
||
| 346 | cbi(TCCR1A,COMB0); |
||
| 347 | } |
||
| 348 | |||
| 349 | void timer1PWMCOn(void) |
||
| 350 | { |
||
| 351 | // turn on channel C (OC1C) PWM output |
||
| 352 | // set OC1C as non-inverted PWM |
||
| 353 | sbi(TCCR1A,COMC1); |
||
| 354 | cbi(TCCR1A,COMC0); |
||
| 355 | } |
||
| 356 | |||
| 357 | void timer1PWMAOff(void) |
||
| 358 | { |
||
| 359 | // turn off channel A (OC1A) PWM output |
||
| 360 | // set OC1A (OutputCompare action) to none |
||
| 361 | cbi(TCCR1A,COMA1); |
||
| 362 | cbi(TCCR1A,COMA0); |
||
| 363 | } |
||
| 364 | |||
| 365 | void timer1PWMBOff(void) |
||
| 366 | { |
||
| 367 | // turn off channel B (OC1B) PWM output |
||
| 368 | // set OC1B (OutputCompare action) to none |
||
| 369 | cbi(TCCR1A,COMB1); |
||
| 370 | cbi(TCCR1A,COMB0); |
||
| 371 | } |
||
| 372 | |||
| 373 | void timer1PWMCOff(void) |
||
| 374 | { |
||
| 375 | // turn off channel C (OC1C) PWM output |
||
| 376 | // set OC1C (OutputCompare action) to none |
||
| 377 | cbi(TCCR1A,COMC1); |
||
| 378 | cbi(TCCR1A,COMC0); |
||
| 379 | } |
||
| 380 | |||
| 381 | void timer1PWMASet(u16 pwmDuty) |
||
| 382 | { |
||
| 383 | // set PWM (output compare) duty for channel A |
||
| 384 | // this PWM output is generated on OC1A pin |
||
| 385 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
||
| 386 | // pwmDuty should be in the range 0-511 for 9bit PWM |
||
| 387 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
||
| 388 | outb(OCR1AH, (pwmDuty>>8)); // set the high 8bits of OCR1A |
||
| 389 | outb(OCR1AL, (pwmDuty&0x00FF)); // set the low 8bits of OCR1A |
||
| 390 | } |
||
| 391 | |||
| 392 | void timer1PWMBSet(u16 pwmDuty) |
||
| 393 | { |
||
| 394 | // set PWM (output compare) duty for channel B |
||
| 395 | // this PWM output is generated on OC1B pin |
||
| 396 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
||
| 397 | // pwmDuty should be in the range 0-511 for 9bit PWM |
||
| 398 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
||
| 399 | outb(OCR1BH, (pwmDuty>>8)); // set the high 8bits of OCR1B |
||
| 400 | outb(OCR1BL, (pwmDuty&0x00FF)); // set the low 8bits of OCR1B |
||
| 401 | } |
||
| 402 | |||
| 403 | void timer1PWMCSet(u16 pwmDuty) |
||
| 404 | { |
||
| 405 | // set PWM (output compare) duty for channel C |
||
| 406 | // this PWM output is generated on OC1C pin |
||
| 407 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
||
| 408 | // pwmDuty should be in the range 0-511 for 9bit PWM |
||
| 409 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
||
| 410 | outb(OCR1CH, (pwmDuty>>8)); // set the high 8bits of OCR1C |
||
| 411 | outb(OCR1CL, (pwmDuty&0x00FF)); // set the low 8bits of OCR1C |
||
| 412 | } |
||
| 413 | |||
| 414 | |||
| 415 | void timer3PWMInit(u08 bitRes) |
||
| 416 | { |
||
| 417 | // configures timer1 for use with PWM output |
||
| 418 | // on pins OC3A, OC3B, and OC3C |
||
| 419 | |||
| 420 | // enable Timer3 as 8,9,10bit PWM |
||
| 421 | if(bitRes == 9) |
||
| 422 | { // 9bit mode |
||
| 423 | sbi(TCCR3A,WGMA1); |
||
| 424 | cbi(TCCR3A,WGMA0); |
||
| 425 | } |
||
| 426 | else if( bitRes == 10 ) |
||
| 427 | { // 10bit mode |
||
| 428 | sbi(TCCR3A,WGMA1); |
||
| 429 | sbi(TCCR3A,WGMA0); |
||
| 430 | } |
||
| 431 | else |
||
| 432 | { // default 8bit mode |
||
| 433 | cbi(TCCR3A,WGMA1); |
||
| 434 | sbi(TCCR3A,WGMA0); |
||
| 435 | } |
||
| 436 | |||
| 437 | // set clear-timer-on-compare-match |
||
| 438 | //cbi(TCCR3B,CTC1); |
||
| 439 | // clear output compare value A |
||
| 440 | outb(OCR3AH, 0); |
||
| 441 | outb(OCR3AL, 0); |
||
| 442 | // clear output compare value B |
||
| 443 | outb(OCR3BH, 0); |
||
| 444 | outb(OCR3BL, 0); |
||
| 445 | // clear output compare value B |
||
| 446 | outb(OCR3CH, 0); |
||
| 447 | outb(OCR3CL, 0); |
||
| 448 | } |
||
| 449 | |||
| 450 | void timer3PWMInitICR(u16 topcount) |
||
| 451 | { |
||
| 452 | // set PWM mode with ICR top-count |
||
| 453 | cbi(TCCR3A,WGM30); |
||
| 454 | sbi(TCCR3A,WGM31); |
||
| 455 | sbi(TCCR3B,WGM32); |
||
| 456 | sbi(TCCR3B,WGM33); |
||
| 457 | |||
| 458 | // set top count value |
||
| 459 | ICR3H = (u08)(topcount>>8); |
||
| 460 | ICR3L = (u08)topcount; |
||
| 461 | |||
| 462 | // clear output compare value A |
||
| 463 | outb(OCR3AH, 0); |
||
| 464 | outb(OCR3AL, 0); |
||
| 465 | // clear output compare value B |
||
| 466 | outb(OCR3BH, 0); |
||
| 467 | outb(OCR3BL, 0); |
||
| 468 | // clear output compare value C |
||
| 469 | outb(OCR3CH, 0); |
||
| 470 | outb(OCR3CL, 0); |
||
| 471 | } |
||
| 472 | |||
| 473 | void timer3PWMOff(void) |
||
| 474 | { |
||
| 475 | // turn off PWM mode on Timer3 |
||
| 476 | cbi(TCCR3A,WGMA1); |
||
| 477 | cbi(TCCR3A,WGMA0); |
||
| 478 | // clear (disable) clear-timer-on-compare-match |
||
| 479 | //cbi(TCCR3B,CTC1); |
||
| 480 | // set OC3A/B/C (OutputCompare action) to none |
||
| 481 | timer3PWMAOff(); |
||
| 482 | timer3PWMBOff(); |
||
| 483 | timer3PWMCOff(); |
||
| 484 | } |
||
| 485 | |||
| 486 | void timer3PWMAOn(void) |
||
| 487 | { |
||
| 488 | // turn on channel A (OC3A) PWM output |
||
| 489 | // set OC3A as non-inverted PWM |
||
| 490 | sbi(TCCR3A,COMA1); |
||
| 491 | cbi(TCCR3A,COMA0); |
||
| 492 | } |
||
| 493 | |||
| 494 | void timer3PWMBOn(void) |
||
| 495 | { |
||
| 496 | // turn on channel B (OC3B) PWM output |
||
| 497 | // set OC3B as non-inverted PWM |
||
| 498 | sbi(TCCR3A,COMB1); |
||
| 499 | cbi(TCCR3A,COMB0); |
||
| 500 | } |
||
| 501 | |||
| 502 | void timer3PWMCOn(void) |
||
| 503 | { |
||
| 504 | // turn on channel C (OC3C) PWM output |
||
| 505 | // set OC3C as non-inverted PWM |
||
| 506 | sbi(TCCR3A,COMC1); |
||
| 507 | cbi(TCCR3A,COMC0); |
||
| 508 | } |
||
| 509 | |||
| 510 | void timer3PWMAOff(void) |
||
| 511 | { |
||
| 512 | // turn off channel A (OC3A) PWM output |
||
| 513 | // set OC3A (OutputCompare action) to none |
||
| 514 | cbi(TCCR3A,COMA1); |
||
| 515 | cbi(TCCR3A,COMA0); |
||
| 516 | } |
||
| 517 | |||
| 518 | void timer3PWMBOff(void) |
||
| 519 | { |
||
| 520 | // turn off channel B (OC3B) PWM output |
||
| 521 | // set OC3B (OutputCompare action) to none |
||
| 522 | cbi(TCCR3A,COMB1); |
||
| 523 | cbi(TCCR3A,COMB0); |
||
| 524 | } |
||
| 525 | |||
| 526 | void timer3PWMCOff(void) |
||
| 527 | { |
||
| 528 | // turn off channel C (OC3C) PWM output |
||
| 529 | // set OC3C (OutputCompare action) to none |
||
| 530 | cbi(TCCR3A,COMC1); |
||
| 531 | cbi(TCCR3A,COMC0); |
||
| 532 | } |
||
| 533 | |||
| 534 | void timer3PWMASet(u16 pwmDuty) |
||
| 535 | { |
||
| 536 | // set PWM (output compare) duty for channel A |
||
| 537 | // this PWM output is generated on OC3A pin |
||
| 538 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
||
| 539 | // pwmDuty should be in the range 0-511 for 9bit PWM |
||
| 540 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
||
| 541 | outb(OCR3AH, (pwmDuty>>8)); // set the high 8bits of OCR3A |
||
| 542 | outb(OCR3AL, (pwmDuty&0x00FF)); // set the low 8bits of OCR3A |
||
| 543 | } |
||
| 544 | |||
| 545 | void timer3PWMBSet(u16 pwmDuty) |
||
| 546 | { |
||
| 547 | // set PWM (output compare) duty for channel B |
||
| 548 | // this PWM output is generated on OC3B pin |
||
| 549 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
||
| 550 | // pwmDuty should be in the range 0-511 for 9bit PWM |
||
| 551 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
||
| 552 | outb(OCR3BH, (pwmDuty>>8)); // set the high 8bits of OCR3B |
||
| 553 | outb(OCR3BL, (pwmDuty&0x00FF)); // set the low 8bits of OCR3B |
||
| 554 | } |
||
| 555 | |||
| 556 | void timer3PWMCSet(u16 pwmDuty) |
||
| 557 | { |
||
| 558 | // set PWM (output compare) duty for channel B |
||
| 559 | // this PWM output is generated on OC3C pin |
||
| 560 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
||
| 561 | // pwmDuty should be in the range 0-511 for 9bit PWM |
||
| 562 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
||
| 563 | outb(OCR3CH, (pwmDuty>>8)); // set the high 8bits of OCR3C |
||
| 564 | outb(OCR3CL, (pwmDuty&0x00FF)); // set the low 8bits of OCR3C |
||
| 565 | } |
||
| 566 | |||
| 567 | |||
| 568 | //! Interrupt handler for tcnt0 overflow interrupt |
||
| 569 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW0) |
||
| 570 | { |
||
| 571 | Timer0Reg0++; // increment low-order counter |
||
| 572 | if(!Timer0Reg0) // if low-order counter rollover |
||
| 573 | Timer0Reg1++; // increment high-order counter |
||
| 574 | |||
| 575 | // if a user function is defined, execute it too |
||
| 576 | if(TimerIntFunc[TIMER0OVERFLOW_INT]) |
||
| 577 | TimerIntFunc[TIMER0OVERFLOW_INT](); |
||
| 578 | } |
||
| 579 | |||
| 580 | //! Interrupt handler for Timer1 overflow interrupt |
||
| 581 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW1) |
||
| 582 | { |
||
| 583 | // if a user function is defined, execute it |
||
| 584 | if(TimerIntFunc[TIMER1OVERFLOW_INT]) |
||
| 585 | TimerIntFunc[TIMER1OVERFLOW_INT](); |
||
| 586 | } |
||
| 587 | |||
| 588 | //! Interrupt handler for Timer2 overflow interrupt |
||
| 589 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW2) |
||
| 590 | { |
||
| 591 | Timer2Reg0++; // increment low-order counter |
||
| 592 | if(!Timer2Reg0) // if low-order counter rollover |
||
| 593 | Timer2Reg1++; // increment high-order counter |
||
| 594 | |||
| 595 | // increment pause counter |
||
| 596 | TimerPauseReg++; |
||
| 597 | |||
| 598 | // if a user function is defined, execute it |
||
| 599 | if(TimerIntFunc[TIMER2OVERFLOW_INT]) |
||
| 600 | TimerIntFunc[TIMER2OVERFLOW_INT](); |
||
| 601 | } |
||
| 602 | |||
| 603 | //! Interrupt handler for Timer3 overflow interrupt |
||
| 604 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW3) |
||
| 605 | { |
||
| 606 | // if a user function is defined, execute it |
||
| 607 | if(TimerIntFunc[TIMER3OVERFLOW_INT]) |
||
| 608 | TimerIntFunc[TIMER3OVERFLOW_INT](); |
||
| 609 | } |
||
| 610 | |||
| 611 | //! Interrupt handler for OutputCompare0 match (OC0) interrupt |
||
| 612 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE0) |
||
| 613 | { |
||
| 614 | // if a user function is defined, execute it |
||
| 615 | if(TimerIntFunc[TIMER0OUTCOMPARE_INT]) |
||
| 616 | TimerIntFunc[TIMER0OUTCOMPARE_INT](); |
||
| 617 | } |
||
| 618 | |||
| 619 | //! Interrupt handler for OutputCompare1A match (OC1A) interrupt |
||
| 620 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE1A) |
||
| 621 | { |
||
| 622 | // if a user function is defined, execute it |
||
| 623 | if(TimerIntFunc[TIMER1OUTCOMPAREA_INT]) |
||
| 624 | TimerIntFunc[TIMER1OUTCOMPAREA_INT](); |
||
| 625 | } |
||
| 626 | |||
| 627 | //! Interrupt handler for OutputCompare1B match (OC1B) interrupt |
||
| 628 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE1B) |
||
| 629 | { |
||
| 630 | // if a user function is defined, execute it |
||
| 631 | if(TimerIntFunc[TIMER1OUTCOMPAREB_INT]) |
||
| 632 | TimerIntFunc[TIMER1OUTCOMPAREB_INT](); |
||
| 633 | } |
||
| 634 | |||
| 635 | //! Interrupt handler for OutputCompare1C match (OC1C) interrupt |
||
| 636 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE1C) |
||
| 637 | { |
||
| 638 | // if a user function is defined, execute it |
||
| 639 | if(TimerIntFunc[TIMER1OUTCOMPAREC_INT]) |
||
| 640 | TimerIntFunc[TIMER1OUTCOMPAREC_INT](); |
||
| 641 | } |
||
| 642 | |||
| 643 | //! Interrupt handler for InputCapture1(IC1) interrupt |
||
| 644 | TIMER_INTERRUPT_HANDLER(SIG_INPUT_CAPTURE1) |
||
| 645 | { |
||
| 646 | // if a user function is defined, execute it |
||
| 647 | if(TimerIntFunc[TIMER1INPUTCAPTURE_INT]) |
||
| 648 | TimerIntFunc[TIMER1INPUTCAPTURE_INT](); |
||
| 649 | } |
||
| 650 | |||
| 651 | //! Interrupt handler for OutputCompare2 match (OC2) interrupt |
||
| 652 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE2) |
||
| 653 | { |
||
| 654 | // if a user function is defined, execute it |
||
| 655 | if(TimerIntFunc[TIMER2OUTCOMPARE_INT]) |
||
| 656 | TimerIntFunc[TIMER2OUTCOMPARE_INT](); |
||
| 657 | } |
||
| 658 | |||
| 659 | //! Interrupt handler for OutputCompare3A match (OC3A) interrupt |
||
| 660 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE3A) |
||
| 661 | { |
||
| 662 | // if a user function is defined, execute it |
||
| 663 | if(TimerIntFunc[TIMER3OUTCOMPAREA_INT]) |
||
| 664 | TimerIntFunc[TIMER3OUTCOMPAREA_INT](); |
||
| 665 | } |
||
| 666 | |||
| 667 | //! Interrupt handler for OutputCompare3B match (OC3B) interrupt |
||
| 668 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE3B) |
||
| 669 | { |
||
| 670 | // if a user function is defined, execute it |
||
| 671 | if(TimerIntFunc[TIMER3OUTCOMPAREB_INT]) |
||
| 672 | TimerIntFunc[TIMER3OUTCOMPAREB_INT](); |
||
| 673 | } |
||
| 674 | |||
| 675 | //! Interrupt handler for OutputCompare3C match (OC3C) interrupt |
||
| 676 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE3C) |
||
| 677 | { |
||
| 678 | // if a user function is defined, execute it |
||
| 679 | if(TimerIntFunc[TIMER3OUTCOMPAREC_INT]) |
||
| 680 | TimerIntFunc[TIMER3OUTCOMPAREC_INT](); |
||
| 681 | } |
||
| 682 | |||
| 683 | //! Interrupt handler for InputCapture3 (IC3) interrupt |
||
| 684 | TIMER_INTERRUPT_HANDLER(SIG_INPUT_CAPTURE3) |
||
| 685 | { |
||
| 686 | // if a user function is defined, execute it |
||
| 687 | if(TimerIntFunc[TIMER3INPUTCAPTURE_INT]) |
||
| 688 | TimerIntFunc[TIMER3INPUTCAPTURE_INT](); |
||
| 689 | } |
Powered by WebSVN v2.8.3