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1 | 6 | kaklik | /*! \file timer128.c \brief System Timer function library for Mega128. */ |
2 | //***************************************************************************** |
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3 | // |
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4 | // File Name : 'timer128.c' |
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5 | // Title : System Timer function library for Mega128 |
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6 | // Author : Pascal Stang - Copyright (C) 2000-2003 |
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7 | // Created : 11/22/2000 |
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8 | // Revised : 02/24/2003 |
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9 | // Version : 1.2 |
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10 | // Target MCU : Atmel AVR Series |
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11 | // Editor Tabs : 4 |
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12 | // |
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13 | // This code is distributed under the GNU Public License |
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14 | // which can be found at http://www.gnu.org/licenses/gpl.txt |
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15 | // |
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16 | //***************************************************************************** |
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17 | |||
18 | #include <avr/io.h> |
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19 | #include <avr/interrupt.h> |
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20 | #include <avr/pgmspace.h> |
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21 | #include <avr/sleep.h> |
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22 | |||
23 | #include "global.h" |
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24 | #include "timer128.h" |
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25 | |||
26 | // Program ROM constants |
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27 | // the prescale division values stored in order of timer control register index |
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28 | // STOP, CLK, CLK/8, CLK/64, CLK/256, CLK/1024 |
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29 | unsigned short __attribute__ ((progmem)) TimerPrescaleFactor[] = {0,1,8,64,256,1024}; |
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30 | // the prescale division values stored in order of timer control register index |
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31 | // STOP, CLK, CLK/8, CLK/32, CLK/64, CLK/128, CLK/256, CLK/1024 |
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32 | unsigned short __attribute__ ((progmem)) TimerRTCPrescaleFactor[] = {0,1,8,32,64,128,256,1024}; |
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33 | |||
34 | // Global variables |
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35 | // time registers |
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36 | volatile unsigned long TimerPauseReg; |
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37 | volatile unsigned long Timer0Reg0; |
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38 | volatile unsigned long Timer0Reg1; |
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39 | volatile unsigned long Timer2Reg0; |
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40 | volatile unsigned long Timer2Reg1; |
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41 | |||
42 | typedef void (*voidFuncPtr)(void); |
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43 | volatile static voidFuncPtr TimerIntFunc[TIMER_NUM_INTERRUPTS]; |
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44 | |||
45 | // delay for a minimum of <us> microseconds |
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46 | // the time resolution is dependent on the time the loop takes |
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47 | // e.g. with 4Mhz and 5 cycles per loop, the resolution is 1.25 us |
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48 | void delay_us(unsigned short time_us) |
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49 | { |
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50 | unsigned short delay_loops; |
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51 | register unsigned short i; |
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52 | |||
53 | delay_loops = (time_us+3)/5*CYCLES_PER_US; // +3 for rounding up (dirty) |
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54 | |||
55 | // one loop takes 5 cpu cycles |
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56 | for (i=0; i < delay_loops; i++) {}; |
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57 | } |
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58 | /* |
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59 | void delay_ms(unsigned char time_ms) |
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60 | { |
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61 | unsigned short delay_count = F_CPU / 4000; |
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62 | |||
63 | unsigned short cnt; |
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64 | asm volatile ("\n" |
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65 | "L_dl1%=:\n\t" |
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66 | "mov %A0, %A2\n\t" |
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67 | "mov %B0, %B2\n" |
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68 | "L_dl2%=:\n\t" |
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69 | "sbiw %A0, 1\n\t" |
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70 | "brne L_dl2%=\n\t" |
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71 | "dec %1\n\t" "brne L_dl1%=\n\t":"=&w" (cnt) |
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72 | :"r"(time_ms), "r"((unsigned short) (delay_count)) |
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73 | ); |
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74 | } |
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75 | */ |
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76 | void timerInit(void) |
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77 | { |
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78 | u08 intNum; |
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79 | // detach all user functions from interrupts |
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80 | for(intNum=0; intNum<TIMER_NUM_INTERRUPTS; intNum++) |
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81 | timerDetach(intNum); |
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82 | |||
83 | // initialize all timers |
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84 | timer0Init(); |
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85 | timer1Init(); |
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86 | timer2Init(); |
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87 | timer3Init(); |
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88 | // enable interrupts |
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89 | sei(); |
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90 | } |
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91 | |||
92 | void timer0Init() |
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93 | { |
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94 | // initialize timer 0 |
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95 | timer0SetPrescaler( TIMER0PRESCALE ); // set prescaler |
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96 | outb(TCNT0, 0); // reset TCNT0 |
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97 | sbi(TIMSK, TOIE0); // enable TCNT0 overflow interrupt |
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98 | |||
99 | timer0ClearOverflowCount(); // initialize time registers |
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100 | } |
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101 | |||
102 | void timer1Init(void) |
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103 | { |
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104 | // initialize timer 1 |
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105 | timer1SetPrescaler( TIMER1PRESCALE ); // set prescaler |
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106 | outb(TCNT1H, 0); // reset TCNT1 |
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107 | outb(TCNT1L, 0); |
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108 | sbi(TIMSK, TOIE1); // enable TCNT1 overflow |
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109 | } |
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110 | |||
111 | void timer2Init(void) |
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112 | { |
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113 | // initialize timer 2 |
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114 | timer2SetPrescaler( TIMER2PRESCALE ); // set prescaler |
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115 | outb(TCNT2, 0); // reset TCNT2 |
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116 | sbi(TIMSK, TOIE2); // enable TCNT2 overflow |
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117 | |||
118 | timer2ClearOverflowCount(); // initialize time registers |
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119 | } |
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120 | |||
121 | void timer3Init(void) |
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122 | { |
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123 | // initialize timer 3 |
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124 | timer3SetPrescaler( TIMER3PRESCALE ); // set prescaler |
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125 | outb(TCNT3H, 0); // reset TCNT3 |
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126 | outb(TCNT3L, 0); |
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127 | sbi(ETIMSK, TOIE3); // enable TCNT3 overflow |
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128 | } |
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129 | |||
130 | void timer0SetPrescaler(u08 prescale) |
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131 | { |
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132 | // set prescaler on timer 0 |
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133 | outb(TCCR0, (inb(TCCR0) & ~TIMER_PRESCALE_MASK) | prescale); |
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134 | } |
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135 | |||
136 | void timer1SetPrescaler(u08 prescale) |
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137 | { |
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138 | // set prescaler on timer 1 |
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139 | outb(TCCR1B, (inb(TCCR1B) & ~TIMER_PRESCALE_MASK) | prescale); |
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140 | } |
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141 | |||
142 | void timer2SetPrescaler(u08 prescale) |
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143 | { |
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144 | // set prescaler on timer 2 |
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145 | outb(TCCR2, (inb(TCCR2) & ~TIMER_PRESCALE_MASK) | prescale); |
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146 | } |
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147 | |||
148 | void timer3SetPrescaler(u08 prescale) |
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149 | { |
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150 | // set prescaler on timer 2 |
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151 | outb(TCCR3B, (inb(TCCR3B) & ~TIMER_PRESCALE_MASK) | prescale); |
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152 | } |
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153 | |||
154 | u16 timer0GetPrescaler(void) |
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155 | { |
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156 | // get the current prescaler setting |
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157 | return (pgm_read_word(TimerPrescaleFactor+(inb(TCCR0) & TIMER_PRESCALE_MASK))); |
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158 | } |
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159 | |||
160 | u16 timer1GetPrescaler(void) |
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161 | { |
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162 | // get the current prescaler setting |
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163 | return (pgm_read_word(TimerPrescaleFactor+(inb(TCCR1B) & TIMER_PRESCALE_MASK))); |
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164 | } |
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165 | |||
166 | u16 timer2GetPrescaler(void) |
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167 | { |
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168 | // get the current prescaler setting |
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169 | return (pgm_read_word(TimerPrescaleFactor+(inb(TCCR2) & TIMER_PRESCALE_MASK))); |
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170 | } |
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171 | |||
172 | u16 timer3GetPrescaler(void) |
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173 | { |
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174 | // get the current prescaler setting |
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175 | return (pgm_read_word(TimerPrescaleFactor+(inb(TCCR3B) & TIMER_PRESCALE_MASK))); |
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176 | } |
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177 | |||
178 | void timerAttach(u08 interruptNum, void (*userFunc)(void) ) |
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179 | { |
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180 | // make sure the interrupt number is within bounds |
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181 | if(interruptNum < TIMER_NUM_INTERRUPTS) |
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182 | { |
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183 | // set the interrupt function to run |
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184 | // the supplied user's function |
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185 | TimerIntFunc[interruptNum] = userFunc; |
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186 | } |
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187 | } |
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188 | |||
189 | void timerDetach(u08 interruptNum) |
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190 | { |
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191 | // make sure the interrupt number is within bounds |
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192 | if(interruptNum < TIMER_NUM_INTERRUPTS) |
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193 | { |
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194 | // set the interrupt function to run nothing |
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195 | TimerIntFunc[interruptNum] = 0; |
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196 | } |
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197 | } |
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198 | |||
199 | void timerPause(unsigned short pause_ms) |
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200 | { |
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201 | // pauses for exactly <pause_ms> number of milliseconds |
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202 | u08 timerThres; |
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203 | u32 ticRateHz; |
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204 | u32 pause; |
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205 | |||
206 | // capture current pause timer value |
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207 | timerThres = inb(TCNT2); |
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208 | // reset pause timer overflow count |
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209 | TimerPauseReg = 0; |
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210 | // calculate delay for [pause_ms] milliseconds |
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211 | // prescaler division = 1<<(pgm_read_byte(TimerPrescaleFactor+inb(TCCR2))) |
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212 | ticRateHz = F_CPU/timer2GetPrescaler(); |
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213 | // precision management |
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214 | // prevent overflow and precision underflow |
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215 | // -could add more conditions to improve accuracy |
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216 | if( ((ticRateHz < 429497) && (pause_ms <= 10000)) ) |
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217 | pause = (pause_ms*ticRateHz)/1000; |
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218 | else |
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219 | pause = pause_ms*(ticRateHz/1000); |
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220 | |||
221 | // loop until time expires |
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222 | while( ((TimerPauseReg<<8) | inb(TCNT2)) < (pause+timerThres) ) |
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223 | { |
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224 | if( TimerPauseReg < (pause>>8)); |
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225 | { |
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226 | // save power by idling the processor |
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227 | set_sleep_mode(SLEEP_MODE_IDLE); |
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228 | sleep_mode(); |
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229 | } |
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230 | } |
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231 | } |
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232 | |||
233 | void timer0ClearOverflowCount(void) |
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234 | { |
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235 | // clear the timer overflow counter registers |
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236 | Timer0Reg0 = 0; // initialize time registers |
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237 | Timer0Reg1 = 0; // initialize time registers |
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238 | } |
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239 | |||
240 | long timer0GetOverflowCount(void) |
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241 | { |
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242 | // return the current timer overflow count |
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243 | // (this is since the last timer0ClearOverflowCount() command was called) |
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244 | return Timer0Reg0; |
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245 | } |
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246 | |||
247 | void timer2ClearOverflowCount(void) |
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248 | { |
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249 | // clear the timer overflow counter registers |
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250 | Timer2Reg0 = 0; // initialize time registers |
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251 | Timer2Reg1 = 0; // initialize time registers |
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252 | } |
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253 | |||
254 | long timer2GetOverflowCount(void) |
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255 | { |
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256 | // return the current timer overflow count |
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257 | // (this is since the last timer2ClearOverflowCount() command was called) |
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258 | return Timer2Reg0; |
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259 | } |
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260 | |||
261 | |||
262 | void timer1PWMInit(u08 bitRes) |
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263 | { |
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264 | // configures timer1 for use with PWM output |
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265 | // on pins OC1A, OC1B, and OC1C |
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266 | |||
267 | // enable Timer1 as 8,9,10bit PWM |
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268 | if(bitRes == 9) |
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269 | { // 9bit mode |
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270 | sbi(TCCR1A,WGMA1); |
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271 | cbi(TCCR1A,WGMA0); |
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272 | } |
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273 | else if( bitRes == 10 ) |
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274 | { // 10bit mode |
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275 | sbi(TCCR1A,WGMA1); |
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276 | sbi(TCCR1A,WGMA0); |
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277 | } |
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278 | else |
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279 | { // default 8bit mode |
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280 | cbi(TCCR1A,WGMA1); |
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281 | sbi(TCCR1A,WGMA0); |
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282 | } |
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283 | |||
284 | // set clear-timer-on-compare-match |
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285 | //cbi(TCCR1B,CTC1); |
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286 | // clear output compare value A |
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287 | outb(OCR1AH, 0); |
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288 | outb(OCR1AL, 0); |
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289 | // clear output compare value B |
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290 | outb(OCR1BH, 0); |
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291 | outb(OCR1BL, 0); |
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292 | // clear output compare value C |
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293 | outb(OCR1CH, 0); |
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294 | outb(OCR1CL, 0); |
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295 | } |
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296 | |||
297 | void timer1PWMInitICR(u16 topcount) |
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298 | { |
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299 | // set PWM mode with ICR top-count |
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300 | cbi(TCCR1A,WGM10); |
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301 | sbi(TCCR1A,WGM11); |
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302 | sbi(TCCR1B,WGM12); |
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303 | sbi(TCCR1B,WGM13); |
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304 | |||
305 | // set top count value |
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306 | ICR1H = (u08)(topcount>>8); |
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307 | ICR1L = (u08)topcount; |
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308 | |||
309 | // clear output compare value A |
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310 | outb(OCR1AH, 0); |
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311 | outb(OCR1AL, 0); |
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312 | // clear output compare value B |
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313 | outb(OCR1BH, 0); |
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314 | outb(OCR1BL, 0); |
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315 | // clear output compare value C |
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316 | outb(OCR1CH, 0); |
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317 | outb(OCR1CL, 0); |
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318 | } |
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319 | |||
320 | void timer1PWMOff(void) |
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321 | { |
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322 | // turn off PWM on Timer1 |
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323 | cbi(TCCR1A,WGMA1); |
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324 | cbi(TCCR1A,WGMA0); |
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325 | // clear (disable) clear-timer-on-compare-match |
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326 | //cbi(TCCR1B,CTC1); |
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327 | // set PWM1A/B/C (OutputCompare action) to none |
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328 | timer1PWMAOff(); |
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329 | timer1PWMBOff(); |
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330 | timer1PWMCOff(); |
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331 | } |
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332 | |||
333 | void timer1PWMAOn(void) |
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334 | { |
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335 | // turn on channel A (OC1A) PWM output |
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336 | // set OC1A as non-inverted PWM |
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337 | sbi(TCCR1A,COMA1); |
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338 | cbi(TCCR1A,COMA0); |
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339 | } |
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340 | |||
341 | void timer1PWMBOn(void) |
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342 | { |
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343 | // turn on channel B (OC1B) PWM output |
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344 | // set OC1B as non-inverted PWM |
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345 | sbi(TCCR1A,COMB1); |
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346 | cbi(TCCR1A,COMB0); |
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347 | } |
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348 | |||
349 | void timer1PWMCOn(void) |
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350 | { |
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351 | // turn on channel C (OC1C) PWM output |
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352 | // set OC1C as non-inverted PWM |
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353 | sbi(TCCR1A,COMC1); |
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354 | cbi(TCCR1A,COMC0); |
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355 | } |
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356 | |||
357 | void timer1PWMAOff(void) |
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358 | { |
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359 | // turn off channel A (OC1A) PWM output |
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360 | // set OC1A (OutputCompare action) to none |
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361 | cbi(TCCR1A,COMA1); |
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362 | cbi(TCCR1A,COMA0); |
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363 | } |
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364 | |||
365 | void timer1PWMBOff(void) |
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366 | { |
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367 | // turn off channel B (OC1B) PWM output |
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368 | // set OC1B (OutputCompare action) to none |
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369 | cbi(TCCR1A,COMB1); |
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370 | cbi(TCCR1A,COMB0); |
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371 | } |
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372 | |||
373 | void timer1PWMCOff(void) |
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374 | { |
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375 | // turn off channel C (OC1C) PWM output |
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376 | // set OC1C (OutputCompare action) to none |
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377 | cbi(TCCR1A,COMC1); |
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378 | cbi(TCCR1A,COMC0); |
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379 | } |
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380 | |||
381 | void timer1PWMASet(u16 pwmDuty) |
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382 | { |
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383 | // set PWM (output compare) duty for channel A |
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384 | // this PWM output is generated on OC1A pin |
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385 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
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386 | // pwmDuty should be in the range 0-511 for 9bit PWM |
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387 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
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388 | outb(OCR1AH, (pwmDuty>>8)); // set the high 8bits of OCR1A |
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389 | outb(OCR1AL, (pwmDuty&0x00FF)); // set the low 8bits of OCR1A |
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390 | } |
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391 | |||
392 | void timer1PWMBSet(u16 pwmDuty) |
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393 | { |
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394 | // set PWM (output compare) duty for channel B |
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395 | // this PWM output is generated on OC1B pin |
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396 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
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397 | // pwmDuty should be in the range 0-511 for 9bit PWM |
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398 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
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399 | outb(OCR1BH, (pwmDuty>>8)); // set the high 8bits of OCR1B |
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400 | outb(OCR1BL, (pwmDuty&0x00FF)); // set the low 8bits of OCR1B |
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401 | } |
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402 | |||
403 | void timer1PWMCSet(u16 pwmDuty) |
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404 | { |
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405 | // set PWM (output compare) duty for channel C |
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406 | // this PWM output is generated on OC1C pin |
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407 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
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408 | // pwmDuty should be in the range 0-511 for 9bit PWM |
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409 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
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410 | outb(OCR1CH, (pwmDuty>>8)); // set the high 8bits of OCR1C |
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411 | outb(OCR1CL, (pwmDuty&0x00FF)); // set the low 8bits of OCR1C |
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412 | } |
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413 | |||
414 | |||
415 | void timer3PWMInit(u08 bitRes) |
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416 | { |
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417 | // configures timer1 for use with PWM output |
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418 | // on pins OC3A, OC3B, and OC3C |
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419 | |||
420 | // enable Timer3 as 8,9,10bit PWM |
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421 | if(bitRes == 9) |
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422 | { // 9bit mode |
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423 | sbi(TCCR3A,WGMA1); |
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424 | cbi(TCCR3A,WGMA0); |
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425 | } |
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426 | else if( bitRes == 10 ) |
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427 | { // 10bit mode |
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428 | sbi(TCCR3A,WGMA1); |
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429 | sbi(TCCR3A,WGMA0); |
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430 | } |
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431 | else |
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432 | { // default 8bit mode |
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433 | cbi(TCCR3A,WGMA1); |
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434 | sbi(TCCR3A,WGMA0); |
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435 | } |
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436 | |||
437 | // set clear-timer-on-compare-match |
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438 | //cbi(TCCR3B,CTC1); |
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439 | // clear output compare value A |
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440 | outb(OCR3AH, 0); |
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441 | outb(OCR3AL, 0); |
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442 | // clear output compare value B |
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443 | outb(OCR3BH, 0); |
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444 | outb(OCR3BL, 0); |
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445 | // clear output compare value B |
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446 | outb(OCR3CH, 0); |
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447 | outb(OCR3CL, 0); |
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448 | } |
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449 | |||
450 | void timer3PWMInitICR(u16 topcount) |
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451 | { |
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452 | // set PWM mode with ICR top-count |
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453 | cbi(TCCR3A,WGM30); |
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454 | sbi(TCCR3A,WGM31); |
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455 | sbi(TCCR3B,WGM32); |
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456 | sbi(TCCR3B,WGM33); |
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457 | |||
458 | // set top count value |
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459 | ICR3H = (u08)(topcount>>8); |
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460 | ICR3L = (u08)topcount; |
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461 | |||
462 | // clear output compare value A |
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463 | outb(OCR3AH, 0); |
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464 | outb(OCR3AL, 0); |
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465 | // clear output compare value B |
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466 | outb(OCR3BH, 0); |
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467 | outb(OCR3BL, 0); |
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468 | // clear output compare value C |
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469 | outb(OCR3CH, 0); |
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470 | outb(OCR3CL, 0); |
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471 | } |
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472 | |||
473 | void timer3PWMOff(void) |
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474 | { |
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475 | // turn off PWM mode on Timer3 |
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476 | cbi(TCCR3A,WGMA1); |
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477 | cbi(TCCR3A,WGMA0); |
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478 | // clear (disable) clear-timer-on-compare-match |
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479 | //cbi(TCCR3B,CTC1); |
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480 | // set OC3A/B/C (OutputCompare action) to none |
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481 | timer3PWMAOff(); |
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482 | timer3PWMBOff(); |
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483 | timer3PWMCOff(); |
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484 | } |
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485 | |||
486 | void timer3PWMAOn(void) |
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487 | { |
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488 | // turn on channel A (OC3A) PWM output |
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489 | // set OC3A as non-inverted PWM |
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490 | sbi(TCCR3A,COMA1); |
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491 | cbi(TCCR3A,COMA0); |
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492 | } |
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493 | |||
494 | void timer3PWMBOn(void) |
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495 | { |
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496 | // turn on channel B (OC3B) PWM output |
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497 | // set OC3B as non-inverted PWM |
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498 | sbi(TCCR3A,COMB1); |
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499 | cbi(TCCR3A,COMB0); |
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500 | } |
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501 | |||
502 | void timer3PWMCOn(void) |
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503 | { |
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504 | // turn on channel C (OC3C) PWM output |
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505 | // set OC3C as non-inverted PWM |
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506 | sbi(TCCR3A,COMC1); |
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507 | cbi(TCCR3A,COMC0); |
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508 | } |
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509 | |||
510 | void timer3PWMAOff(void) |
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511 | { |
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512 | // turn off channel A (OC3A) PWM output |
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513 | // set OC3A (OutputCompare action) to none |
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514 | cbi(TCCR3A,COMA1); |
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515 | cbi(TCCR3A,COMA0); |
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516 | } |
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517 | |||
518 | void timer3PWMBOff(void) |
||
519 | { |
||
520 | // turn off channel B (OC3B) PWM output |
||
521 | // set OC3B (OutputCompare action) to none |
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522 | cbi(TCCR3A,COMB1); |
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523 | cbi(TCCR3A,COMB0); |
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524 | } |
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525 | |||
526 | void timer3PWMCOff(void) |
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527 | { |
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528 | // turn off channel C (OC3C) PWM output |
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529 | // set OC3C (OutputCompare action) to none |
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530 | cbi(TCCR3A,COMC1); |
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531 | cbi(TCCR3A,COMC0); |
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532 | } |
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533 | |||
534 | void timer3PWMASet(u16 pwmDuty) |
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535 | { |
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536 | // set PWM (output compare) duty for channel A |
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537 | // this PWM output is generated on OC3A pin |
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538 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
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539 | // pwmDuty should be in the range 0-511 for 9bit PWM |
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540 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
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541 | outb(OCR3AH, (pwmDuty>>8)); // set the high 8bits of OCR3A |
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542 | outb(OCR3AL, (pwmDuty&0x00FF)); // set the low 8bits of OCR3A |
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543 | } |
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544 | |||
545 | void timer3PWMBSet(u16 pwmDuty) |
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546 | { |
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547 | // set PWM (output compare) duty for channel B |
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548 | // this PWM output is generated on OC3B pin |
||
549 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
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550 | // pwmDuty should be in the range 0-511 for 9bit PWM |
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551 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
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552 | outb(OCR3BH, (pwmDuty>>8)); // set the high 8bits of OCR3B |
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553 | outb(OCR3BL, (pwmDuty&0x00FF)); // set the low 8bits of OCR3B |
||
554 | } |
||
555 | |||
556 | void timer3PWMCSet(u16 pwmDuty) |
||
557 | { |
||
558 | // set PWM (output compare) duty for channel B |
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559 | // this PWM output is generated on OC3C pin |
||
560 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
||
561 | // pwmDuty should be in the range 0-511 for 9bit PWM |
||
562 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
||
563 | outb(OCR3CH, (pwmDuty>>8)); // set the high 8bits of OCR3C |
||
564 | outb(OCR3CL, (pwmDuty&0x00FF)); // set the low 8bits of OCR3C |
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565 | } |
||
566 | |||
567 | |||
568 | //! Interrupt handler for tcnt0 overflow interrupt |
||
569 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW0) |
||
570 | { |
||
571 | Timer0Reg0++; // increment low-order counter |
||
572 | if(!Timer0Reg0) // if low-order counter rollover |
||
573 | Timer0Reg1++; // increment high-order counter |
||
574 | |||
575 | // if a user function is defined, execute it too |
||
576 | if(TimerIntFunc[TIMER0OVERFLOW_INT]) |
||
577 | TimerIntFunc[TIMER0OVERFLOW_INT](); |
||
578 | } |
||
579 | |||
580 | //! Interrupt handler for Timer1 overflow interrupt |
||
581 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW1) |
||
582 | { |
||
583 | // if a user function is defined, execute it |
||
584 | if(TimerIntFunc[TIMER1OVERFLOW_INT]) |
||
585 | TimerIntFunc[TIMER1OVERFLOW_INT](); |
||
586 | } |
||
587 | |||
588 | //! Interrupt handler for Timer2 overflow interrupt |
||
589 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW2) |
||
590 | { |
||
591 | Timer2Reg0++; // increment low-order counter |
||
592 | if(!Timer2Reg0) // if low-order counter rollover |
||
593 | Timer2Reg1++; // increment high-order counter |
||
594 | |||
595 | // increment pause counter |
||
596 | TimerPauseReg++; |
||
597 | |||
598 | // if a user function is defined, execute it |
||
599 | if(TimerIntFunc[TIMER2OVERFLOW_INT]) |
||
600 | TimerIntFunc[TIMER2OVERFLOW_INT](); |
||
601 | } |
||
602 | |||
603 | //! Interrupt handler for Timer3 overflow interrupt |
||
604 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW3) |
||
605 | { |
||
606 | // if a user function is defined, execute it |
||
607 | if(TimerIntFunc[TIMER3OVERFLOW_INT]) |
||
608 | TimerIntFunc[TIMER3OVERFLOW_INT](); |
||
609 | } |
||
610 | |||
611 | //! Interrupt handler for OutputCompare0 match (OC0) interrupt |
||
612 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE0) |
||
613 | { |
||
614 | // if a user function is defined, execute it |
||
615 | if(TimerIntFunc[TIMER0OUTCOMPARE_INT]) |
||
616 | TimerIntFunc[TIMER0OUTCOMPARE_INT](); |
||
617 | } |
||
618 | |||
619 | //! Interrupt handler for OutputCompare1A match (OC1A) interrupt |
||
620 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE1A) |
||
621 | { |
||
622 | // if a user function is defined, execute it |
||
623 | if(TimerIntFunc[TIMER1OUTCOMPAREA_INT]) |
||
624 | TimerIntFunc[TIMER1OUTCOMPAREA_INT](); |
||
625 | } |
||
626 | |||
627 | //! Interrupt handler for OutputCompare1B match (OC1B) interrupt |
||
628 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE1B) |
||
629 | { |
||
630 | // if a user function is defined, execute it |
||
631 | if(TimerIntFunc[TIMER1OUTCOMPAREB_INT]) |
||
632 | TimerIntFunc[TIMER1OUTCOMPAREB_INT](); |
||
633 | } |
||
634 | |||
635 | //! Interrupt handler for OutputCompare1C match (OC1C) interrupt |
||
636 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE1C) |
||
637 | { |
||
638 | // if a user function is defined, execute it |
||
639 | if(TimerIntFunc[TIMER1OUTCOMPAREC_INT]) |
||
640 | TimerIntFunc[TIMER1OUTCOMPAREC_INT](); |
||
641 | } |
||
642 | |||
643 | //! Interrupt handler for InputCapture1(IC1) interrupt |
||
644 | TIMER_INTERRUPT_HANDLER(SIG_INPUT_CAPTURE1) |
||
645 | { |
||
646 | // if a user function is defined, execute it |
||
647 | if(TimerIntFunc[TIMER1INPUTCAPTURE_INT]) |
||
648 | TimerIntFunc[TIMER1INPUTCAPTURE_INT](); |
||
649 | } |
||
650 | |||
651 | //! Interrupt handler for OutputCompare2 match (OC2) interrupt |
||
652 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE2) |
||
653 | { |
||
654 | // if a user function is defined, execute it |
||
655 | if(TimerIntFunc[TIMER2OUTCOMPARE_INT]) |
||
656 | TimerIntFunc[TIMER2OUTCOMPARE_INT](); |
||
657 | } |
||
658 | |||
659 | //! Interrupt handler for OutputCompare3A match (OC3A) interrupt |
||
660 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE3A) |
||
661 | { |
||
662 | // if a user function is defined, execute it |
||
663 | if(TimerIntFunc[TIMER3OUTCOMPAREA_INT]) |
||
664 | TimerIntFunc[TIMER3OUTCOMPAREA_INT](); |
||
665 | } |
||
666 | |||
667 | //! Interrupt handler for OutputCompare3B match (OC3B) interrupt |
||
668 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE3B) |
||
669 | { |
||
670 | // if a user function is defined, execute it |
||
671 | if(TimerIntFunc[TIMER3OUTCOMPAREB_INT]) |
||
672 | TimerIntFunc[TIMER3OUTCOMPAREB_INT](); |
||
673 | } |
||
674 | |||
675 | //! Interrupt handler for OutputCompare3C match (OC3C) interrupt |
||
676 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE3C) |
||
677 | { |
||
678 | // if a user function is defined, execute it |
||
679 | if(TimerIntFunc[TIMER3OUTCOMPAREC_INT]) |
||
680 | TimerIntFunc[TIMER3OUTCOMPAREC_INT](); |
||
681 | } |
||
682 | |||
683 | //! Interrupt handler for InputCapture3 (IC3) interrupt |
||
684 | TIMER_INTERRUPT_HANDLER(SIG_INPUT_CAPTURE3) |
||
685 | { |
||
686 | // if a user function is defined, execute it |
||
687 | if(TimerIntFunc[TIMER3INPUTCAPTURE_INT]) |
||
688 | TimerIntFunc[TIMER3INPUTCAPTURE_INT](); |
||
689 | } |
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