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1 | 6 | kaklik | /*! \file timerx8.c \brief Timer function library for ATmegaXX8 Processors. */ |
2 | //***************************************************************************** |
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3 | // |
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4 | // File Name : 'timerx8.c' |
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5 | // Title : Timer function library for ATmegaXX8 Processors |
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6 | // Author : Pascal Stang - Copyright (C) 2000-2005 |
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7 | // Created : 11/22/2000 |
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8 | // Revised : 06/15/2005 |
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9 | // Version : 1.0 |
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10 | // Target MCU : Atmel AVR Series |
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11 | // Editor Tabs : 4 |
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12 | // |
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13 | // This code is distributed under the GNU Public License |
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14 | // which can be found at http://www.gnu.org/licenses/gpl.txt |
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15 | // |
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16 | //***************************************************************************** |
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17 | |||
18 | #include <avr/io.h> |
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19 | #include <avr/interrupt.h> |
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20 | #include <avr/pgmspace.h> |
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21 | #include <avr/sleep.h> |
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22 | |||
23 | #include "global.h" |
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24 | #include "timerx8.h" |
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25 | |||
26 | // Program ROM constants |
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27 | // the prescale division values stored in order of timer control register index |
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28 | // STOP, CLK, CLK/8, CLK/64, CLK/256, CLK/1024 |
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29 | unsigned short __attribute__ ((progmem)) TimerPrescaleFactor[] = {0,1,8,64,256,1024}; |
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30 | // the prescale division values stored in order of timer control register index |
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31 | // STOP, CLK, CLK/8, CLK/32, CLK/64, CLK/128, CLK/256, CLK/1024 |
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32 | unsigned short __attribute__ ((progmem)) TimerRTCPrescaleFactor[] = {0,1,8,32,64,128,256,1024}; |
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33 | |||
34 | // Global variables |
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35 | // time registers |
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36 | volatile unsigned long TimerPauseReg; |
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37 | volatile unsigned long Timer0Reg0; |
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38 | volatile unsigned long Timer2Reg0; |
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39 | |||
40 | typedef void (*voidFuncPtr)(void); |
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41 | volatile static voidFuncPtr TimerIntFunc[TIMER_NUM_INTERRUPTS]; |
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42 | |||
43 | // delay for a minimum of <us> microseconds |
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44 | // the time resolution is dependent on the time the loop takes |
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45 | // e.g. with 4Mhz and 5 cycles per loop, the resolution is 1.25 us |
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46 | void delay_us(unsigned short time_us) |
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47 | { |
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48 | unsigned short delay_loops; |
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49 | register unsigned short i; |
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50 | |||
51 | delay_loops = (time_us+3)/5*CYCLES_PER_US; // +3 for rounding up (dirty) |
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52 | |||
53 | // one loop takes 5 cpu cycles |
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54 | for (i=0; i < delay_loops; i++) {}; |
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55 | } |
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56 | /* |
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57 | void delay_ms(unsigned char time_ms) |
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58 | { |
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59 | unsigned short delay_count = F_CPU / 4000; |
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60 | |||
61 | unsigned short cnt; |
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62 | asm volatile ("\n" |
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63 | "L_dl1%=:\n\t" |
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64 | "mov %A0, %A2\n\t" |
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65 | "mov %B0, %B2\n" |
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66 | "L_dl2%=:\n\t" |
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67 | "sbiw %A0, 1\n\t" |
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68 | "brne L_dl2%=\n\t" |
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69 | "dec %1\n\t" "brne L_dl1%=\n\t":"=&w" (cnt) |
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70 | :"r"(time_ms), "r"((unsigned short) (delay_count)) |
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71 | ); |
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72 | } |
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73 | */ |
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74 | void timerInit(void) |
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75 | { |
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76 | u08 intNum; |
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77 | // detach all user functions from interrupts |
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78 | for(intNum=0; intNum<TIMER_NUM_INTERRUPTS; intNum++) |
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79 | timerDetach(intNum); |
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80 | |||
81 | // initialize all timers |
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82 | timer0Init(); |
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83 | timer1Init(); |
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84 | #ifdef TCNT2 // support timer2 only if it exists |
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85 | timer2Init(); |
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86 | #endif |
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87 | // enable interrupts |
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88 | sei(); |
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89 | } |
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90 | |||
91 | void timer0Init() |
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92 | { |
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93 | // initialize timer 0 |
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94 | timer0SetPrescaler( TIMER0PRESCALE ); // set prescaler |
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95 | TCNT0 = 0; // reset TCNT0 |
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96 | sbi(TIMSK0, TOIE0); // enable TCNT0 overflow interrupt |
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97 | |||
98 | timer0ClearOverflowCount(); // initialize time registers |
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99 | } |
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100 | |||
101 | void timer1Init(void) |
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102 | { |
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103 | // initialize timer 1 |
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104 | timer1SetPrescaler( TIMER1PRESCALE ); // set prescaler |
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105 | TCNT1 = 0; // reset TCNT1 |
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106 | sbi(TIMSK1, TOIE1); // enable TCNT1 overflow |
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107 | } |
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108 | |||
109 | #ifdef TCNT2 // support timer2 only if it exists |
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110 | void timer2Init(void) |
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111 | { |
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112 | // initialize timer 2 |
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113 | timer2SetPrescaler( TIMER2PRESCALE ); // set prescaler |
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114 | TCNT2 = 0; // reset TCNT2 |
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115 | sbi(TIMSK2, TOIE2); // enable TCNT2 overflow |
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116 | |||
117 | timer2ClearOverflowCount(); // initialize time registers |
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118 | } |
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119 | #endif |
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120 | |||
121 | void timer0SetPrescaler(u08 prescale) |
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122 | { |
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123 | // set prescaler on timer 0 |
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124 | TCCR0B = ((TCCR0B & ~TIMER_PRESCALE_MASK) | prescale); |
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125 | } |
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126 | |||
127 | void timer1SetPrescaler(u08 prescale) |
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128 | { |
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129 | // set prescaler on timer 1 |
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130 | TCCR1B = ((TCCR1B & ~TIMER_PRESCALE_MASK) | prescale); |
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131 | } |
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132 | |||
133 | #ifdef TCNT2 // support timer2 only if it exists |
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134 | void timer2SetPrescaler(u08 prescale) |
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135 | { |
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136 | // set prescaler on timer 2 |
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137 | TCCR2B = ((TCCR2B & ~TIMER_PRESCALE_MASK) | prescale); |
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138 | } |
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139 | #endif |
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140 | |||
141 | u16 timer0GetPrescaler(void) |
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142 | { |
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143 | // get the current prescaler setting |
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144 | return (pgm_read_word(TimerPrescaleFactor+(TCCR0B & TIMER_PRESCALE_MASK))); |
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145 | } |
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146 | |||
147 | u16 timer1GetPrescaler(void) |
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148 | { |
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149 | // get the current prescaler setting |
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150 | return (pgm_read_word(TimerPrescaleFactor+(TCCR1B & TIMER_PRESCALE_MASK))); |
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151 | } |
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152 | |||
153 | #ifdef TCNT2 // support timer2 only if it exists |
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154 | u16 timer2GetPrescaler(void) |
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155 | { |
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156 | //TODO: can we assume for all 3-timer AVR processors, |
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157 | // that timer2 is the RTC timer? |
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158 | |||
159 | // get the current prescaler setting |
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160 | return (pgm_read_word(TimerRTCPrescaleFactor+(TCCR2B & TIMER_PRESCALE_MASK))); |
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161 | } |
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162 | #endif |
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163 | |||
164 | void timerAttach(u08 interruptNum, void (*userFunc)(void) ) |
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165 | { |
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166 | // make sure the interrupt number is within bounds |
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167 | if(interruptNum < TIMER_NUM_INTERRUPTS) |
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168 | { |
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169 | // set the interrupt function to run |
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170 | // the supplied user's function |
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171 | TimerIntFunc[interruptNum] = userFunc; |
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172 | } |
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173 | } |
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174 | |||
175 | void timerDetach(u08 interruptNum) |
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176 | { |
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177 | // make sure the interrupt number is within bounds |
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178 | if(interruptNum < TIMER_NUM_INTERRUPTS) |
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179 | { |
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180 | // set the interrupt function to run nothing |
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181 | TimerIntFunc[interruptNum] = 0; |
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182 | } |
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183 | } |
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184 | /* |
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185 | u32 timerMsToTics(u16 ms) |
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186 | { |
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187 | // calculate the prescaler division rate |
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188 | u16 prescaleDiv = 1<<(pgm_read_byte(TimerPrescaleFactor+inb(TCCR0))); |
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189 | // calculate the number of timer tics in x milliseconds |
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190 | return (ms*(F_CPU/(prescaleDiv*256)))/1000; |
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191 | } |
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192 | |||
193 | u16 timerTicsToMs(u32 tics) |
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194 | { |
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195 | // calculate the prescaler division rate |
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196 | u16 prescaleDiv = 1<<(pgm_read_byte(TimerPrescaleFactor+inb(TCCR0))); |
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197 | // calculate the number of milliseconds in x timer tics |
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198 | return (tics*1000*(prescaleDiv*256))/F_CPU; |
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199 | } |
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200 | */ |
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201 | void timerPause(unsigned short pause_ms) |
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202 | { |
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203 | // pauses for exactly <pause_ms> number of milliseconds |
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204 | u08 timerThres; |
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205 | u32 ticRateHz; |
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206 | u32 pause; |
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207 | |||
208 | // capture current pause timer value |
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209 | timerThres = TCNT0; |
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210 | // reset pause timer overflow count |
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211 | TimerPauseReg = 0; |
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212 | // calculate delay for [pause_ms] milliseconds |
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213 | // prescaler division = 1<<(pgm_read_byte(TimerPrescaleFactor+inb(TCCR0))) |
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214 | ticRateHz = F_CPU/timer0GetPrescaler(); |
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215 | // precision management |
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216 | // prevent overflow and precision underflow |
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217 | // -could add more conditions to improve accuracy |
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218 | if( ((ticRateHz < 429497) && (pause_ms <= 10000)) ) |
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219 | pause = (pause_ms*ticRateHz)/1000; |
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220 | else |
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221 | pause = pause_ms*(ticRateHz/1000); |
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222 | |||
223 | // loop until time expires |
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224 | while( ((TimerPauseReg<<8) | (TCNT0)) < (pause+timerThres) ) |
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225 | { |
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226 | if( TimerPauseReg < (pause>>8)); |
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227 | { |
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228 | // save power by idling the processor |
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229 | set_sleep_mode(SLEEP_MODE_IDLE); |
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230 | sleep_mode(); |
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231 | } |
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232 | } |
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233 | |||
234 | /* old inaccurate code, for reference |
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235 | |||
236 | // calculate delay for [pause_ms] milliseconds |
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237 | u16 prescaleDiv = 1<<(pgm_read_byte(TimerPrescaleFactor+inb(TCCR0))); |
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238 | u32 pause = (pause_ms*(F_CPU/(prescaleDiv*256)))/1000; |
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239 | |||
240 | TimerPauseReg = 0; |
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241 | while(TimerPauseReg < pause); |
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242 | |||
243 | */ |
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244 | } |
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245 | |||
246 | void timer0ClearOverflowCount(void) |
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247 | { |
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248 | // clear the timer overflow counter registers |
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249 | Timer0Reg0 = 0; // initialize time registers |
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250 | } |
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251 | |||
252 | long timer0GetOverflowCount(void) |
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253 | { |
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254 | // return the current timer overflow count |
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255 | // (this is since the last timer0ClearOverflowCount() command was called) |
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256 | return Timer0Reg0; |
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257 | } |
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258 | |||
259 | #ifdef TCNT2 // support timer2 only if it exists |
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260 | void timer2ClearOverflowCount(void) |
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261 | { |
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262 | // clear the timer overflow counter registers |
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263 | Timer2Reg0 = 0; // initialize time registers |
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264 | } |
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265 | |||
266 | long timer2GetOverflowCount(void) |
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267 | { |
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268 | // return the current timer overflow count |
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269 | // (this is since the last timer2ClearOverflowCount() command was called) |
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270 | return Timer2Reg0; |
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271 | } |
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272 | #endif |
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273 | |||
274 | void timer1PWMInit(u08 bitRes) |
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275 | { |
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276 | // configures timer1 for use with PWM output |
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277 | // on OC1A and OC1B pins |
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278 | |||
279 | // enable timer1 as 8,9,10bit PWM |
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280 | if(bitRes == 9) |
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281 | { // 9bit mode |
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282 | sbi(TCCR1A,PWM11); |
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283 | cbi(TCCR1A,PWM10); |
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284 | } |
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285 | else if( bitRes == 10 ) |
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286 | { // 10bit mode |
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287 | sbi(TCCR1A,PWM11); |
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288 | sbi(TCCR1A,PWM10); |
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289 | } |
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290 | else |
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291 | { // default 8bit mode |
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292 | cbi(TCCR1A,PWM11); |
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293 | sbi(TCCR1A,PWM10); |
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294 | } |
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295 | |||
296 | // clear output compare value A |
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297 | OCR1A = 0; |
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298 | // clear output compare value B |
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299 | OCR1B = 0; |
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300 | } |
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301 | |||
302 | #ifdef WGM10 |
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303 | // include support for arbitrary top-count PWM |
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304 | // on new AVR processors that support it |
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305 | void timer1PWMInitICR(u16 topcount) |
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306 | { |
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307 | // set PWM mode with ICR top-count |
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308 | cbi(TCCR1A,WGM10); |
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309 | sbi(TCCR1A,WGM11); |
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310 | sbi(TCCR1B,WGM12); |
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311 | sbi(TCCR1B,WGM13); |
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312 | |||
313 | // set top count value |
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314 | ICR1 = topcount; |
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315 | |||
316 | // clear output compare value A |
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317 | OCR1A = 0; |
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318 | // clear output compare value B |
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319 | OCR1B = 0; |
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320 | |||
321 | } |
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322 | #endif |
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323 | |||
324 | void timer1PWMOff(void) |
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325 | { |
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326 | // turn off timer1 PWM mode |
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327 | cbi(TCCR1A,PWM11); |
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328 | cbi(TCCR1A,PWM10); |
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329 | // set PWM1A/B (OutputCompare action) to none |
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330 | timer1PWMAOff(); |
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331 | timer1PWMBOff(); |
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332 | } |
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333 | |||
334 | void timer1PWMAOn(void) |
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335 | { |
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336 | // turn on channel A (OC1A) PWM output |
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337 | // set OC1A as non-inverted PWM |
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338 | sbi(TCCR1A,COM1A1); |
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339 | cbi(TCCR1A,COM1A0); |
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340 | } |
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341 | |||
342 | void timer1PWMBOn(void) |
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343 | { |
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344 | // turn on channel B (OC1B) PWM output |
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345 | // set OC1B as non-inverted PWM |
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346 | sbi(TCCR1A,COM1B1); |
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347 | cbi(TCCR1A,COM1B0); |
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348 | } |
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349 | |||
350 | void timer1PWMAOff(void) |
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351 | { |
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352 | // turn off channel A (OC1A) PWM output |
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353 | // set OC1A (OutputCompare action) to none |
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354 | cbi(TCCR1A,COM1A1); |
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355 | cbi(TCCR1A,COM1A0); |
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356 | } |
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357 | |||
358 | void timer1PWMBOff(void) |
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359 | { |
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360 | // turn off channel B (OC1B) PWM output |
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361 | // set OC1B (OutputCompare action) to none |
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362 | cbi(TCCR1A,COM1B1); |
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363 | cbi(TCCR1A,COM1B0); |
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364 | } |
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365 | |||
366 | void timer1PWMASet(u16 pwmDuty) |
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367 | { |
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368 | // set PWM (output compare) duty for channel A |
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369 | // this PWM output is generated on OC1A pin |
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370 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
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371 | // pwmDuty should be in the range 0-511 for 9bit PWM |
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372 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
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373 | //outp( (pwmDuty>>8), OCR1AH); // set the high 8bits of OCR1A |
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374 | //outp( (pwmDuty&0x00FF), OCR1AL); // set the low 8bits of OCR1A |
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375 | OCR1A = pwmDuty; |
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376 | } |
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377 | |||
378 | void timer1PWMBSet(u16 pwmDuty) |
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379 | { |
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380 | // set PWM (output compare) duty for channel B |
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381 | // this PWM output is generated on OC1B pin |
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382 | // NOTE: pwmDuty should be in the range 0-255 for 8bit PWM |
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383 | // pwmDuty should be in the range 0-511 for 9bit PWM |
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384 | // pwmDuty should be in the range 0-1023 for 10bit PWM |
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385 | //outp( (pwmDuty>>8), OCR1BH); // set the high 8bits of OCR1B |
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386 | //outp( (pwmDuty&0x00FF), OCR1BL); // set the low 8bits of OCR1B |
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387 | OCR1B = pwmDuty; |
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388 | } |
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389 | |||
390 | //! Interrupt handler for tcnt0 overflow interrupt |
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391 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW0) |
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392 | { |
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393 | Timer0Reg0++; // increment low-order counter |
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394 | |||
395 | // increment pause counter |
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396 | TimerPauseReg++; |
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397 | |||
398 | // if a user function is defined, execute it too |
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399 | if(TimerIntFunc[TIMER0OVERFLOW_INT]) |
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400 | TimerIntFunc[TIMER0OVERFLOW_INT](); |
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401 | } |
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402 | |||
403 | //! Interrupt handler for tcnt1 overflow interrupt |
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404 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW1) |
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405 | { |
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406 | // if a user function is defined, execute it |
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407 | if(TimerIntFunc[TIMER1OVERFLOW_INT]) |
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408 | TimerIntFunc[TIMER1OVERFLOW_INT](); |
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409 | } |
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410 | |||
411 | #ifdef TCNT2 // support timer2 only if it exists |
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412 | //! Interrupt handler for tcnt2 overflow interrupt |
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413 | TIMER_INTERRUPT_HANDLER(SIG_OVERFLOW2) |
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414 | { |
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415 | Timer2Reg0++; // increment low-order counter |
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416 | |||
417 | // if a user function is defined, execute it |
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418 | if(TimerIntFunc[TIMER2OVERFLOW_INT]) |
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419 | TimerIntFunc[TIMER2OVERFLOW_INT](); |
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420 | } |
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421 | #endif |
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422 | |||
423 | #ifdef OCR0 |
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424 | // include support for Output Compare 0 for new AVR processors that support it |
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425 | //! Interrupt handler for OutputCompare0 match (OC0) interrupt |
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426 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE0) |
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427 | { |
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428 | // if a user function is defined, execute it |
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429 | if(TimerIntFunc[TIMER0OUTCOMPARE_INT]) |
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430 | TimerIntFunc[TIMER0OUTCOMPARE_INT](); |
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431 | } |
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432 | #endif |
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433 | |||
434 | //! Interrupt handler for CutputCompare1A match (OC1A) interrupt |
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435 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE1A) |
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436 | { |
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437 | // if a user function is defined, execute it |
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438 | if(TimerIntFunc[TIMER1OUTCOMPAREA_INT]) |
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439 | TimerIntFunc[TIMER1OUTCOMPAREA_INT](); |
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440 | } |
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441 | |||
442 | //! Interrupt handler for OutputCompare1B match (OC1B) interrupt |
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443 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE1B) |
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444 | { |
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445 | // if a user function is defined, execute it |
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446 | if(TimerIntFunc[TIMER1OUTCOMPAREB_INT]) |
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447 | TimerIntFunc[TIMER1OUTCOMPAREB_INT](); |
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448 | } |
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449 | |||
450 | //! Interrupt handler for InputCapture1 (IC1) interrupt |
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451 | TIMER_INTERRUPT_HANDLER(SIG_INPUT_CAPTURE1) |
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452 | { |
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453 | // if a user function is defined, execute it |
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454 | if(TimerIntFunc[TIMER1INPUTCAPTURE_INT]) |
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455 | TimerIntFunc[TIMER1INPUTCAPTURE_INT](); |
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456 | } |
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457 | |||
458 | //! Interrupt handler for OutputCompare2A match (OC2A) interrupt |
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459 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE2A) |
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460 | { |
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461 | // if a user function is defined, execute it |
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462 | if(TimerIntFunc[TIMER2OUTCOMPARE_INT]) |
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463 | TimerIntFunc[TIMER2OUTCOMPARE_INT](); |
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464 | } |
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465 | |||
466 | //! Interrupt handler for OutputCompare2B match (OC2B) interrupt |
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467 | TIMER_INTERRUPT_HANDLER(SIG_OUTPUT_COMPARE2B) |
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468 | { |
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469 | // if a user function is defined, execute it |
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470 | if(TimerIntFunc[TIMER2OUTCOMPARE_INT]) |
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471 | TimerIntFunc[TIMER2OUTCOMPARE_INT](); |
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472 | } |
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