| 135 |
jicha |
1 |
D G "__PCM__" 0 0 ""4.059d"" |
|
|
2 |
D G "__DEVICE__" 0 0 "" |
|
|
3 |
D G "__DATE__" 0 0 ""13-I-06"" |
|
|
4 |
D G "__TIME__" 0 0 ""22:52:43"" "Standard Header file for the PIC16F877A device ////////////////" |
|
|
5 |
d G "PIN_A0" 2 19 "40" |
|
|
6 |
d G "PIN_A1" 2 20 "41" |
|
|
7 |
d G "PIN_A2" 2 21 "42" |
|
|
8 |
d G "PIN_A3" 2 22 "43" |
|
|
9 |
d G "PIN_A4" 2 23 "44" |
|
|
10 |
d G "PIN_A5" 2 24 "45" |
|
|
11 |
d G "PIN_B0" 2 26 "48" |
|
|
12 |
d G "PIN_B1" 2 27 "49" |
|
|
13 |
d G "PIN_B2" 2 28 "50" |
|
|
14 |
d G "PIN_B3" 2 29 "51" |
|
|
15 |
d G "PIN_B4" 2 30 "52" |
|
|
16 |
d G "PIN_B5" 2 31 "53" |
|
|
17 |
d G "PIN_B6" 2 32 "54" |
|
|
18 |
d G "PIN_B7" 2 33 "55" |
|
|
19 |
d G "PIN_C0" 2 35 "56" |
|
|
20 |
d G "PIN_C1" 2 36 "57" |
|
|
21 |
d G "PIN_C2" 2 37 "58" |
|
|
22 |
d G "PIN_C3" 2 38 "59" |
|
|
23 |
d G "PIN_C4" 2 39 "60" |
|
|
24 |
d G "PIN_C5" 2 40 "61" |
|
|
25 |
d G "PIN_C6" 2 41 "62" |
|
|
26 |
d G "PIN_C7" 2 42 "63" |
|
|
27 |
d G "PIN_D0" 2 44 "64" |
|
|
28 |
d G "PIN_D1" 2 45 "65" |
|
|
29 |
d G "PIN_D2" 2 46 "66" |
|
|
30 |
d G "PIN_D3" 2 47 "67" |
|
|
31 |
d G "PIN_D4" 2 48 "68" |
|
|
32 |
d G "PIN_D5" 2 49 "69" |
|
|
33 |
d G "PIN_D6" 2 50 "70" |
|
|
34 |
d G "PIN_D7" 2 51 "71" |
|
|
35 |
d G "PIN_E0" 2 53 "72" |
|
|
36 |
d G "PIN_E1" 2 54 "73" |
|
|
37 |
d G "PIN_E2" 2 55 "74" |
|
|
38 |
d G "FALSE" 2 58 "0" |
|
|
39 |
d G "TRUE" 2 59 "1" |
|
|
40 |
d G "BYTE" 2 61 "int8" |
|
|
41 |
d G "BOOLEAN" 2 62 "int1" |
|
|
42 |
d G "getc" 2 64 "getch" |
|
|
43 |
d G "fgetc" 2 65 "getch" |
|
|
44 |
d G "getchar" 2 66 "getch" |
|
|
45 |
d G "putc" 2 67 "putchar" |
|
|
46 |
d G "fputc" 2 68 "putchar" |
|
|
47 |
d G "fgets" 2 69 "gets" |
|
|
48 |
d G "fputs" 2 70 "puts" |
|
|
49 |
d G "WDT_FROM_SLEEP" 2 75 "3" |
|
|
50 |
d G "WDT_TIMEOUT" 2 76 "11" |
|
|
51 |
d G "MCLR_FROM_SLEEP" 2 77 "19" |
|
|
52 |
d G "MCLR_FROM_RUN" 2 78 "27" |
|
|
53 |
d G "NORMAL_POWER_UP" 2 79 "25" |
|
|
54 |
d G "BROWNOUT_RESTART" 2 80 "26" |
|
|
55 |
d G "RTCC_INTERNAL" 2 88 "0" |
|
|
56 |
d G "RTCC_EXT_L_TO_H" 2 89 "32" |
|
|
57 |
d G "RTCC_EXT_H_TO_L" 2 90 "48" |
|
|
58 |
d G "RTCC_DIV_1" 2 92 "8" |
|
|
59 |
d G "RTCC_DIV_2" 2 93 "0" |
|
|
60 |
d G "RTCC_DIV_4" 2 94 "1" |
|
|
61 |
d G "RTCC_DIV_8" 2 95 "2" |
|
|
62 |
d G "RTCC_DIV_16" 2 96 "3" |
|
|
63 |
d G "RTCC_DIV_32" 2 97 "4" |
|
|
64 |
d G "RTCC_DIV_64" 2 98 "5" |
|
|
65 |
d G "RTCC_DIV_128" 2 99 "6" |
|
|
66 |
d G "RTCC_DIV_256" 2 100 "7" |
|
|
67 |
d G "RTCC_8_BIT" 2 103 "0" |
|
|
68 |
d G "WDT_18MS" 2 115 "0x8008" |
|
|
69 |
d G "WDT_36MS" 2 116 "9" |
|
|
70 |
d G "WDT_72MS" 2 117 "10" |
|
|
71 |
d G "WDT_144MS" 2 118 "11" |
|
|
72 |
d G "WDT_288MS" 2 119 "12" |
|
|
73 |
d G "WDT_576MS" 2 120 "13" |
|
|
74 |
d G "WDT_1152MS" 2 121 "14" |
|
|
75 |
d G "WDT_2304MS" 2 122 "15" |
|
|
76 |
d G "T1_DISABLED" 2 128 "0" |
|
|
77 |
d G "T1_INTERNAL" 2 129 "0x85" |
|
|
78 |
d G "T1_EXTERNAL" 2 130 "0x87" |
|
|
79 |
d G "T1_EXTERNAL_SYNC" 2 131 "0x83" |
|
|
80 |
d G "T1_CLK_OUT" 2 133 "8" |
|
|
81 |
d G "T1_DIV_BY_1" 2 135 "0" |
|
|
82 |
d G "T1_DIV_BY_2" 2 136 "0x10" |
|
|
83 |
d G "T1_DIV_BY_4" 2 137 "0x20" |
|
|
84 |
d G "T1_DIV_BY_8" 2 138 "0x30" |
|
|
85 |
d G "T2_DISABLED" 2 143 "0" |
|
|
86 |
d G "T2_DIV_BY_1" 2 144 "4" |
|
|
87 |
d G "T2_DIV_BY_4" 2 145 "5" |
|
|
88 |
d G "T2_DIV_BY_16" 2 146 "6" |
|
|
89 |
d G "CCP_OFF" 2 152 "0" |
|
|
90 |
d G "CCP_CAPTURE_FE" 2 153 "4" |
|
|
91 |
d G "CCP_CAPTURE_RE" 2 154 "5" |
|
|
92 |
d G "CCP_CAPTURE_DIV_4" 2 155 "6" |
|
|
93 |
d G "CCP_CAPTURE_DIV_16" 2 156 "7" |
|
|
94 |
d G "CCP_COMPARE_SET_ON_MATCH" 2 157 "8" |
|
|
95 |
d G "CCP_COMPARE_CLR_ON_MATCH" 2 158 "9" |
|
|
96 |
d G "CCP_COMPARE_INT" 2 159 "0xA" |
|
|
97 |
d G "CCP_COMPARE_RESET_TIMER" 2 160 "0xB" |
|
|
98 |
d G "CCP_PWM" 2 161 "0xC" |
|
|
99 |
d G "CCP_PWM_PLUS_1" 2 162 "0x1c" |
|
|
100 |
d G "CCP_PWM_PLUS_2" 2 163 "0x2c" |
|
|
101 |
d G "CCP_PWM_PLUS_3" 2 164 "0x3c" |
|
|
102 |
v G "CCP_1" 2 165 "int16" |
|
|
103 |
v G "CCP_2" 2 169 "int16" |
|
|
104 |
d G "PSP_ENABLED" 2 178 "0x10" |
|
|
105 |
d G "PSP_DISABLED" 2 179 "0" |
|
|
106 |
d G "SPI_MASTER" 2 186 "0x20" |
|
|
107 |
d G "SPI_SLAVE" 2 187 "0x24" |
|
|
108 |
d G "SPI_L_TO_H" 2 188 "0" |
|
|
109 |
d G "SPI_H_TO_L" 2 189 "0x10" |
|
|
110 |
d G "SPI_CLK_DIV_4" 2 190 "0" |
|
|
111 |
d G "SPI_CLK_DIV_16" 2 191 "1" |
|
|
112 |
d G "SPI_CLK_DIV_64" 2 192 "2" |
|
|
113 |
d G "SPI_CLK_T2" 2 193 "3" |
|
|
114 |
d G "SPI_SS_DISABLED" 2 194 "1" |
|
|
115 |
d G "SPI_SAMPLE_AT_END" 2 196 "0x8000" |
|
|
116 |
d G "SPI_XMIT_L_TO_H" 2 197 "0x4000" |
|
|
117 |
d G "UART_ADDRESS" 2 203 "2" |
|
|
118 |
d G "UART_DATA" 2 204 "4" |
|
|
119 |
d G "A0_A3_A1_A3" 2 208 "0xfff04" |
|
|
120 |
d G "A0_A3_A1_A2_OUT_ON_A4_A5" 2 209 "0xfcf03" |
|
|
121 |
d G "A0_A3_A1_A3_OUT_ON_A4_A5" 2 210 "0xbcf05" |
|
|
122 |
d G "NC_NC_NC_NC" 2 211 "0x0ff07" |
|
|
123 |
d G "A0_A3_A1_A2" 2 212 "0xfff02" |
|
|
124 |
d G "A0_A3_NC_NC_OUT_ON_A4" 2 213 "0x9ef01" |
|
|
125 |
d G "A0_VR_A1_VR" 2 214 "0x3ff06" |
|
|
126 |
d G "A3_VR_A2_VR" 2 215 "0xcff0e" |
|
|
127 |
d G "CP1_INVERT" 2 216 "0x0000010" |
|
|
128 |
d G "CP2_INVERT" 2 217 "0x0000020" |
|
|
129 |
d G "VREF_LOW" 2 225 "0xa0" |
|
|
130 |
d G "VREF_HIGH" 2 226 "0x80" |
|
|
131 |
d G "VREF_A2" 2 228 "0x40" |
|
|
132 |
d G "ADC_OFF" 2 236 "0" "ADC Off" |
|
|
133 |
d G "ADC_CLOCK_DIV_2" 2 237 "0x10000" |
|
|
134 |
d G "ADC_CLOCK_DIV_4" 2 238 "0x4000" |
|
|
135 |
d G "ADC_CLOCK_DIV_8" 2 239 "0x0040" |
|
|
136 |
d G "ADC_CLOCK_DIV_16" 2 240 "0x4040" |
|
|
137 |
d G "ADC_CLOCK_DIV_32" 2 241 "0x0080" |
|
|
138 |
d G "ADC_CLOCK_DIV_64" 2 242 "0x4080" |
|
|
139 |
d G "ADC_CLOCK_INTERNAL" 2 243 "0x00c0" "Internal 2-6us" |
|
|
140 |
d G "NO_ANALOGS" 2 246 "7" "None" |
|
|
141 |
d G "ALL_ANALOG" 2 247 "0" "A0 A1 A2 A3 A5 E0 E1 E2" |
|
|
142 |
d G "AN0_AN1_AN2_AN4_AN5_AN6_AN7_VSS_VREF" 2 248 "1" "A0 A1 A2 A5 E0 E1 E2 VRefh=A3" |
|
|
143 |
d G "AN0_AN1_AN2_AN3_AN4" 2 249 "2" "A0 A1 A2 A3 A5" |
|
|
144 |
d G "AN0_AN1_AN2_AN4_VSS_VREF" 2 250 "3" "A0 A1 A2 A4 VRefh=A3" |
|
|
145 |
d G "AN0_AN1_AN3" 2 251 "4" "A0 A1 A3" |
|
|
146 |
d G "AN0_AN1_VSS_VREF" 2 252 "5" "A0 A1 VRefh=A3" |
|
|
147 |
d G "AN0_AN1_AN4_AN5_AN6_AN7_VREF_VREF" 2 253 "0x08" "A0 A1 A5 E0 E1 E2 VRefh=A3 VRefl=A2" |
|
|
148 |
d G "AN0_AN1_AN2_AN3_AN4_AN5" 2 254 "0x09" "A0 A1 A2 A3 A5 E0" |
|
|
149 |
d G "AN0_AN1_AN2_AN4_AN5_VSS_VREF" 2 255 "0x0A" "A0 A1 A2 A5 E0 VRefh=A3" |
|
|
150 |
d G "AN0_AN1_AN4_AN5_VREF_VREF" 2 256 "0x0B" "A0 A1 A5 E0 VRefh=A3 VRefl=A2" |
|
|
151 |
d G "AN0_AN1_AN4_VREF_VREF" 2 257 "0x0C" "A0 A1 A4 VRefh=A3 VRefl=A2" |
|
|
152 |
d G "AN0_AN1_VREF_VREF" 2 258 "0x0D" "A0 A1 VRefh=A3 VRefl=A2" |
|
|
153 |
d G "AN0" 2 259 "0x0E" "A0" |
|
|
154 |
d G "AN0_VREF_VREF" 2 260 "0x0F" "A0 VRefh=A3 VRefl=A2" |
|
|
155 |
d G "ANALOG_RA3_REF" 2 261 "0x1" "!old only provided for compatibility" |
|
|
156 |
d G "A_ANALOG" 2 262 "0x2" "!old only provided for compatibility" |
|
|
157 |
d G "A_ANALOG_RA3_REF" 2 263 "0x3" "!old only provided for compatibility" |
|
|
158 |
d G "RA0_RA1_RA3_ANALOG" 2 264 "0x4" "!old only provided for compatibility" |
|
|
159 |
d G "RA0_RA1_ANALOG_RA3_REF" 2 265 "0x5" "!old only provided for compatibility" |
|
|
160 |
d G "ANALOG_RA3_RA2_REF" 2 266 "0x8" "!old only provided for compatibility" |
|
|
161 |
d G "ANALOG_NOT_RE1_RE2" 2 267 "0x9" "!old only provided for compatibility" |
|
|
162 |
d G "ANALOG_NOT_RE1_RE2_REF_RA3" 2 268 "0xA" "!old only provided for compatibility" |
|
|
163 |
d G "ANALOG_NOT_RE1_RE2_REF_RA3_RA2" 2 269 "0xB" "!old only provided for compatibility" |
|
|
164 |
d G "A_ANALOG_RA3_RA2_REF" 2 270 "0xC" "!old only provided for compatibility" |
|
|
165 |
d G "RA0_RA1_ANALOG_RA3_RA2_REF" 2 271 "0xD" "!old only provided for compatibility" |
|
|
166 |
d G "RA0_ANALOG" 2 272 "0xE" "!old only provided for compatibility" |
|
|
167 |
d G "RA0_ANALOG_RA3_RA2_REF" 2 273 "0xF" "!old only provided for compatibility" |
|
|
168 |
d G "ADC_START_AND_READ" 2 277 "7" "This is the default if nothing is specified" |
|
|
169 |
d G "ADC_START_ONLY" 2 278 "1" |
|
|
170 |
d G "ADC_READ_ONLY" 2 279 "6" |
|
|
171 |
d G "L_TO_H" 2 291 "0x40" |
|
|
172 |
d G "H_TO_L" 2 292 "0" |
|
|
173 |
d G "GLOBAL" 2 294 "0x0BC0" |
|
|
174 |
d G "INT_RTCC" 2 295 "0x0B20" |
|
|
175 |
d G "INT_RB" 2 296 "0xFF0B08" |
|
|
176 |
d G "INT_EXT" 2 297 "0x0B10" |
|
|
177 |
d G "INT_AD" 2 298 "0x8C40" |
|
|
178 |
d G "INT_TBE" 2 299 "0x8C10" |
|
|
179 |
d G "INT_RDA" 2 300 "0x8C20" |
|
|
180 |
d G "INT_TIMER1" 2 301 "0x8C01" |
|
|
181 |
d G "INT_TIMER2" 2 302 "0x8C02" |
|
|
182 |
d G "INT_CCP1" 2 303 "0x8C04" |
|
|
183 |
d G "INT_CCP2" 2 304 "0x8D01" |
|
|
184 |
d G "INT_SSP" 2 305 "0x8C08" |
|
|
185 |
d G "INT_PSP" 2 306 "0x8C80" |
|
|
186 |
d G "INT_BUSCOL" 2 307 "0x8D08" |
|
|
187 |
d G "INT_EEPROM" 2 308 "0x8D10" |
|
|
188 |
d G "INT_TIMER0" 2 309 "0x0B20" |
|
|
189 |
d G "INT_COMP" 2 310 "0x8D40" |
|
|
190 |
D G "krok" 0 2 "1" |
|
|
191 |
D G "vstup" 0 3 "C1OUT" |
|
|
192 |
F G "main" 0 6 "void()" |
|
|
193 |
V L "n" 0 7 "int16" |
|
|
194 |
V L "ENABLE" 0 8 "int1" |
|
|
195 |
V L "off" 0 9 "int1" |
|
|
196 |
F B "reset_cpu" 0 0 |
|
|
197 |
F B "abs" 1 0 |
|
|
198 |
F B "sleep" 0 0 |
|
|
199 |
F B "delay_cycles" 1 0 |
|
|
200 |
F B "read_bank" 2 0 |
|
|
201 |
F B "write_bank" 3 0 |
|
|
202 |
F B "shift_left" 2 2 |
|
|
203 |
F B "shift_right" 2 2 |
|
|
204 |
F B "rotate_left" 2 0 |
|
|
205 |
F B "rotate_right" 2 0 |
|
|
206 |
F B "_mul" 2 0 |
|
|
207 |
F B "strcpy" 2 0 |
|
|
208 |
F B "memset" 3 0 |
|
|
209 |
F B "memcpy" 3 0 |
|
|
210 |
F B "isamoung" 2 0 |
|
|
211 |
F B "isamong" 2 0 |
|
|
212 |
F B "bit_set" 2 0 |
|
|
213 |
F B "bit_clear" 2 0 |
|
|
214 |
F B "bit_test" 2 0 |
|
|
215 |
F B "toupper" 1 0 |
|
|
216 |
F B "tolower" 1 0 |
|
|
217 |
F B "swap" 1 0 |
|
|
218 |
F B "printf" 1 255 |
|
|
219 |
F B "fprintf" 1 255 |
|
|
220 |
F B "sprintf" 1 255 |
|
|
221 |
F B "make8" 2 0 |
|
|
222 |
F B "make16" 2 0 |
|
|
223 |
F B "make32" 1 255 |
|
|
224 |
F B "label_address" 1 1 |
|
|
225 |
F B "goto_address" 1 0 |
|
|
226 |
F B "_va_arg" 1 0 |
|
|
227 |
F B "offsetofbit" 2 2 |
|
|
228 |
F B "enable_interrupts" 1 0 |
|
|
229 |
F B "disable_interrupts" 1 0 |
|
|
230 |
F B "interrupt_active" 1 0 |
|
|
231 |
F B "clear_interrupt" 1 0 |
|
|
232 |
F B "jump_to_isr" 1 0 |
|
|
233 |
F B "ext_int_edge" 1 2 |
|
|
234 |
F B "read_eeprom" 1 0 |
|
|
235 |
F B "write_eeprom" 2 0 |
|
|
236 |
F B "read_program_eeprom" 1 0 |
|
|
237 |
F B "write_program_eeprom" 2 0 |
|
|
238 |
F B "write_program_memory" 4 0 |
|
|
239 |
F B "write_program_memory8" 4 0 |
|
|
240 |
F B "read_program_memory" 4 0 |
|
|
241 |
F B "read_program_memory8" 4 0 |
|
|
242 |
F B "output_high" 1 0 |
|
|
243 |
F B "output_low" 1 0 |
|
|
244 |
F B "input" 1 0 |
|
|
245 |
F B "input_state" 1 0 |
|
|
246 |
F B "output_float" 1 0 |
|
|
247 |
F B "output_drive" 1 0 |
|
|
248 |
F B "output_bit" 1 1 |
|
|
249 |
F B "output_toggle" 1 0 |
|
|
250 |
F B "output_a" 1 0 |
|
|
251 |
F B "output_b" 1 0 |
|
|
252 |
F B "output_c" 1 0 |
|
|
253 |
F B "output_d" 1 0 |
|
|
254 |
F B "output_e" 1 0 |
|
|
255 |
F B "input_a" 0 0 |
|
|
256 |
F B "input_b" 0 0 |
|
|
257 |
F B "input_c" 0 0 |
|
|
258 |
F B "input_d" 0 0 |
|
|
259 |
F B "input_e" 0 0 |
|
|
260 |
F B "set_tris_a" 1 0 |
|
|
261 |
F B "set_tris_b" 1 0 |
|
|
262 |
F B "set_tris_c" 1 0 |
|
|
263 |
F B "set_tris_d" 1 0 |
|
|
264 |
F B "set_tris_e" 1 0 |
|
|
265 |
F B "get_tris_a" 0 0 |
|
|
266 |
F B "get_tris_b" 0 0 |
|
|
267 |
F B "get_tris_c" 0 0 |
|
|
268 |
F B "get_tris_d" 0 0 |
|
|
269 |
F B "get_tris_e" 0 0 |
|
|
270 |
F B "port_b_pullups" 1 0 |
|
|
271 |
F B "setup_counters" 2 0 |
|
|
272 |
F B "setup_wdt" 1 0 |
|
|
273 |
F B "restart_cause" 0 0 |
|
|
274 |
F B "restart_wdt" 0 0 |
|
|
275 |
F B "get_rtcc" 0 0 |
|
|
276 |
F B "set_rtcc" 1 0 |
|
|
277 |
F B "get_timer0" 0 0 |
|
|
278 |
F B "set_timer0" 1 0 |
|
|
279 |
F B "setup_comparator" 1 0 |
|
|
280 |
F B "setup_port_a" 1 0 |
|
|
281 |
F B "setup_adc_ports" 1 0 |
|
|
282 |
F B "setup_adc" 1 0 |
|
|
283 |
F B "set_adc_channel" 1 0 |
|
|
284 |
F B "read_adc" 0 1 |
|
|
285 |
F B "adc_done" 0 0 |
|
|
286 |
F B "setup_timer_0" 1 0 |
|
|
287 |
F B "setup_timer_1" 1 0 |
|
|
288 |
F B "get_timer1" 0 0 |
|
|
289 |
F B "set_timer1" 1 0 |
|
|
290 |
F B "setup_timer_2" 3 0 |
|
|
291 |
F B "get_timer2" 0 0 |
|
|
292 |
F B "set_timer2" 1 0 |
|
|
293 |
F B "setup_ccp1" 1 0 |
|
|
294 |
F B "set_pwm1_duty" 1 0 |
|
|
295 |
F B "setup_ccp2" 1 0 |
|
|
296 |
F B "set_pwm2_duty" 1 0 |
|
|
297 |
F B "setup_vref" 1 0 |
|
|
298 |
F B "setup_psp" 1 0 |
|
|
299 |
F B "psp_output_full" 0 0 |
|
|
300 |
F B "psp_input_full" 0 0 |
|
|
301 |
F B "psp_overflow" 0 0 |
|
|
302 |
F B "setup_spi" 1 0 |
|
|
303 |
F B "spi_read" 0 1 |
|
|
304 |
F B "spi_write" 1 0 |
|
|
305 |
F B "spi_data_is_in" 0 0 |
|
|
306 |
F B "setup_spi2" 1 0 |
|
|
307 |
F B "spi_read2" 0 1 |
|
|
308 |
F B "spi_write2" 1 0 |
|
|
309 |
F B "spi_data_is_in2" 0 0 |
|
|
310 |
F B "delay_ms" 1 0 |
|
|
311 |
F B "delay_us" 1 0 |
|
|
312 |
F B "putchar" 1 2 |
|
|
313 |
F B "puts" 1 2 |
|
|
314 |
F B "getch" 0 1 |
|
|
315 |
F B "gets" 1 3 |
|
|
316 |
F B "kbhit" 0 1 |
|
|
317 |
F B "set_uart_speed" 1 3 |
|
|
318 |
F B "setup_uart" 1 3 |