| 229 |
toman |
1 |
D G "__PCM__" 0 0 ""4.058s"" |
|
|
2 |
D G "__DEVICE__" 0 0 "" |
|
|
3 |
D G "__DATE__" 0 0 ""04-V-08"" |
|
|
4 |
D G "__TIME__" 0 0 ""15:14:50"" "Standard Header file for the PIC16F873A device ////////////////" |
|
|
5 |
d G "PIN_A0" 2 19 "40" |
|
|
6 |
d G "PIN_A1" 2 20 "41" |
|
|
7 |
d G "PIN_A2" 2 21 "42" |
|
|
8 |
d G "PIN_A3" 2 22 "43" |
|
|
9 |
d G "PIN_A4" 2 23 "44" |
|
|
10 |
d G "PIN_A5" 2 24 "45" |
|
|
11 |
d G "PIN_B0" 2 26 "48" |
|
|
12 |
d G "PIN_B1" 2 27 "49" |
|
|
13 |
d G "PIN_B2" 2 28 "50" |
|
|
14 |
d G "PIN_B3" 2 29 "51" |
|
|
15 |
d G "PIN_B4" 2 30 "52" |
|
|
16 |
d G "PIN_B5" 2 31 "53" |
|
|
17 |
d G "PIN_B6" 2 32 "54" |
|
|
18 |
d G "PIN_B7" 2 33 "55" |
|
|
19 |
d G "PIN_C0" 2 35 "56" |
|
|
20 |
d G "PIN_C1" 2 36 "57" |
|
|
21 |
d G "PIN_C2" 2 37 "58" |
|
|
22 |
d G "PIN_C3" 2 38 "59" |
|
|
23 |
d G "PIN_C4" 2 39 "60" |
|
|
24 |
d G "PIN_C5" 2 40 "61" |
|
|
25 |
d G "PIN_C6" 2 41 "62" |
|
|
26 |
d G "PIN_C7" 2 42 "63" |
|
|
27 |
d G "FALSE" 2 45 "0" |
|
|
28 |
d G "TRUE" 2 46 "1" |
|
|
29 |
d G "BYTE" 2 48 "int8" |
|
|
30 |
d G "BOOLEAN" 2 49 "int1" |
|
|
31 |
d G "getc" 2 51 "getch" |
|
|
32 |
d G "fgetc" 2 52 "getch" |
|
|
33 |
d G "getchar" 2 53 "getch" |
|
|
34 |
d G "putc" 2 54 "putchar" |
|
|
35 |
d G "fputc" 2 55 "putchar" |
|
|
36 |
d G "fgets" 2 56 "gets" |
|
|
37 |
d G "fputs" 2 57 "puts" |
|
|
38 |
d G "WDT_FROM_SLEEP" 2 62 "3" |
|
|
39 |
d G "WDT_TIMEOUT" 2 63 "11" |
|
|
40 |
d G "MCLR_FROM_SLEEP" 2 64 "19" |
|
|
41 |
d G "MCLR_FROM_RUN" 2 65 "27" |
|
|
42 |
d G "NORMAL_POWER_UP" 2 66 "25" |
|
|
43 |
d G "BROWNOUT_RESTART" 2 67 "26" |
|
|
44 |
d G "RTCC_INTERNAL" 2 75 "0" |
|
|
45 |
d G "RTCC_EXT_L_TO_H" 2 76 "32" |
|
|
46 |
d G "RTCC_EXT_H_TO_L" 2 77 "48" |
|
|
47 |
d G "RTCC_DIV_1" 2 79 "8" |
|
|
48 |
d G "RTCC_DIV_2" 2 80 "0" |
|
|
49 |
d G "RTCC_DIV_4" 2 81 "1" |
|
|
50 |
d G "RTCC_DIV_8" 2 82 "2" |
|
|
51 |
d G "RTCC_DIV_16" 2 83 "3" |
|
|
52 |
d G "RTCC_DIV_32" 2 84 "4" |
|
|
53 |
d G "RTCC_DIV_64" 2 85 "5" |
|
|
54 |
d G "RTCC_DIV_128" 2 86 "6" |
|
|
55 |
d G "RTCC_DIV_256" 2 87 "7" |
|
|
56 |
d G "RTCC_8_BIT" 2 90 "0" |
|
|
57 |
d G "WDT_18MS" 2 102 "0x8008" |
|
|
58 |
d G "WDT_36MS" 2 103 "9" |
|
|
59 |
d G "WDT_72MS" 2 104 "10" |
|
|
60 |
d G "WDT_144MS" 2 105 "11" |
|
|
61 |
d G "WDT_288MS" 2 106 "12" |
|
|
62 |
d G "WDT_576MS" 2 107 "13" |
|
|
63 |
d G "WDT_1152MS" 2 108 "14" |
|
|
64 |
d G "WDT_2304MS" 2 109 "15" |
|
|
65 |
d G "T1_DISABLED" 2 115 "0" |
|
|
66 |
d G "T1_INTERNAL" 2 116 "0x85" |
|
|
67 |
d G "T1_EXTERNAL" 2 117 "0x87" |
|
|
68 |
d G "T1_EXTERNAL_SYNC" 2 118 "0x83" |
|
|
69 |
d G "T1_CLK_OUT" 2 120 "8" |
|
|
70 |
d G "T1_DIV_BY_1" 2 122 "0" |
|
|
71 |
d G "T1_DIV_BY_2" 2 123 "0x10" |
|
|
72 |
d G "T1_DIV_BY_4" 2 124 "0x20" |
|
|
73 |
d G "T1_DIV_BY_8" 2 125 "0x30" |
|
|
74 |
d G "T2_DISABLED" 2 130 "0" |
|
|
75 |
d G "T2_DIV_BY_1" 2 131 "4" |
|
|
76 |
d G "T2_DIV_BY_4" 2 132 "5" |
|
|
77 |
d G "T2_DIV_BY_16" 2 133 "6" |
|
|
78 |
d G "CCP_OFF" 2 139 "0" |
|
|
79 |
d G "CCP_CAPTURE_FE" 2 140 "4" |
|
|
80 |
d G "CCP_CAPTURE_RE" 2 141 "5" |
|
|
81 |
d G "CCP_CAPTURE_DIV_4" 2 142 "6" |
|
|
82 |
d G "CCP_CAPTURE_DIV_16" 2 143 "7" |
|
|
83 |
d G "CCP_COMPARE_SET_ON_MATCH" 2 144 "8" |
|
|
84 |
d G "CCP_COMPARE_CLR_ON_MATCH" 2 145 "9" |
|
|
85 |
d G "CCP_COMPARE_INT" 2 146 "0xA" |
|
|
86 |
d G "CCP_COMPARE_RESET_TIMER" 2 147 "0xB" |
|
|
87 |
d G "CCP_PWM" 2 148 "0xC" |
|
|
88 |
d G "CCP_PWM_PLUS_1" 2 149 "0x1c" |
|
|
89 |
d G "CCP_PWM_PLUS_2" 2 150 "0x2c" |
|
|
90 |
d G "CCP_PWM_PLUS_3" 2 151 "0x3c" |
|
|
91 |
v G "CCP_1" 2 152 "int16" |
|
|
92 |
v G "CCP_2" 2 156 "int16" |
|
|
93 |
d G "SPI_MASTER" 2 163 "0x20" |
|
|
94 |
d G "SPI_SLAVE" 2 164 "0x24" |
|
|
95 |
d G "SPI_L_TO_H" 2 165 "0" |
|
|
96 |
d G "SPI_H_TO_L" 2 166 "0x10" |
|
|
97 |
d G "SPI_CLK_DIV_4" 2 167 "0" |
|
|
98 |
d G "SPI_CLK_DIV_16" 2 168 "1" |
|
|
99 |
d G "SPI_CLK_DIV_64" 2 169 "2" |
|
|
100 |
d G "SPI_CLK_T2" 2 170 "3" |
|
|
101 |
d G "SPI_SS_DISABLED" 2 171 "1" |
|
|
102 |
d G "SPI_SAMPLE_AT_END" 2 173 "0x8000" |
|
|
103 |
d G "SPI_XMIT_L_TO_H" 2 174 "0x4000" |
|
|
104 |
d G "UART_ADDRESS" 2 180 "2" |
|
|
105 |
d G "UART_DATA" 2 181 "4" |
|
|
106 |
d G "A0_A3_A1_A3" 2 185 "0xfff04" |
|
|
107 |
d G "A0_A3_A1_A2_OUT_ON_A4_A5" 2 186 "0xfcf03" |
|
|
108 |
d G "A0_A3_A1_A3_OUT_ON_A4_A5" 2 187 "0xbcf05" |
|
|
109 |
d G "NC_NC_NC_NC" 2 188 "0x0ff07" |
|
|
110 |
d G "A0_A3_A1_A2" 2 189 "0xfff02" |
|
|
111 |
d G "A0_A3_NC_NC_OUT_ON_A4" 2 190 "0x9ef01" |
|
|
112 |
d G "A0_VR_A1_VR" 2 191 "0x3ff06" |
|
|
113 |
d G "A3_VR_A2_VR" 2 192 "0xcff0e" |
|
|
114 |
d G "CP1_INVERT" 2 193 "0x0000010" |
|
|
115 |
d G "CP2_INVERT" 2 194 "0x0000020" |
|
|
116 |
d G "VREF_LOW" 2 202 "0xa0" |
|
|
117 |
d G "VREF_HIGH" 2 203 "0x80" |
|
|
118 |
d G "VREF_A2" 2 205 "0x40" |
|
|
119 |
d G "ADC_OFF" 2 213 "0" "ADC Off" |
|
|
120 |
d G "ADC_CLOCK_DIV_2" 2 214 "0x10000" |
|
|
121 |
d G "ADC_CLOCK_DIV_4" 2 215 "0x4000" |
|
|
122 |
d G "ADC_CLOCK_DIV_8" 2 216 "0x0040" |
|
|
123 |
d G "ADC_CLOCK_DIV_16" 2 217 "0x4040" |
|
|
124 |
d G "ADC_CLOCK_DIV_32" 2 218 "0x0080" |
|
|
125 |
d G "ADC_CLOCK_DIV_64" 2 219 "0x4080" |
|
|
126 |
d G "ADC_CLOCK_INTERNAL" 2 220 "0x00c0" "Internal 2-6us" |
|
|
127 |
d G "NO_ANALOGS" 2 223 "7" "None" |
|
|
128 |
d G "ALL_ANALOG" 2 224 "0" "A0 A1 A2 A3 A4" |
|
|
129 |
d G "AN0_AN1_AN2_AN4_VSS_VREF" 2 225 "3" "A0 A1 A2 A4 VRefh=A3" |
|
|
130 |
d G "AN0_AN1_AN3" 2 226 "4" "A0 A1 A3" |
|
|
131 |
d G "AN0_AN1_VSS_VREF" 2 227 "5" "A0 A1 VRefh=A3" |
|
|
132 |
d G "AN0_AN1_AN4_VREF_VREF" 2 228 "0x08" "A0 A1 A4 VRefh=A3 VRefl=A2" |
|
|
133 |
d G "AN0_AN1_VREF_VREF" 2 229 "0x0D" "A0 A1 VRefh=A3 VRefl=A2" |
|
|
134 |
d G "AN0" 2 230 "0x0E" "A0" |
|
|
135 |
d G "AN0_VREF_VREF" 2 231 "0x0F" "A0 VRefh=A3 VRefl=A2" |
|
|
136 |
d G "ANALOG_RA3_REF" 2 232 "0x1" "!old only provided for compatibility" |
|
|
137 |
d G "RA0_RA1_RA3_ANALOG" 2 233 "0x4" "!old only provided for compatibility" |
|
|
138 |
d G "RA0_RA1_ANALOG_RA3_REF" 2 234 "0x5" "!old only provided for compatibility" |
|
|
139 |
d G "ANALOG_RA3_RA2_REF" 2 235 "0x8" "!old only provided for compatibility" |
|
|
140 |
d G "RA0_RA1_ANALOG_RA3_RA2_REF" 2 236 "0xD" "!old only provided for compatibility" |
|
|
141 |
d G "RA0_ANALOG" 2 237 "0xE" "!old only provided for compatibility" |
|
|
142 |
d G "RA0_ANALOG_RA3_RA2_REF" 2 238 "0xF" "!old only provided for compatibility" |
|
|
143 |
d G "ADC_START_AND_READ" 2 242 "7" "This is the default if nothing is specified" |
|
|
144 |
d G "ADC_START_ONLY" 2 243 "1" |
|
|
145 |
d G "ADC_READ_ONLY" 2 244 "6" |
|
|
146 |
d G "L_TO_H" 2 256 "0x40" |
|
|
147 |
d G "H_TO_L" 2 257 "0" |
|
|
148 |
d G "GLOBAL" 2 259 "0x0BC0" |
|
|
149 |
d G "INT_RTCC" 2 260 "0x0B20" |
|
|
150 |
d G "INT_RB" 2 261 "0xFF0B08" |
|
|
151 |
d G "INT_EXT" 2 262 "0x0B10" |
|
|
152 |
d G "INT_AD" 2 263 "0x8C40" |
|
|
153 |
d G "INT_TBE" 2 264 "0x8C10" |
|
|
154 |
d G "INT_RDA" 2 265 "0x8C20" |
|
|
155 |
d G "INT_TIMER1" 2 266 "0x8C01" |
|
|
156 |
d G "INT_TIMER2" 2 267 "0x8C02" |
|
|
157 |
d G "INT_CCP1" 2 268 "0x8C04" |
|
|
158 |
d G "INT_CCP2" 2 269 "0x8D01" |
|
|
159 |
d G "INT_SSP" 2 270 "0x8C08" |
|
|
160 |
d G "INT_BUSCOL" 2 271 "0x8D08" |
|
|
161 |
d G "INT_EEPROM" 2 272 "0x8D10" |
|
|
162 |
d G "INT_TIMER0" 2 273 "0x0B20" |
|
|
163 |
d G "INT_COMP" 2 274 "0x8D40" |
|
|
164 |
F G "main" 0 4 "void()" |
|
|
165 |
F B "reset_cpu" 0 0 |
|
|
166 |
F B "abs" 1 0 |
|
|
167 |
F B "sleep" 0 0 |
|
|
168 |
F B "delay_cycles" 1 0 |
|
|
169 |
F B "read_bank" 2 0 |
|
|
170 |
F B "write_bank" 3 0 |
|
|
171 |
F B "shift_left" 2 2 |
|
|
172 |
F B "shift_right" 2 2 |
|
|
173 |
F B "rotate_left" 2 0 |
|
|
174 |
F B "rotate_right" 2 0 |
|
|
175 |
F B "_mul" 2 0 |
|
|
176 |
F B "strcpy" 2 0 |
|
|
177 |
F B "memset" 3 0 |
|
|
178 |
F B "memcpy" 3 0 |
|
|
179 |
F B "isamoung" 2 0 |
|
|
180 |
F B "isamong" 2 0 |
|
|
181 |
F B "bit_set" 2 0 |
|
|
182 |
F B "bit_clear" 2 0 |
|
|
183 |
F B "bit_test" 2 0 |
|
|
184 |
F B "toupper" 1 0 |
|
|
185 |
F B "tolower" 1 0 |
|
|
186 |
F B "swap" 1 0 |
|
|
187 |
F B "printf" 1 255 |
|
|
188 |
F B "fprintf" 1 255 |
|
|
189 |
F B "sprintf" 1 255 |
|
|
190 |
F B "make8" 2 0 |
|
|
191 |
F B "make16" 2 0 |
|
|
192 |
F B "make32" 1 255 |
|
|
193 |
F B "label_address" 1 1 |
|
|
194 |
F B "goto_address" 1 0 |
|
|
195 |
F B "_va_arg" 1 0 |
|
|
196 |
F B "offsetofbit" 2 2 |
|
|
197 |
F B "enable_interrupts" 1 0 |
|
|
198 |
F B "disable_interrupts" 1 0 |
|
|
199 |
F B "interrupt_active" 1 0 |
|
|
200 |
F B "clear_interrupt" 1 0 |
|
|
201 |
F B "jump_to_isr" 1 0 |
|
|
202 |
F B "ext_int_edge" 1 2 |
|
|
203 |
F B "read_eeprom" 1 0 |
|
|
204 |
F B "write_eeprom" 2 0 |
|
|
205 |
F B "read_program_eeprom" 1 0 |
|
|
206 |
F B "write_program_eeprom" 2 0 |
|
|
207 |
F B "write_program_memory" 4 0 |
|
|
208 |
F B "write_program_memory8" 4 0 |
|
|
209 |
F B "read_program_memory" 4 0 |
|
|
210 |
F B "read_program_memory8" 4 0 |
|
|
211 |
F B "output_high" 1 0 |
|
|
212 |
F B "output_low" 1 0 |
|
|
213 |
F B "input" 1 0 |
|
|
214 |
F B "input_state" 1 0 |
|
|
215 |
F B "output_float" 1 0 |
|
|
216 |
F B "output_drive" 1 0 |
|
|
217 |
F B "output_bit" 1 1 |
|
|
218 |
F B "output_toggle" 1 0 |
|
|
219 |
F B "output_a" 1 0 |
|
|
220 |
F B "output_b" 1 0 |
|
|
221 |
F B "output_c" 1 0 |
|
|
222 |
F B "output_d" 1 0 |
|
|
223 |
F B "output_e" 1 0 |
|
|
224 |
F B "input_a" 0 0 |
|
|
225 |
F B "input_b" 0 0 |
|
|
226 |
F B "input_c" 0 0 |
|
|
227 |
F B "input_d" 0 0 |
|
|
228 |
F B "input_e" 0 0 |
|
|
229 |
F B "set_tris_a" 1 0 |
|
|
230 |
F B "set_tris_b" 1 0 |
|
|
231 |
F B "set_tris_c" 1 0 |
|
|
232 |
F B "set_tris_d" 1 0 |
|
|
233 |
F B "set_tris_e" 1 0 |
|
|
234 |
F B "get_tris_a" 0 0 |
|
|
235 |
F B "get_tris_b" 0 0 |
|
|
236 |
F B "get_tris_c" 0 0 |
|
|
237 |
F B "get_tris_d" 0 0 |
|
|
238 |
F B "get_tris_e" 0 0 |
|
|
239 |
F B "port_b_pullups" 1 0 |
|
|
240 |
F B "setup_counters" 2 0 |
|
|
241 |
F B "setup_wdt" 1 0 |
|
|
242 |
F B "restart_cause" 0 0 |
|
|
243 |
F B "restart_wdt" 0 0 |
|
|
244 |
F B "get_rtcc" 0 0 |
|
|
245 |
F B "set_rtcc" 1 0 |
|
|
246 |
F B "get_timer0" 0 0 |
|
|
247 |
F B "set_timer0" 1 0 |
|
|
248 |
F B "setup_comparator" 1 0 |
|
|
249 |
F B "setup_port_a" 1 0 |
|
|
250 |
F B "setup_adc_ports" 1 0 |
|
|
251 |
F B "setup_adc" 1 0 |
|
|
252 |
F B "set_adc_channel" 1 0 |
|
|
253 |
F B "read_adc" 0 1 |
|
|
254 |
F B "adc_done" 0 0 |
|
|
255 |
F B "setup_timer_0" 1 0 |
|
|
256 |
F B "setup_timer_1" 1 0 |
|
|
257 |
F B "get_timer1" 0 0 |
|
|
258 |
F B "set_timer1" 1 0 |
|
|
259 |
F B "setup_timer_2" 3 0 |
|
|
260 |
F B "get_timer2" 0 0 |
|
|
261 |
F B "set_timer2" 1 0 |
|
|
262 |
F B "setup_ccp1" 1 0 |
|
|
263 |
F B "set_pwm1_duty" 1 0 |
|
|
264 |
F B "setup_ccp2" 1 0 |
|
|
265 |
F B "set_pwm2_duty" 1 0 |
|
|
266 |
F B "setup_vref" 1 0 |
|
|
267 |
F B "setup_psp" 1 0 |
|
|
268 |
F B "psp_output_full" 0 0 |
|
|
269 |
F B "psp_input_full" 0 0 |
|
|
270 |
F B "psp_overflow" 0 0 |
|
|
271 |
F B "setup_spi" 1 0 |
|
|
272 |
F B "spi_read" 0 1 |
|
|
273 |
F B "spi_write" 1 0 |
|
|
274 |
F B "spi_data_is_in" 0 0 |
|
|
275 |
F B "setup_spi2" 1 0 |
|
|
276 |
F B "spi_read2" 0 1 |
|
|
277 |
F B "spi_write2" 1 0 |
|
|
278 |
F B "spi_data_is_in2" 0 0 |
|
|
279 |
F B "delay_ms" 1 0 |
|
|
280 |
F B "delay_us" 1 0 |
|
|
281 |
F B "putchar" 1 2 |
|
|
282 |
F B "puts" 1 2 |
|
|
283 |
F B "getch" 0 1 |
|
|
284 |
F B "gets" 1 3 |
|
|
285 |
F B "kbhit" 0 1 |
|
|
286 |
F B "set_uart_speed" 1 3 |
|
|
287 |
F B "setup_uart" 1 3 |