Subversion Repositories svnkaklik

Rev

Go to most recent revision | Details | Last modification | View Log

Rev Author Line No. Line
2 kaklik 1
#include ".\cidla.h"
2
//#include <stdlib.h>
3
 
4
#use rs232(baud=110,parity=N,xmit=PIN_B1,rcv=PIN_B0,bits=8,restart_wdt)
5
 
6
#define IRRX      PIN_B0
7
 
8
#define  TRESHOLD_MAX   60   // rozhodovaci uroven  pro cidla cerna/bila
9
#define  TRESHOLD_MIN   40
10
 
11
unsigned int8 radius;         // co cidla vidi
12
unsigned int8 last_radius;    // rozsah
13
unsigned int8 last_cidla;     // co cidla videla minule
14
unsigned int8 shure;          // citac doby, po kterou musi byt detekovana cihla
15
 
16
//tuning
17
/*#define  PULZACE  3  // urcuje rychlost pulzovani pomoci PWM
18
 
19
//Vystup PWM je na PIN_B3
20
////////////////////////////////////////////////////////////////////////////////
21
void pulzovani()  // postupne rozsvecuje a zhasina podsvetleni
22
{
23
unsigned int8 i,n;
24
   for(n=0;n<=3;n++)
25
   {
26
      for(i=0;i<255;i++) {set_pwm1_duty(i); Delay_ms(PULZACE);} // rozsvecovani
27
      for(i=255;i>0;i--) {set_pwm1_duty(i); Delay_ms(PULZACE);} // zhasinani
28
   }
29
}
30
*/
31
////////////////////////////////////////////////////////////////////////////////
32
void main()
33
{
34
   int8 cidla;
35
   unsigned int8 a;
36
   unsigned int8 n;
37
 
38
   setup_adc_ports(sAN0|sAN1|sAN2|sAN3|sAN4|sAN5|sAN6|VSS_VDD);
39
   setup_adc(ADC_CLOCK_INTERNAL);
40
   setup_spi(SPI_SLAVE|SPI_H_TO_L|SPI_SS_DISABLED);
41
   setup_timer_0(RTCC_INTERNAL|RTCC_DIV_1);
42
   setup_timer_1(T1_DISABLED);
43
   setup_timer_2(T2_DISABLED,0,1);
44
   setup_comparator(NC_NC_NC_NC);
45
   setup_vref(FALSE);
46
 
47
   last_radius=0b00001000;  // minimalni rozsah snimani od stredu
48
   last_cidla=0b00001000;
49
 
50
   shure=0;
51
 
52
   while(true)
53
   {
54
      set_adc_channel(0);
55
      cidla=0;
56
      Delay_us(10);
57
      a=read_adc();
58
 
59
      set_adc_channel(1);
60
      if(a<TRESHOLD_MAX)         //hystereze cidel
61
      {
62
         if(a>TRESHOLD_MIN)
63
         {
64
            cidla |= (last_cidla & 0b00000001);
65
         }
66
         else cidla |= 0b00000001;
67
      }
68
 
69
      a=read_adc();
70
 
71
      set_adc_channel(2);
72
      if(a<TRESHOLD_MAX)
73
      {
74
         if(a>TRESHOLD_MIN)
75
         {
76
            cidla |= (last_cidla & 0b00000010);
77
         }
78
         else cidla |= 0b00000010;
79
      }
80
 
81
      a=read_adc();
82
 
83
      set_adc_channel(3);
84
      if(a<TRESHOLD_MAX)
85
      {
86
         if(a>TRESHOLD_MIN)
87
         {
88
            cidla |= (last_cidla & 0b00000100);
89
         }
90
         else cidla |= 0b00000100;
91
      }
92
 
93
      a=read_adc();
94
 
95
      set_adc_channel(4);
96
      if(a<TRESHOLD_MAX)
97
      {
98
         if(a>TRESHOLD_MIN)
99
         {
100
            cidla |= (last_cidla & 0b00001000);
101
         }
102
         else cidla |= 0b00001000;
103
      }
104
      a=read_adc();
105
 
106
      set_adc_channel(5);
107
 
108
      if(a<TRESHOLD_MAX)
109
      {
110
         if(a>TRESHOLD_MIN)
111
         {
112
            cidla |= (last_cidla & 0b00010000);
113
         }
114
         else cidla |= 0b00010000;
115
      }
116
      a=read_adc();
117
 
118
      set_adc_channel(6);
119
      if(a<TRESHOLD_MAX)
120
      {
121
         if(a>TRESHOLD_MIN)
122
         {
123
            cidla |= (last_cidla & 0b00100000);
124
         }
125
         else cidla |= 0b00100000;
126
      }
127
      a=read_adc();
128
 
129
      if(a<TRESHOLD_MAX)
130
      {
131
         if(a>TRESHOLD_MIN)
132
         {
133
            cidla |=(last_cidla & 0b01000000);
134
         }
135
         else cidla |= 0b01000000;
136
      }
137
 
138
      last_cidla=cidla;
139
 
140
      if (!input(IRRX)) {if (shure<255) shure++;} else {shure=0;};
141
      if (shure>100) cidla|=0b10000000;
142
 
143
      cidla=~cidla;
144
      spi_write(cidla);
145
   }
146
}