Subversion Repositories svnkaklik

Rev

Go to most recent revision | Details | Last modification | View Log

Rev Author Line No. Line
2 kaklik 1
#include ".\cidla.h"
2
//#include <stdlib.h>
3
 
4
#use rs232(baud=9600,parity=N,xmit=PIN_B3,bits=8,restart_wdt)
5
 
6
#define IRRX      PIN_B0
7
 
8
#define  TRESHOLD_MAX   70    // rozhodovaci uroven  pro cidla cerna/bila
9
#define  TRESHOLD_MIN   50
10
#define  CIHLA          10    // doba, po kterou musi byt detekovana cihla
11
 
12
unsigned int8 radius;         // co cidla vidi
13
unsigned int8 last_radius;    // rozsah
14
unsigned int8 last_cidla;     // co cidla videla minule
15
unsigned int8 shure;          // citac doby, po kterou musi byt detekovana cihla
16
 
17
//tuning
18
/*#define  PULZACE  3  // urcuje rychlost pulzovani pomoci PWM
19
 
20
//Vystup PWM je na PIN_B3
21
////////////////////////////////////////////////////////////////////////////////
22
void pulzovani()  // postupne rozsvecuje a zhasina podsvetleni
23
{
24
unsigned int8 i,n;
25
   for(n=0;n<=3;n++)
26
   {
27
      for(i=0;i<255;i++) {set_pwm1_duty(i); Delay_ms(PULZACE);} // rozsvecovani
28
      for(i=255;i>0;i--) {set_pwm1_duty(i); Delay_ms(PULZACE);} // zhasinani
29
   }
30
}
31
*/
32
////////////////////////////////////////////////////////////////////////////////
33
void main()
34
{
35
   int8 cidla;
36
   unsigned int8 a;
37
   unsigned int8 n;
38
 
39
   setup_adc_ports(sAN0|sAN1|sAN2|sAN3|sAN4|sAN5|sAN6|VSS_VDD);
40
   setup_adc(ADC_CLOCK_INTERNAL);
41
   setup_timer_0(RTCC_INTERNAL|RTCC_DIV_1);
42
   setup_timer_1(T1_DISABLED);
43
   setup_timer_2(T2_DISABLED,0,1);
44
   setup_comparator(NC_NC_NC_NC);
45
   setup_vref(FALSE);
46
 
47
   Delay_ms(500);
48
   setup_spi(SPI_SLAVE|SPI_H_TO_L|SPI_SS_DISABLED);
49
 
50
   // diagnostika
51
   printf("\n\r");
52
   Delay_ms(100);
53
   printf("***\n\r");
54
   Delay_ms(100);
55
   for (n=0; n<=6; n++)
56
   {
57
      set_adc_channel(n);
58
      Delay_ms(100);
59
      a=read_adc();
60
      printf("sensor %u - %u\n\r",n,a);
61
   }
62
 
63
   shure=0;
64
   while(true)
65
   {
66
      set_adc_channel(0);
67
      cidla=0;
68
      Delay_us(10);
69
      a=read_adc();
70
 
71
      set_adc_channel(1);
72
      if(a<TRESHOLD_MAX)         //hystereze cidel
73
      {
74
         if(a>TRESHOLD_MIN)
75
         {
76
            cidla |= (last_cidla & 0b00000001);
77
         }
78
         else cidla |= 0b00000001;
79
      }
80
 
81
      a=read_adc();
82
 
83
      set_adc_channel(2);
84
      if(a<TRESHOLD_MAX)
85
      {
86
         if(a>TRESHOLD_MIN)
87
         {
88
            cidla |= (last_cidla & 0b00000010);
89
         }
90
         else cidla |= 0b00000010;
91
      }
92
 
93
      a=read_adc();
94
 
95
      set_adc_channel(3);
96
      if(a<TRESHOLD_MAX)
97
      {
98
         if(a>TRESHOLD_MIN)
99
         {
100
            cidla |= (last_cidla & 0b00000100);
101
         }
102
         else cidla |= 0b00000100;
103
      }
104
 
105
      a=read_adc();
106
 
107
      set_adc_channel(4);
108
      if(a<TRESHOLD_MAX)
109
      {
110
         if(a>TRESHOLD_MIN)
111
         {
112
            cidla |= (last_cidla & 0b00001000);
113
         }
114
         else cidla |= 0b00001000;
115
      }
116
      a=read_adc();
117
 
118
      set_adc_channel(5);
119
 
120
      if(a<TRESHOLD_MAX)
121
      {
122
         if(a>TRESHOLD_MIN)
123
         {
124
            cidla |= (last_cidla & 0b00010000);
125
         }
126
         else cidla |= 0b00010000;
127
      }
128
      a=read_adc();
129
 
130
      set_adc_channel(6);
131
      if(a<TRESHOLD_MAX)
132
      {
133
         if(a>TRESHOLD_MIN)
134
         {
135
            cidla |= (last_cidla & 0b00100000);
136
         }
137
         else cidla |= 0b00100000;
138
      }
139
      a=read_adc();
140
 
141
      if(a<TRESHOLD_MAX)
142
      {
143
         if(a>TRESHOLD_MIN)
144
         {
145
            cidla |=(last_cidla & 0b01000000);
146
         }
147
         else cidla |= 0b01000000;
148
      }
149
 
150
      last_cidla=cidla;
151
 
152
      if (!input(IRRX)) {if (shure<255) shure++;} else {shure=0;};
153
      if (shure>CIHLA) cidla|=0b10000000;
154
 
155
      cidla=~cidla;
156
      spi_write(cidla);
157
   }
158
}