Subversion Repositories svnkaklik

Rev

Rev 152 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log

Rev Author Line No. Line
141 kakl 1 
#include ".\camerus.h"
136 kakl 2 
 
149 kakl 3 
#USE FAST_IO (C)
136 kakl 4 
 
150 kakl 5 
// kroutitka
153 kakl 6 
#define  CERVENA  3  // AN3/RA3
7 
#define  CERNA    2  // AN2/RA2
8 
#define  ZELENA   1  // AN1/RA0
9 
#define  MODRA    0  // AN0/RA1
150 kakl 10 
 
11 
// I/O
149 kakl 12 
#define LED    PIN_C0
13 
#define HREF   PIN_C5
14 
#define PIX    PIN_C6
15 
#define SERVO  PIN_B7
153 kakl 16 
#define MOT_L  PIN_B5
17 
#define MOT_R  PIN_B6
136 kakl 18 
 
19 
void main()
20 
{
21 
   int8 cas;
153 kakl 22 
   int8 offset;
23 
   int8 rr; // Rozumna rychlost
24 
   int8 r1;
25 
   int8 r2;
136 kakl 26 
 
153 kakl 27 
   int16 ble;
28 
 
136 kakl 29 
   setup_adc_ports(ALL_ANALOG);
30 
   setup_adc(ADC_CLOCK_INTERNAL);
31 
   setup_timer_0(RTCC_INTERNAL|RTCC_DIV_1);
32 
   setup_timer_1(T1_DISABLED);
149 kakl 33 
   setup_timer_2(T2_DIV_BY_16,255,1);
136 kakl 34 
   setup_ccp1(CCP_PWM); // RC1
35 
   setup_ccp2(CCP_PWM); // RC2
36 
   setup_comparator(NC_NC_NC_NC);
37 
   setup_vref(FALSE);
38 
 
149 kakl 39 
   set_tris_c(0b11111000);
141 kakl 40 
 
153 kakl 41 
   set_pwm1_duty(0);   // Zastav motory
42 
   set_pwm2_duty(0);
43 
   output_low(MOT_L);
44 
   output_low(MOT_R);
45 
 
136 kakl 46 
   output_high(LED);
47 
 
152 kakl 48 
   delay_ms(200);
49 
 
136 kakl 50 
   i2c_start();      // Reset
51 
   i2c_write(0xC0);
52 
   i2c_write(0x12);
53 
   i2c_write(0x80 | 0x24);
54 
   i2c_stop();
55 
 
56 
   i2c_start();      // BW
57 
   i2c_write(0xC0);
58 
   i2c_write(0x28);
59 
   i2c_write(0b01000001);
60 
   i2c_stop();
61 
 
152 kakl 62 
 
136 kakl 63 
   i2c_start();      // Contrast
64 
   i2c_write(0xC0);
65 
   i2c_write(0x05);
152 kakl 66 
   i2c_write(0xA0);
136 kakl 67 
   i2c_stop();
152 kakl 68 
/*
136 kakl 69 
 
70 
   i2c_start();      // Brightness
71 
   i2c_write(0xC0);
72 
   i2c_write(0x06);
73 
   i2c_write(0x80);
74 
   i2c_stop();
75 
 
76 
   i2c_start();      // Band Filter
77 
   i2c_write(0xC0);
78 
   i2c_write(0x2D);
79 
   i2c_write(0x04 | 0x03);
80 
   i2c_stop();
81 
 
82 
   i2c_start();      // 4-bit, (CLK/4)
83 
   i2c_write(0xC0);
84 
   i2c_write(0x3E);
85 
   i2c_write(0x10 | 0x80);
86 
   i2c_stop();
87 
*/
88 
   i2c_start();      // VSTRT
89 
   i2c_write(0xC0);
90 
   i2c_write(0x19);
91 
   i2c_write(45);
92 
   i2c_stop();
93 
 
94 
   i2c_start();      // VEND
95 
   i2c_write(0xC0);
96 
   i2c_write(0x1A);
97 
   i2c_write(45);
98 
   i2c_stop();
99 
 
100 
   output_low(LED);
153 kakl 101 
   delay_ms(200);
152 kakl 102 
 
103 
/*
104 
   i2c_start();      // BW + freeze AGC/AEC
105 
   i2c_write(0xC0);
106 
   i2c_write(0x28);
107 
   i2c_write(0b01010001);
108 
   i2c_stop();
109 
*/
110 
   output_high(LED);
153 kakl 111 
   delay_ms(200);
152 kakl 112 
   output_low(LED);
113 
 
150 kakl 114 
   cas=128;
136 kakl 115 
 
153 kakl 116 
   ble=0;
117 
 
136 kakl 118 
   while(true)
119 
   {
120 
      while(!input(HREF));
152 kakl 121 
//      delay_cycles(4);
136 kakl 122 
      set_timer0(0);
149 kakl 123 
      while(input(HREF))
124 
      {
152 kakl 125 
         if(!input(PIX))
126 
         if(!input(PIX))
127 
         {
128 
            cas=get_timer0();
129 
            cas=255-cas;
130 
            break;
131 
         };
149 kakl 132 
      };
150 kakl 133 
 
134 
      set_adc_channel(MODRA);
135 
      Delay_ms(1);
136 
      offset=read_adc();
149 kakl 137 
      output_high(SERVO);
152 kakl 138 
      delay_us(1000);
150 kakl 139 
      delay_us(offset);
152 kakl 140 
      delay_us(offset);
149 kakl 141 
      delay_us(cas);
142 
      delay_us(cas);
152 kakl 143 
//      delay_us(cas);
144 
      output_low(SERVO);
153 kakl 145 
 
146 
      ble++;
147 
      set_adc_channel(ZELENA);
148 
      Delay_ms(1);
149 
      offset=read_adc();
150 
      set_adc_channel(CERNA);
151 
      Delay_ms(1);
152 
      rr=read_adc();
153 
      r1=cas>>1;
154 
      r2=255-offset-(cas>>1);
155 
      if (ble==99)
156 
      {
157 
         set_pwm1_duty(rr);
158 
         set_pwm2_duty(rr);
159 
      };
160 
      if ((ble>100)&&(ble<60000))
161 
      {
162 
         if (r1<=rr) set_pwm1_duty(r1);
163 
         if (r2<=rr) set_pwm2_duty(r2);
164 
      }
165 
      else
166 
      {
167 
         set_pwm1_duty(0);
168 
         set_pwm2_duty(0);
169 
      }
136 kakl 170 
   };
171 
}