//dokumenty/skolni/diplomka/conclusion.tex |
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13,7 → 13,7 |
\sec Possible software improvements |
In future versions Xilibus interface should be swapped with an open-source alternative PCIe interfacing module or PCIe may be completely avoided. |
In future versions of device, the Xillybus IP core and interface should be swapped with an open-source alternative PCIe interfacing module or PCIe may be completely avoided. |
SPI configuration data read back should be implemented. |