| /dokumenty/skolni/diplomka/SCH/ADCdual.pdf |
|---|
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| /dokumenty/skolni/diplomka/appendix.tex |
|---|
| 1,10 → 1,10 |
| \newcount\strana |
| \def\adddocument#1{\vfil\break |
| \def\adddocument#1{%\vfil%\break |
| \bgroup |
| \strana=1 \voffset=-1in \hoffset=-1in \nopagenumbers |
| \strana=1 \voffset=-0.1in \hoffset=-0.1in \nopagenumbers |
| \loop |
| \pdfximage width \pdfpagewidth page\strana {#1.pdf} |
| \pdfximage width 0.8\pdfpagewidth page\strana {#1.pdf} |
| \vbox to0pt{\pdfrefximage\pdflastximage \vss} |
| \vfil\break |
| \ifnum\strana<\pdflastximagepages |
| 44,13 → 44,13 |
| * Thesis source code |
| % referencni datovy soubor s navzorkovanymi daty |
| * Measured data file from interferometric station |
| % instalacni soubor pro pouzitou verzi gnuradia |
| % instalacni soubor pro pouzitou verzi gnuradia |
| * Installation file of gnuradio in version used in work |
| % pouzite GRG flow grafy |
| * GRC flow-graphs |
| % datasheety |
| * Used datasheets |
| % fotografie z vyvoje a mereni ADC. |
| % fotografie z vyvoje a mereni ADC. |
| * Photographs from development and testing |
| * Source files for designed PCB modules. |
| \enditems |
| /dokumenty/skolni/diplomka/conclusion.tex |
|---|
| 1,19 → 1,24 |
| \chap Conclusion |
| \chap Conclusions |
| A special design of scalable data-acquisition system was proposed. This system has unique parameters compared to the state of the art radioastronomy signal processing hardware. Offering a 16bit resolution and comparable dynamical range is more than other similar constructions could offer. We demonstrated system functionality on the most basic interferometric station. Further validation of reached parameters would be necessary. Following that, the final design will eventually become a part of MLAB Advanced Radio Astronomy System\cite[mlab-aras]. |
| A special design of the scalable data-acquisition system was proposed. This system has unique parameters compared to the state of the art radioastronomy signal processing hardware. The outcome of this diploma project offers the 16bit resolution and such a dynamical range which is not common with others. The conducted experiments demonstrated the system functionality in the instance of the most basic interferometric station. Additional validation of reached parameters would be necessary, though. The fully functional trial version of the fast multi-channel data acquisition part of the radioastronomy receiver was designed and tested in the reported diploma project. |
| All requirements demanded by the thesis specification have been reached or exceed. The required minimal sampling frequency of 1 MHz has been exceeded five times at least. Requested dynamical range specified by 12 bit have been exceeded at least by 8 dB in the decibel scale. As a by-pass product of digitalisation unit design the software defined GPS disciplined oscillator device has been developed. This device is currently in use on several radio meteor detection stations in Czech Republic. |
| On other hand the proposed design is not still perfect and some minor imperfections should be corrected in the future work. |
| A substantial design and testing experience has been gathered, which will be utilized in the final design aiming at becoming the part of MLAB Advanced Radio Astronomy System~\cite[mlab-aras]. However, additional experimenting is needed. |
| All requirements demanded by the thesis specification have been reached and/or exceeded. The required minimal sampling frequency of 1 MHz has been exceeded five times at least. The requested dynamical range specified by 12 bits have been exceeded at least by 8 dB in the decibel scale. As a by-pass product of digitization unit design, the software defined GPS disciplined oscillator device has been developed. This device is currently in use in several radio meteor detection stations in the Czech Republic. On other hand the proposed design is not still perfect and some minor imperfections should be corrected in future work. |
| The work also attracted the interest of the research team at the Czech Technical University in Prague, Faculty of Electrical Engineering in the project MUMOIRE, which has been solved in collaboration and for the US Missile Defense Agency. MUMOIRE team seeks space debris detection/observation methods, which fuse observations from the optical telescope and the radar. The multi-channel data acquisition part of the receiver should provide better radar observations in which French radar GRAVES serves as the energy source. |
| \sec Possible hardware improvements |
| The PCB design of the used modules might need more precise high-speed optimization of differential pairs. Improvement in high-speed routing allows a possible use of the fastest ADC from the Linear Technology devices family. The use of faster ADCs even improves a range of possible usages. Minor ADC module imperfections, such as the unnecessary separation of FRAME and DCO signal to two connectors, should be mitigated. These two signals should be merged together to one SATA connector. With this modification we will be able to remove one redundant SATA cable between the analog to digital converter device and computational unit section. |
| The PCB design of the used modules might need a more precise high-speed optimization of differential pairs. Improvement in the high-speed routing allows a possible use of the fastest ADC from the Linear Technology devices family. The use of the faster ADCs could even improve a range of possible applications. |
| Minor ADC module imperfections, such as the unnecessary separation of FRAME and DCO signal to two connectors, should be mitigated. These two signals should be merged together to one SATA connector. With this modification, we will be able to remove one redundant SATA cable between the analog to digital converter device and the computational unit section. |
| \sec Possible software improvements |
| In the future versions of the system hardware, the Xillybus IP core and driver interface should be swapped with an open-source alternative of PCIe interfacing module or PCIe might be completely avoided. In ADC configuration FPGA module, the SPI configuration data registers read back should be implemented. |
| In the future versions of the system hardware, the Xillybus IP core and driver interface should be swapped with an open-source alternative of PCIe interfacing module or PCIe might be completely avoided. In ADC configuration FPGA module, the SPI configuration data registers read back should be implemented. |
| \nonum \chap Glossary |
| \nonum \chap Glossary |
| \makeglos |
| /dokumenty/skolni/diplomka/description.tex |
|---|
| 12,7 → 12,7 |
| The summary of other additional required parameters: |
| % |
| \begitems |
| * Dynamic range better than 80 dB, see section \ref[dynamic-range-theory] for the explanation. |
| * Dynamic range better than 80 dB, see Section \ref[dynamic-range-theory] for the explanation. |
| * Phase stability between channels. |
| * Low noise (all types). |
| * Sampling jitter better than 100 metres. |
| 51,7 → 51,7 |
| \sec System description |
| This section deals with the description of the trial version based on Xilinx ML605 development board, see Figure~\ref[ML605-development-board], available at the workplace. This FPGA parameters are more than sufficient of what we need for the fast data acquisition system being developed. Expected system configuration is shown in Figure~\ref[expected-block-schematic]. The system consist antennas equipped by |
| This section deals with the description of the trial version based on Xilinx ML605 development board, see Figure~\ref[ML605-development-board], available at the workplace. This FPGA parameters are more than sufficient of what we need for the fast data acquisition system being developed. Expected system configuration is shown in Figure~\ref[expected-block-schematic]. The system consist antennas equipped by |
| %% dopsat celkovy popis systemu. |
| 139,8 → 139,7 |
| If we add a requirement of a separate output for every analog channel and a 16bit depth, we find that there are only a few 2-Channel simultaneous sampling ADCs currently existing which meet these criteria. We have summarized those ADCs in Table~\ref[ADC-types]. |
| \midinsert |
| \typosize[9/11] \def\t |
| abiteml{ }\let\tabitemr=\tabiteml |
| \typosize[9/11] \def\tabiteml{ }\let\tabitemr=\tabiteml |
| \clabel[ADC-types]{Available ADC types} |
| \ctable{lccccccc}{ |
| \hfil ADC Type & LTC2271 & LTC2190 & LTC2191 & LTC2192 & LTC2193 & LTC2194 & LTC2195 \cr |
| 207,7 → 206,7 |
| The SY55857L is a fully differential, a high-speed dual translator optimized for accepting any logic standard from the single-ended TTL/CMOS to differential LVDS, HSTL, or CML and translate it to LVPECL. Translation is guaranteed for speeds up to 2.5Gbps (2.5GHz toggle frequency). The SY55857L does not internally terminate its inputs, as different interfacing standards have different termination requirements\cite[SY55857L-chip]. |
| Inputs of both used chips are terminated accordingly to the used logic. The LVDS input is terminated differentially by 100~$\Omega$ resistor between the positive and the negative inputs. PECL input is terminated by Thevenin resistor network. Thevenin termination method was selected as optimal one, due to the absence of a proper power voltage (1.3 V) for direct termination by 50~$\Omega$ resistors. Termination on FPGA side is realized directly by settings the proper digital logic type on input pins. |
| Inputs of both used chips are terminated accordingly to the used logic. The LVDS input is terminated differentially by 100~$\Omega$ resistor between the positive and the negative inputs. PECL input is terminated by Thevenin resistor network. Thevenin termination method was selected as optimal one, due to the absence of a proper power voltage (1.3~V) for the direct termination by 50~$\Omega$ resistors. Termination on FPGA side is realized directly by settings the proper digital logic type on input pins. |
| \midinsert |
| /dokumenty/skolni/diplomka/diplomka.tex |
|---|
| 26,7 → 26,7 |
| % optional more information about the document: |
| \workinfo {\url{http://wiki.mlab.cz/doku.php?id=en:sdrx}} |
| % Title / Subtitle in minor language: |
| \title {Fast multi-channel data acquisition system for radio-astronomy receiver} |
| \title {Fast multi-channel data acquisition system for radioastronomy receiver} |
| %\subtitleEN {the plain\TeX{} template for theses at CTU} |
| % If minor language is other than English |
| % use \titleCZ, \subtitleCZ or \titleSK, \subtitleSK instead it. |
| 60,7 → 60,7 |
| \keywordsCZ { Radioastronomie, digitalizace signálu, A/D konverze |
| } |
| \thanks { Chtěl bych poděkovat Ing. Martinu Matouškovi, Ph.D. za věcné připomínky a Ing. Ondřeji Sychrovskému za VHDL implementaci funkcí FPGA. Dále pak Fluktuacii a prof. Ing. Václavu Hlaváčovi, CSc. za jazykové korekce. |
| \thanks { Chtěl bych poděkovat Ing. Martinu Matouškovi, Ph.D. za věcné připomínky a Ing. Ondřeji Sychrovskému za VHDL implementaci funkcí FPGA. Dále pak Fluktuacii a prof. Ing. Václavu Hlaváčovi, CSc. za jazykové korekce. |
| } |
| \declaration { % Use main language here |
| /dokumenty/skolni/diplomka/mybase.bbl |
|---|
| 25,7 → 25,7 |
| \bibitem{amateur-sdr} |
| Pieter-Tjerk de~Boer. |
| \newblock Pa3fwm's software defined radio page, April 2013. |
| \newblock {PA3FWM}'s software defined radio page, April 2013. |
| \newblock \url{http://wwwhome.cs.utwente.nl/~ptdeboer/ham/sdr/}. |
| \bibitem{Z-DOK-connectors} |
| 41,26 → 41,26 |
| \bibitem{USRP-sdr} |
| A~National Instruments~Company Ettus~Research. |
| \newblock Ursp series products, 2013. |
| \newblock {URSP} series products, 2013. |
| \newblock \url{https://www.ettus.com/product/category/USRP-X-Series}. |
| \bibitem{alfa} |
| Chris~Salter Fernando~Camilo, Robert~Minchin. |
| \newblock {\em ALFA: Arecibo L-Band Feed Array}, May 2012. |
| \newblock {\em ALFA: Arecibo {L}-Band Feed Array}, May 2012. |
| \newblock \url{http://www.naic.edu/alfa/}. |
| \bibitem{MLAB-GPSDO} |
| M.~Kakona J.~Kakona. |
| \newblock Software defined gps disciplined oscillator - gpsdo01a, January 2014. |
| \newblock \url{http://wiki.mlab.cz/doku.php?id=en:gpsdo}. |
| \bibitem{radio-jove} |
| Kortánek Jiří. |
| \newblock Radioteleskop jove, přijímač ruchů z jupiterových radiových |
| \newblock Radioteleskop {JOVE}, přijímač ruchů z jupiterových radiových |
| bouří, bakalářská práce 000672041, September 2007. |
| \newblock |
| \url{https://aleph.cvut.cz:443/F?func=direct&doc_number=000672041&local_base=DUPL&format=999}. |
| \bibitem{MLAB-GPSDO} |
| J.~Kakona and M.~Kakona. |
| \newblock Software defined gps disciplined oscillator - gpsdo01a, January 2014. |
| \newblock \url{http://wiki.mlab.cz/doku.php?id=en:gpsdo}. |
| \bibitem{fpga-pcie} |
| Opal Kelly. |
| \newblock Opal kelly xem6110, January 2011. |
| 78,11 → 78,6 |
| January 2011. |
| \newblock \url{http://www.ti.com/lit/wp/snaa110/snaa110.pdf}. |
| \bibitem{lofar} |
| et.~al. M.~P.~van Haarlem. |
| \newblock {\em LOFAR: The LOw-Frequency ARray}, May 2013. |
| \newblock \url{http://arxiv.org/abs/1305.3550}. |
| \bibitem{SY55855V-chip} |
| Inc Micrel. |
| \newblock {\em SY55855V datasheet}, November 2005. |
| 100,7 → 95,7 |
| \bibitem{mlab-arm} |
| MLAB. |
| \newblock Procesory architektury arm ve stavebnici mlab, May 2014. |
| \newblock Procesory architektury {ARM} ve stavebnici {MLAB}, May 2014. |
| \newblock \url{http://wiki.mlab.cz/doku.php?id=cs:arm}. |
| \bibitem{mlab-rmds} |
| 110,12 → 105,12 |
| \bibitem{mlab-sdrx} |
| MLAB. |
| \newblock Softwarově definovaný přijímač mlab sdrx, May 2014. |
| \newblock Softwarově definovaný přijímač {MLAB SDRX}, May 2014. |
| \newblock \url{svn://svn.mlab.cz/MLAB/Designs/HAM\%20Constructions/SDRX02B}. |
| \bibitem{mlab-aras} |
| Jakub~Kákona MLAB. |
| \newblock Pokročilá radioastronomická stanice aras01a, Sep 2013. |
| \newblock Pokročilá radioastronomická stanice {ARAS01A}, Sep 2013. |
| \newblock \url{http://wiki.mlab.cz/doku.php?id=cs:aras}. |
| \bibitem{thunderbolt-chips} |
| 126,7 → 121,7 |
| \bibitem{nvidia-k1} |
| NVIDIA. |
| \newblock The nvidia jetson tk1 development kit, April 2014. |
| \newblock The {NVIDIA} jetson {TK1} development kit, April 2014. |
| \newblock \url{https://developer.nvidia.com/jetson-tk1}. |
| \bibitem{casper-project} |
| 142,19 → 137,19 |
| \bibitem{hackrf-sdr} |
| Michael Ossmann. |
| \newblock Hackrf one an open source sdr platform, 2013. |
| \newblock Hack{RF} one an open source {SDR} platform, 2013. |
| \newblock \url{http://greatscottgadgets.com/hackrf/}. |
| \bibitem{fmc-sata} |
| Dan Strother. |
| \newblock Fmc-lpc to sata adapter board, April 2010. |
| \newblock {FMC-LPC} to {SATA} adapter board, April 2010. |
| \newblock |
| \url{http://danstrother.com/2010/12/04/fmc-lpc-to-sata-adapter-board/}. |
| \bibitem{fpga-middleware} |
| Ondřej Sychrovský. |
| \newblock Connecting an fmc with attached a/d converters -- middleware for an |
| fpga board, ctu-cmp-2014-5, May 2014. |
| \newblock Connecting an {FMC} with attached {A/D} converters -- middleware for |
| an {FPGA} board, ctu-cmp-2014-5, May 2014. |
| \newblock |
| \url{ftp://cmp.felk.cvut.cz/pub/cmp/articles/sychrovsky/Sychrovsky-TR-2014-05.pdf}. |
| 169,4 → 164,9 |
| \newblock Radio astronomy frequency allocations, May 2014. |
| \newblock \url{http://www.ukaranet.org.uk/basics/frequency_allocation.htm}. |
| \bibitem{lofar} |
| M.~P. van Haarlem and et. al. |
| \newblock {\em LOFAR: The {LO}w-{F}requency {AR}ray}, May 2013. |
| \newblock \url{http://arxiv.org/abs/1305.3550}. |
| \end{thebibliography} |
| /dokumenty/skolni/diplomka/mybase.bib |
|---|
| 27,8 → 27,8 |
| @MANUAL{lofar, |
| AUTHOR = {M. P. van Haarlem, et. al.}, |
| TITLE = { LOFAR: The LOw-Frequency ARray}, |
| AUTHOR = {M. P. van Haarlem and et. al.}, |
| TITLE = { LOFAR: The {LO}w-{F}requency {AR}ray}, |
| YEAR = {2013}, |
| MONTH = May, |
| NOTE = {\url{http://arxiv.org/abs/1305.3550}}, |
| 36,7 → 36,7 |
| @MANUAL{alfa, |
| AUTHOR = {Fernando Camilo, Robert Minchin, Chris Salter}, |
| TITLE = {ALFA: Arecibo L-Band Feed Array}, |
| TITLE = {ALFA: Arecibo {L}-Band Feed Array}, |
| YEAR = {2012}, |
| MONTH = May, |
| NOTE = {\url{http://www.naic.edu/alfa/}}, |
| 92,7 → 92,7 |
| @MISC{amateur-sdr, |
| AUTHOR = {Pieter-Tjerk de Boer}, |
| TITLE = {PA3FWM's software defined radio page}, |
| TITLE = {{PA3FWM}'s software defined radio page}, |
| YEAR = {2013}, |
| MONTH = Apr, |
| NOTE = {\url{http://wwwhome.cs.utwente.nl/~ptdeboer/ham/sdr/}}, |
| 102,7 → 102,7 |
| @MISC{USRP-sdr, |
| AUTHOR = {Ettus Research, A National Instruments Company}, |
| TITLE = {URSP Series products}, |
| TITLE = {{URSP} Series products}, |
| YEAR = {2013}, |
| NOTE = {\url{https://www.ettus.com/product/category/USRP-X-Series}}, |
| URLDATE= {2014-5-3}, |
| 110,7 → 110,7 |
| @MISC{hackrf-sdr, |
| AUTHOR = {Michael Ossmann}, |
| TITLE = {HackRF One an open source SDR platform}, |
| TITLE = {Hack{RF} One an open source {SDR} platform}, |
| YEAR = {2013}, |
| NOTE = {\url{http://greatscottgadgets.com/hackrf/}}, |
| URLDATE= {2014-5-11}, |
| 119,7 → 119,7 |
| @MISC{MLAB-GPSDO, |
| AUTHOR = {J. Kakona, M. Kakona}, |
| AUTHOR = {J. Kakona and M. Kakona}, |
| TITLE = {Software Defined GPS disciplined oscillator - GPSDO01A}, |
| YEAR = {2014}, |
| MONTH = Jan, |
| 188,7 → 188,7 |
| @MISC{fpga-middleware, |
| AUTHOR = {Ondřej Sychrovský}, |
| TITLE = {Connecting an FMC with attached A/D Converters -- Middleware for an FPGA board, CTU-CMP-2014-5}, |
| TITLE = {Connecting an {FMC} with attached {A/D} Converters -- Middleware for an {FPGA} board, CTU-CMP-2014-5}, |
| YEAR = {2014}, |
| MONTH = May, |
| DAY = {5}, |
| 198,7 → 198,7 |
| @MISC{radio-jove, |
| AUTHOR = {Kortánek Jiří}, |
| TITLE = {Radioteleskop JOVE, přijímač ruchů z Jupiterových radiových bouří, bakalářská práce 000672041}, |
| TITLE = {Radioteleskop {JOVE}, přijímač ruchů z Jupiterových radiových bouří, bakalářská práce 000672041}, |
| YEAR = {2007}, |
| MONTH = Sep, |
| DAY = {17}, |
| 237,7 → 237,7 |
| @MISC{mlab-aras, |
| AUTHOR = {MLAB, Jakub Kákona}, |
| TITLE = {Pokročilá radioastronomická stanice ARAS01A}, |
| TITLE = {Pokročilá radioastronomická stanice {ARAS01A}}, |
| YEAR = {2013}, |
| MONTH = {Sep}, |
| DAY = {11}, |
| 247,7 → 247,7 |
| @MISC{mlab-sdrx, |
| AUTHOR = {MLAB}, |
| TITLE = {Softwarově definovaný přijímač MLAB SDRX}, |
| TITLE = {Softwarově definovaný přijímač {MLAB SDRX}}, |
| YEAR = {2014}, |
| MONTH = May, |
| NOTE = {\url{svn://svn.mlab.cz/MLAB/Designs/HAM\%20Constructions/SDRX02B}}, |
| 265,7 → 265,7 |
| @MISC{mlab-arm, |
| AUTHOR = {MLAB}, |
| TITLE = {Procesory architektury ARM ve stavebnici MLAB}, |
| TITLE = {Procesory architektury {ARM} ve stavebnici {MLAB}}, |
| YEAR = {2014}, |
| MONTH = May, |
| NOTE = {\url{http://wiki.mlab.cz/doku.php?id=cs:arm}}, |
| 275,7 → 275,7 |
| @MISC{fmc-sata, |
| AUTHOR = {Dan Strother}, |
| TITLE = {FMC-LPC to SATA adapter board}, |
| TITLE = {{FMC-LPC} to {SATA} adapter board}, |
| YEAR = {2010}, |
| MONTH = Apr, |
| NOTE = {\url{http://danstrother.com/2010/12/04/fmc-lpc-to-sata-adapter-board/}}, |
| 284,7 → 284,7 |
| @MISC{nvidia-k1, |
| AUTHOR = {NVIDIA}, |
| TITLE = {The NVIDIA Jetson TK1 Development Kit}, |
| TITLE = {The {NVIDIA} Jetson {TK1} Development Kit}, |
| YEAR = {2014}, |
| MONTH = Apr, |
| NOTE = {\url{https://developer.nvidia.com/jetson-tk1}}, |