MLABlibrarysvnkaklikMLAB_E8magsvn

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  → /dokumenty/skolni/diplomka/conclusion.tex @ 1134

  → /dokumenty/skolni/diplomka/conclusion.tex @ 1135

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Ignore whitespace Rev 1134 → Rev 1135

/dokumenty/skolni/diplomka/conclusion.tex
13,6 → 13,10
In the future versions of the system hardware, the Xillybus IP core and driver interface should be swapped with an open-source alternative of PCIe interfacing module or PCIe might be completely avoided. In ADC configuration FPGA module, the SPI configuration data registers read back should be implemented.
\nonum \chap Glossary
\makeglos
\bibchap
\usebbl/c mybase