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Ignore whitespace Rev 1110 → Rev 1111

/dokumenty/skolni/diplomka/diplomka.ref
8,7 → 8,6
\Xpage{1}
\Xchap{1}{Introduction }{1}
\Xsec{1.1}{Current radioastronomy problems }{1}
\Xfnote
\Xpage{2}
\Xsec{1.2}{Modern Radio astronomy receiver }{2}
\Xfnote
25,75 → 24,89
\Xsecc{1.4.1}{Custom digitalization system }{4}
\Xsecc{1.4.2}{Modular digitalization systems }{4}
\Xpage{5}
\Xchap{2}{Trial design }{5}
\Xsec{2.1}{Required parameters }{5}
\Xsec{2.2}{Sampling frequency }{5}
\Xsec{2.3}{System scalability }{5}
\Xpage{6}
\Xchap{2}{Trial design }{6}
\Xsec{2.1}{Required parameters }{6}
\Xsec{2.2}{Sampling frequency }{6}
\Xsec{2.3}{System scalability }{6}
\Xsecc{2.3.1}{Differential signaling }{6}
\Xsecc{2.3.2}{Phase matching }{6}
\Xsec{2.4}{System description }{6}
\Xsecc{2.4.1}{Frequency synthesis }{6}
\Xfnote
\Xpage{7}
\Xsecc{2.3.1}{Differential signaling }{7}
\Xsecc{2.3.2}{Phase matching }{7}
\Xsec{2.4}{System description }{7}
\Xsecc{2.4.1}{Frequency synthesis }{7}
\Xfnote
\Xsecc{2.4.2}{Signal cable connectors }{7}
\Xsecc{2.4.3}{Signal integrity requirements \immediate \write 16{l.99 OPmac WARNING: duplicated label [diff-signaling], ignored.}\ignorespaces }{7}
\Xlabel{diff-signaling}{2.4.4}
\Xsecc{2.4.4}{ADC modules design }{7}
\Xsecc{2.4.5}{ADC selection }{7}
\Xpage{8}
\Xsecc{2.4.2}{Signal cable connectors }{8}
\Xsecc{2.4.3}{Signal integrity requirements \immediate \write 16{l.99 OPmac WARNING: duplicated label [diff-signaling], ignored.}\ignorespaces }{8}
\Xlabel{diff-signaling}{2.4.4}
\Xsecc{2.4.4}{ADC modules design }{8}
\Xsecc{2.4.5}{ADC selection }{8}
\Xpage{9}
\Xfig{img-miniSAS-cable}{2.1}{Used miniSAS cable}
\Xlabel{img-miniSAS-cable}{2.1}
\Xpage{10}
\Xpage{9}
\Xtab{ADC-types}{2.1}{Available ADC types}
\Xlabel{ADC-types}{2.1}
\Xfig{1-line-out}{2.2}{Single line ADC output signals}
\Xlabel{1-line-out}{2.2}
\Xpage{10}
\Xsecc{2.4.6}{ADC modules interface }{10}
\Xpage{11}
\Xsecc{2.4.6}{ADC modules interface }{11}
\Xpage{12}
\Xfig{VITA57-regions}{2.4}{VITA57 board geometry}
\Xlabel{VITA57-regions}{2.4}
\Xsecc{2.4.7}{Output data format }{12}
\Xsec{2.5}{Achieved parameters }{12}
\Xsecc{2.5.1}{Data reading and recording }{12}
\Xsecc{2.5.2}{ADC module parameters }{12}
\Xsecc{2.4.7}{Output data format }{11}
\Xsec{2.5}{Achieved parameters }{11}
\Xsecc{2.5.1}{Data reading and recording }{11}
\Xsecc{2.5.2}{ADC module parameters }{11}
\Xpage{12}
\Xpage{13}
\Xpage{14}
\Xfig{ADC1-FFT}{2.7}{ADC1 sine test FFT}
\Xlabel{ADC1-FFT}{2.7}
\Xpage{15}
\Xpage{14}
\Xfig{ADC2-FFT}{2.8}{ADC2 sine test FFT}
\Xlabel{ADC2-FFT}{2.8}
\Xpage{16}
\Xchap{3}{Example of usage }{16}
\Xsec{3.1}{Basic interferometer station }{16}
\Xpage{15}
\Xchap{3}{Example of usage }{15}
\Xsec{3.1}{Basic interferometer station }{15}
\Xfig{block-schematic}{3.1}{Receiver block schematic}
\Xlabel{block-schematic}{3.1}
\Xpage{17}
\Xpage{16}
\Xfig{meteor-reflection}{3.2}{Meteor reflection}
\Xlabel{meteor-reflection}{3.2}
\Xfig{phase-phase-difference}{3.3}{Phase difference}
\Xlabel{phase-phase-difference}{3.3}
\Xpage{17}
\Xchap{4}{Proposed final system }{17}
\Xsec{4.1}{Custom design of FPGA board }{17}
\Xsec{4.2}{Parralella board computer }{17}
\Xsec{4.3}{GPU based computational system }{17}
\Xpage{18}
\Xchap{4}{Proposed final system }{18}
\Xsec{4.1}{Custom design of FPGA board }{18}
\Xsec{4.2}{Parralella board computer }{18}
\Xsec{4.3}{GPU based computational system }{18}
\Xpage{19}
\Xfig{img-NVIDIA-K1}{4.1}{NVIDIA Jetson TK1 Development Kit}
\Xlabel{img-NVIDIA-K1}{4.1}
\Xpage{19}
\Xchap{5}{Conclusion }{19}
\Xsec{5.1}{Possible future improvements }{19}
\Xbib{radio-astronomy-frequency}{1}
\Xbib{spectrum-observatory}{2}
\Xbib{lofar}{3}
\Xbib{astron-devices}{4}
\Xbib{casper-project}{5}
\Xpage{20}
\Xchap{5}{Conclusion }{20}
\Xsec{5.1}{Possible future improvements }{20}
\Xchap{!1}{References}{20}
\Xbib{casper-paper}{6}
\Xbib{Z-DOK-connectors}{7}
\Xbib{amateur-fringes}{8}
\Xbib{amateur-sdr}{9}
\Xbib{MLAB-GPSDO}{10}
\Xbib{serial-lvds}{11}
\Xbib{fpga-pcie}{12}
\Xpage{21}
\Xchap{A}{Circuit diagram of ADCdual01A module }{21}
\Xpage{22}
\Xchap{B}{Circuit diagram of FMC2DIFF module }{22}
\Xpage{23}
\Xchap{A}{Circuit diagram of ADCdual01A module }{23}
\Xpage{24}
\Xchap{B}{Circuit diagram of FMC2DIFF module }{24}
\Xpage{25}
\Xpage{26}
\Xpage{27}
\Xchap{C}{Content of enclosed CD }{27}
\Xpage{28}
\Xpage{29}
\Xchap{C}{Content of enclosed CD }{29}