| 1,25 → 1,25 |
|---|
| \chap Results obtained in the trial version |
| |
| The trial version construction was tested for proper handling of sampling rates in the range of 5 MSPS to 15 MSPS, but it should work even above this limit. The system works on i7 8 cores computer with Ubuntu 12.04 LTS operating system. Data recording of input signal is impossible above the sampling rates of around 7 MSPS due to bottleneck at HDD speed limits, but it should be resolved by the use of SSD disk drive. However, such design has not been tested in our setup. |
| The trial version construction was tested for proper handling of sampling rates in the range of 5 MSPS to 15 MSPS, but it should work even above this limit. The system works on i7 8 cores computer with Ubuntu 12.04 LTS operating system. Data recording of input signal is impossible above the sampling rates of around 7 MSPS due to the bottleneck at HDD speed limits, but it should be resolved by the use of SSD disk drive. However, such design has not been tested in our setup. |
| |
| \sec Measured parameters |
| |
| Two prototypes of ADC modules were assembled and tested. The first prototype, labeled ADC1, has LTC2190 ADC chip populated with LT6600-5 front-end operational amplifier. It also has a 1kOhm resistors populated on inputs which give it an ability of an internal attenuation of the input signal. The value of this attenuation $A$ is calculated by |
| Two prototypes of ADC modules were assembled and tested. The first prototype, labeled ADC1, has LTC2190 ADC chip populated with LT6600-5 front-end operational amplifier. It has also a 1~kOhm resistors on inputs which give it an ability of the internal attenuation of the input signal. The value of this attenuation $A$ is calculated as |
| |
| \label[ADC1-gain] |
| $$ |
| A = {806 R_1 \over R_1 + R_2}\,, \eqmark |
| A = {806 \; R_1 \over R_1 + R_2}\,, \eqmark |
| $$ |
| % |
| where |
| where |
| \begitems |
| * $A$ - Gain of an input amplifier, |
| * $R_1$ - Output impedance of signal source (usually 50 $\Omega$), |
| * $A$ - Gain of the input amplifier, |
| * $R_1$ - Output impedance of the signal source (usually 50 $\Omega$), |
| * $R_2$ - Value of serial resistors at operational amplifier inputs. |
| \enditems |
| |
| We have $R_2 = 1000\, \Omega$ and $R_1 = 50\, \Omega$ which imply that $A = 0.815$. This value of A was further confirmed by the measurement. |
| In our measurement setup we have H1012 Ethernet transformer connected to inputs of ADC. We have used this transformer for signal symetrization from BNC connector at Agilent 33220A signal generator, see Figure~\ref[balun-circuit]. |
| We have $R_2 = 1000\, \Omega$ and $R_1 = 50\, \Omega$ which implies that $A = 0.815$. This value of A was also confirmed by the measurement. |
| In our measurement setup, we have H1012 Ethernet transformer connected to inputs of ADC. We have used this transformer for signal symetrization from BNC connector at Agilent 33220A signal generator, see Figure~\ref[balun-circuit]. |
| |
| \midinsert |
| \clabel[balun-circuit]{Balun transformer circuit} |
| 27,7 → 27,7 |
|---|
| \caption/f Simplified balun transformer circuit diagram (left) and balun transformer constructed from H1012 transformer salvaged from an old Ethernet card (right). |
| \endinsert |
| |
| The signal generator Agilent 33220A which we used, does not have optimal parameters for this type of dynamic range measurement. Signal distortion and spurious levels are only -70 dBc according to Agilent datasheet \cite[33220A-generator]. We have managed to measure an ADC saturation voltage of 706 mV (generator output) with this setup. The main result of our measurement, seen as a FFT plot shown in Figure~\ref[ADC1-FFT], confirms $>$80 dB dynamic range at ADC module input. |
| The signal generator Agilent 33220A, which we used, does not have optimal parameters for this type of dynamic range measurement. The signal distortion and spurious levels are only -70 dBc according to Agilent datasheet \cite[33220A-generator]. We have managed to measure ADC saturation voltage of 706 mV (generator output) with this setup. The main result of our measurement, seen as a FFT plot shown in Figure~\ref[ADC1-FFT], confirms the dynamic range $>$80 dB at ADC module input. |
| |
| \midinsert |
| \clabel[ADC1-FFT]{ADC1 sine test FFT} |
| 36,14 → 36,14 |
|---|
| \endinsert |
| |
| |
| Similar test was performed at ADC2 module. For ADC2 we have to use formula with a different constant |
| Similar test was performed with ADC2 module. For ADC2 we have to use formula with a different constant |
| |
| \label[ADC2-gain] |
| $$ |
| A = {1580 R_1 \over R_1 + R_2}\,. \eqmark |
| $$ |
| $$ |
| % |
| The ADC2 module has LT6600-2.5 amplifiers populated on it with a gain equal to $A = 2.457$ and uses the same $R_2$ resistors. We measured saturation voltage of 380 mV (generator output) at channel 1 on this ADC. It is well within the parameter tolerances of the used setup. Again, FFT plot shown in Figure~\ref[ADC2-FFT] confirms $>$ 80 dB dynamic range. |
| The ADC2 module has LT6600-2.5 amplifiers populated on it with a gain equal to $A = 2.457$ and uses the same $R_2$ resistors. We measured the saturation voltage of 380 mV (generator output) at the channel 1 on this ADC. It is well within the parameter tolerances of the used setup. Again, FFT plot shown in Figure~\ref[ADC2-FFT] confirms the dynamic range $>$ 80 dB. |
| |
| |
| \midinsert |
| 54,16 → 54,16 |
|---|
| |
| \sec Example of usage |
| |
| At current state the constructed radioastronomy digitization unit paired with SDRX01B receiver module could be used in several experiments. We describe overall ideas of these experiments and show preliminary results in cases where we obtain the data. |
| At current state, the constructed radioastronomy digitization unit paired with SDRX01B receiver module could be used in several experiments. We describe overall ideas of these experiments and show preliminary results in cases where we obtain the data. |
| |
| \secc Simple polarimeter station |
| |
| If we use two antennas with different linear polarization (Crossed Yagi antennas for example), we should determine polarization state of received signal. Such kind of measurement is useful if we need an additional information about reflection to distinguish between targets. This configuration needs more complicated antenna configuration and we had no experience with this type of observation, so we have not implemented this experiment. However, this is exactly the scenario the system is designed for. |
| If we use two antennas with different linear polarization (Crossed Yagi antennas for example), we should determine the polarization state of the received signal. Such kind of measurement is useful if we need an additional information about the reflection to distinguish between targets. This configuration needs a more complicated antenna configuration. We had no experience with this type of observation, so we did not implement this experiment. However, this is exactly the scenario the system is designed for. |
| |
| \secc Basic interferometric station |
| |
| Interferometry station was chosen to serve as the most basic experimental setup. We connected the new data acquisition system to two SDRX01B receivers. Block schematics of the setup used is shown in the Figure~\ref[block-schematic]. Two ground-plane antennae were used and mounted outside the balcony at CTU building at location 50$^\circ$ 4' 36.102'' N, 14$^\circ$ 25' 4.170'' E. |
| Antennae were equipped with LNA01A amplifiers. All coaxial cables had the same length of 5 meters. Antennae were isolated by common mode ferrite bead mounted on cable to minimise the signal coupling between antennas. Evaluation system consisted of SDGPSDO local oscillator subsystem used to tune the local oscillator frequency. |
| The interferometry station was chosen to serve as the most basic experimental setup. We connected the new data acquisition system to two SDRX01B receivers. The schematic diagram of the setup used is shown in Figure~\ref[block-schematic]. Two ground-plane antennas were used and mounted outside the balcony of the CTU building at the location 50$^\circ$ 4' 36.102'' N, 14$^\circ$ 25' 4.170'' E. |
| Antennas were equipped with LNA01A amplifiers. All coaxial cables had the same length of 5 meters. Antennas were isolated by the common mode ferrite bead mounted on the cable to minimise the signal coupling between antennas. The evaluation system consisted of SDGPSDO local oscillator subsystem used to tune the local oscillator frequency. |
| |
| \midinsert |
| \clabel[block-schematic]{Receiver block schematic} |
| 70,29 → 70,29 |
|---|
| \picw=\pdfpagewidth \setbox0=\hbox{\inspic ./img/Basic_interferometer.png } |
| \par\nobreak \vskip\wd0 \vskip-\ht0 |
| \centerline {\kern\ht0 \pdfsave\pdfrotate{90}\rlap{\box0}\pdfrestore} |
| \caption/f Complete receiver block schematic of dual antenna interferometric station. |
| \caption/f The complete receiver block schematic diagram of the dual antenna interferometric station. |
| \endinsert |
| |
| Despite of the schematic diagram proposed at beginning of system description \ref[expected-block-schematic]. |
| We have used two separate oscillators -- one oscillator drives ENC signal to ADCs still through FPGA based divider and the other one drives it to SDRX01B mixer. |
| The reason for this modification was an attempt to simplify the frequency tuning during the experiment. A single oscillator may be used only with a proper setting of FPGA divider and this divider may be modified only by recompilation of FPGA code and loading/flashing a new FPGA design. Due to fact that the FPGA is connected to PCI express and kernel drivers with hardware must be reinitialized, reboot of PC is required every time a FPGA design is changed. Instead of this complicated procedure, we set the FPGA divider to a constant division factor of 30 and used another district oscillator for ADCdual01 sampling modules and for SDRX01B receiver. |
| We have used ACOUNT02A MLAB instrument for frequency checking of correct setup on both local oscillators. |
| Despite of the schematic diagram proposed at beginning of system description~ \ref[expected-block-schematic], we have used two separate oscillators. One oscillator drives ENC signal to ADCs still through FPGA based divider and the second oscilator drives it to SDRX01B mixer. |
| |
| The reason for this modification was an attempt to simplify the frequency tuning during the experiment. A single oscillator may be used only with a proper setting of FPGA divider. This divider may be modified only by the recompilation of FPGA code and loading/flashing a new FPGA design. Due to fact that the FPGA is connected to PCI express and kernel drivers with hardware must be reinitialized, the reboot of PC is required every time a FPGA design is changed. Instead of this complicated procedure, we set the FPGA divider to a constant division factor of 30 and used another district oscillator for ADCdual01 sampling modules and for SDRX01B receiver. |
| We have used ACOUNT02A MLAB instrument for frequency checking of the correct setup on both local oscillators. |
| |
| \midinsert |
| \clabel[phase-difference]{Phase difference} |
| \picw=15cm \cinspic ./img/screenshots/phase_difference.png |
| \caption/f Demonstration of phase difference between antennae. |
| \caption/f Demonstration of the phase difference between antennas. |
| \endinsert |
| |
| For the simplest demonstration of phase difference between antennae, we have analysed part of the signal by complex conjugate multiplication between channels. Results of this analysis can be seen in the following picture \ref[phase-difference]. Points of the selected part of the signal create a clear vector, which illustrates the presence of the constant phase difference determined by RF source direction. |
| For the simplest demonstration of the phase difference between antennas, we have analyzed part of the signal by the complex conjugate multiplication between channels. Results of this analysis can be seen in the following picture, see Figure~\ref[phase-difference]. Points of the selected part of the signal create a clear vector, which illustrates the presence of the constant phase difference determined by RF source direction. |
| |
| \secc Simple passive Doppler radar |
| |
| If we use an existing transmitter with known carrier frequency and proper antenna, we can detect flying object as signals surrounding the transmitter carrier frequency. We planned this experiment with the same station configuration as was described in section \ref[expected-block-schematic]. The ISS \glos{ISS}{International Space Station} as object and GRAVES radar transmitter were selected as adequate testing objects (We know ISS reflections from previous experiments). This experiment could be realised by previously described interferometer station, but unfortunately we missed the suitable orbit pass due to technical lacks with station configuration. |
| If we use the existing transmitter with the known carrier frequency and a proper antenna, we can detect a flying object as signals surrounding the transmitter carrier frequency. We planned this experiment with the same station configuration as was described in Section~\ref[expected-block-schematic]. The International Space Station (ISS\glos{ISS}{International Space Station}) as the object and GRAVES radar transmitter were selected as adequate testing objects. (We know ISS reflections from previous experiments). This experiment could be realized by the interferometer station described previously. However, we missed unfortunately the suitable orbit pass due to technical lacks with station configuration. |
| |
| \secc Meteor detection station |
| |
| The same observational station configuration should be used for meteor detection system \cite[mlab-rmds]. We used the GRAVES radar as suitable signal source and monitored its carrier frequency. GRAVES radar is located in France therefore we could not see its direct carrier signal, but meteors reflect it signal and as consequence we could easily detect meteor presence as reflection appearance. One meteor detected by this method is shown in picture \ref[meteor-reflection]. |
| The same observational station configuration should be used for the meteor detection system~\cite[mlab-rmds]. We used the GRAVES radar as a suitable signal source and we monitored its carrier frequency. GRAVES radar is located in France therefore we could not see its direct carrier signal, but meteors reflect it signal. As the consequence, we could easily detect the meteor presence as the reflection appearance. One meteor detected by this method is shown in Figure~\ref[meteor-reflection]. |
| |
| \midinsert |
| \clabel[meteor-reflection]{Meteor reflection} |
| 103,9 → 103,9 |
|---|
| |
| \chap Proposition of the final system |
| |
| The construction of the final system, that is supposed to be employed for real radioastronomy observations is described in this chapter. It is mainly a theoretical analysis of the data handling systems. Realization of the described ideas might be possible as a part of our future development after we fully evaluate and test the current trial design. |
| The construction of the final system, which is supposed to be employed for real radioastronomy observations, is described in this chapter. It deals mainly with the theoretical analysis of the data handling systems. The implementation of the described ideas might be possible as part of our future development after we fully evaluate and test the current trial design. |
| |
| The system requires proper handling of huge amounts of data and either huge and fast storage capacity is needed to store the captured signal data, or enormous computational power is required for online data processing and filtering. Several hardware approaches currently exist and are in use for data processing problem handling. Either powerful multi gigahertz CPUs, GPUs, FPGAs, or specially constructed ASICs are used for this task. |
| The system requires proper handling of huge amounts of data. Either a huge and fast storage capacity is needed to store the captured signal data, or an enormous computational power is required for the online data processing and filtering. Several hardware approaches currently exist and are in use for the data processing problem handling. Either powerful multi gigahertz CPUs, GPUs, FPGAs, or specially constructed ASICs are used for this task. |
| |
| \sec Custom design of FPGA board |
| |