22,7 → 22,6 |
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We calculate minimum data bandwidth data rate for eight receivers, 2 bytes per sample and 5MSPS as $8 * 2 * 5e6 = 80$ MB/s. Such data rate is at the limit of real writing speed o classical HDD and it is almost double of real bandwidth of USB 2.0 interface. |
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\sec System scalability |
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192,15 → 191,12 |
\secc ADC module parameters |
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Two pieces of ADC modules were completed and tested. The first piece, labeled ADC1, has LTC21190 |
ADC chip populated with LT660015 front-end operational amplifier. It also has a 1kOhm resistors populated on inputs which gives it an ability of an internal attenuation of input signal. The value of this attenuation $A$ is described by the following formula |
ADC chip populated with LT6600-5 front-end operational amplifier. It also has a 1kOhm resistors populated on inputs which gives it an ability of an internal attenuation of input signal. The value of this attenuation $A$ is described by the following formula |
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$$ |
A = {1580 \times R_1 \over R_1 + R_2} |
$$ |
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\midinsert |
\picw=15cm \cinspic ./img/screenshots/ADC1_CH2_FFT.png |
\caption/f Sine signal from ADC1 module with LTC21190 and LT6600-5 devices. |
\caption/f Sine signal sampled by ADC1 module with LTC21190 and LT6600-5 devices. |
\endinsert |
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207,27 → 203,41 |
ADC1 CH1 maximal input 705.7 mV |
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$$ |
A = {1580 \times R_1 \over R_1 + R_2} |
$$ |
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Where is |
\begitems |
* $A$ - Gain of input aplifier. |
* $R_1$ - Output impedance of signal source (usually 50 Ohm). |
* $R_2$ - Value of serial resitors at operational apmlifier inputs. |
\enditems |
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\midinsert |
\picw=15cm \cinspic ./img/screenshots/ADC1_CH2_FFT.png |
\caption/f Sine signal from ADC1 module with LTC21190 and LT6600-5 devices. |
\picw=15cm \cinspic ./img/screenshots/ADC2_CH1_FFT.png |
\caption/f Sine signal sampled by ADC2 module with LTC2271 and LT6600-2.5 devices. |
\endinsert |
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LTC2271 |
6600125 |
1k |
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ADC2 CH1 maximal input 380 mV |
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$$ |
D.R. = N * b * |
A = {806 \times R_1 \over R_1 + R_2} |
$$ |
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Where is |
\begitems |
* N - number of receivers |
* Mi |
* $A$ - Gain of input aplifier. |
* $R_1$ - Output impedance of signal source (usually 50 Ohm). |
* $R_2$ - Value of serial resitors at operational apmlifier inputs. |
\enditems |
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Both images confirms that ADC modules have input dynamical range 80 dB at least. |
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\chap Example of usage |