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/dokumenty/skolni/diplomka/desctription.tex
35,20 → 35,18
 
\secc Frequency synthesis
 
Centralised topology was used for frequency synthesis. One precise high frequency and low jitter digital oscillator was used and other working frequencies are delivered by division from it. This central oscillator has software defined GPS disciplined control loop for frequency stabilisation.\ref{gpsdo} This method was used in order to meet modern requirements on radioastronomy equipment, which needs precise frequency and phase stability on wide area for effective radioastronomy imaging.
Centralised topology was used for frequency synthesis. One precise high frequency and low jitter digital oscillator was used and other working frequencies are delivered by division from it. This central oscillator has software defined GPS disciplined control loop for frequency stabilisation.\fnote{\url{http://wiki.mlab.cz/doku.php?id=en:gpsdo} SDGPSDO design was developed in parallel to this diploma thesis construction as related project, but it is not explicitly required by specification.}
This method was used in order to meet modern requirements on radioastronomy equipment, which needs precise frequency and phase stability on wide area for effective radioastronomy imaging.
 
\fnote{This design was developed in parallel to this diploma thesis construction as related project, but it is not explicitly required by specification.}
 
\secc Signal connectors
 
Several widely used and commercially easily accessible differential connectors was considered.
Several widely used and commercially easily accessible differential connectors were considered.
 
\begitems
 
* <del>[[http://en.wikipedia.org/wiki/Hdmi|HDMI]]</del>
* [[http://en.wikipedia.org/wiki/Serial_attached_SCSI#Connectors|SAS]]/[[http://en.wikipedia.org/wiki/Serial_ATA|SATA]]
* <del>[[http://en.wikipedia.org/wiki/Display_port|DisplayPort]]</del>
 
* HDMI % [[http://en.wikipedia.org/wiki/Hdmi|HDMI]]</del>
* SATA %{http://en.wikipedia.org/wiki/Serial_attached_SCSI#Connectors|SAS]]/[[http://en.wikipedia.org/wiki/Serial_ATA|SATA]]
* DisplayPort %[[http://en.wikipedia.org/wiki/Display_port|DisplayPort]]</del>
* SAS/miniSAS
\enditems
 
MiniSAS connector was chosen as the best for use in connection multiple ADC modules. This miniSAS connector is compatible with existing SATA cabling system. Translation between SATA and miniSAS is achieved by SAS to SATA adapter cable. This cable is used in servers to connecting SAS controller to multiple SATA hard disc in RAID systems.
/dokumenty/skolni/diplomka/diplomka.pdf
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/dokumenty/skolni/diplomka/diplomka.ref
6,13 → 6,44
\Xpage{-5}
\Xpage{-6}
\Xpage{1}
\Xchap{1}{Testing construction }{1}
\Xsec{1.1}{Required parameters }{1}
\Xsec{1.2}{System description }{1}
\Xsecc{1.2.1}{Design of ADC modules }{1}
\Xsecc{1.2.2}{ADC modules interface }{1}
\Xsecc{1.2.3}{Output data format }{1}
\Xchap{1}{Introduction }{1}
\Xsec{1.1}{Current radioastronomy problems }{1}
\Xsec{1.2}{Typical Radio astronomy receiver }{1}
\Xsec{1.3}{Requirements }{1}
\Xsecc{1.3.1}{Sensitivity }{1}
\Xsecc{1.3.2}{Dynamic range }{1}
\Xsecc{1.3.3}{Bandwidth }{1}
\Xsec{1.4}{System requirements }{1}
\Xpage{2}
\Xsec{1.3}{Achieved parameters }{2}
\Xsecc{1.3.1}{Data reading and recording }{2}
\Xchap{2}{Testing construction }{2}
\Xsec{2.1}{Required parameters }{2}
\Xsec{2.2}{Sampling frequency }{2}
\Xsec{2.3}{System scalability }{2}
\Xpage{3}
\Xsecc{2.3.1}{Differential signalling }{3}
\Xsecc{2.3.2}{Phase matching }{3}
\Xpage{4}
\Xsec{2.4}{System description }{4}
\Xsecc{2.4.1}{Frequency synthesis }{4}
\Xfnote
\Xsecc{2.4.2}{Signal connectors }{4}
\Xsecc{2.4.3}{Design of ADC modules }{4}
\Xpage{5}
\Xsecc{2.4.4}{ADC modules interface }{5}
\Xpage{6}
\Xsecc{2.4.5}{Output data format }{6}
\Xsec{2.5}{Achieved parameters }{6}
\Xsecc{2.5.1}{Data reading and recording }{6}
\Xpage{7}
\Xsec{2.6}{Future improvements }{7}
\Xpage{8}
\Xchap{3}{Proposed final system }{8}
\Xsec{3.1}{Custom design of FPGA board }{8}
\Xsec{3.2}{Parralella board computer }{8}
\Xsec{3.3}{GPU based computational system }{8}
\Xpage{9}
\Xchap{4}{Conclusion }{9}
\Xpage{11}
\Xchap{A}{Circuit diagram of ADCdual01A module }{11}
\Xpage{12}
\Xchap{B}{Circuit diagram of FMC2DIFF module }{12}
/dokumenty/skolni/diplomka/diplomka.tex
70,8 → 70,8
 
\makefront % Mandatory command. Makes title page, acknowledgment, contents etc.
 
%\input introduction % Files where the source of the document is prepared.
\input introduction % Files where the source of the document is prepared.
\input desctription % Full name is: uvod.tex, popis.tex, the suffix can be omitted.
%\input appendix
\input appendix
 
\bye
/dokumenty/skolni/diplomka/introduction.tex
2,7 → 2,7
 
test
 
\sec Actual radioastronomy problems
\sec Current radioastronomy problems
 
test