MLABlibrarysvnkaklikMLAB_E8magsvn

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  → /programy/avr/AVRcam/AVRcam.lss @ 408

  → /programy/avr/AVRcam/AVRcam.lss @ 409

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• Compare Path:	Rev

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Regard whitespace Rev 408 → Rev 409

/programy/avr/AVRcam/AVRcam.lss
0,0 → 1,2787
AVRcam.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .noinit 00000030 00800300 00800300 00001182 2**0
ALLOC
1 .bss 00000274 00800070 00800070 00001182 2**0
ALLOC
2 .data 00000010 00800060 000010be 00001172 2**0
CONTENTS, ALLOC, LOAD, DATA
3 .text 000010be 00000000 00000000 000000b4 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
4 .eeprom 00000000 00810000 00810000 00001182 2**0
CONTENTS
5 .stab 00003ed0 00000000 00000000 00001184 2**2
CONTENTS, READONLY, DEBUGGING
6 .stabstr 000017c9 00000000 00000000 00005054 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 63 c0 rjmp .+198 ; 0xc8 <__init>
2: 05 c8 rjmp .-4086 ; 0xfffff00e <__eeprom_end+0xff7ef00e>
4: 05 c8 rjmp .-4086 ; 0xfffff010 <__eeprom_end+0xff7ef010>
6: 7a c0 rjmp .+244 ; 0xfc <__bad_interrupt>
8: 79 c0 rjmp .+242 ; 0xfc <__bad_interrupt>
a: 78 c0 rjmp .+240 ; 0xfc <__bad_interrupt>
c: 77 c0 rjmp .+238 ; 0xfc <__bad_interrupt>
e: 76 c0 rjmp .+236 ; 0xfc <__bad_interrupt>
10: 00 c8 rjmp .-4096 ; 0xfffff012 <__eeprom_end+0xff7ef012>
12: 74 c0 rjmp .+232 ; 0xfc <__bad_interrupt>
14: 73 c0 rjmp .+230 ; 0xfc <__bad_interrupt>
16: aa c5 rjmp .+2900 ; 0xb6c <__vector_11>
18: 71 c0 rjmp .+226 ; 0xfc <__bad_interrupt>
1a: 70 c0 rjmp .+224 ; 0xfc <__bad_interrupt>
1c: 6f c0 rjmp .+222 ; 0xfc <__bad_interrupt>
1e: 6e c0 rjmp .+220 ; 0xfc <__bad_interrupt>
20: 6d c0 rjmp .+218 ; 0xfc <__bad_interrupt>
22: 0f c6 rjmp .+3102 ; 0xc42 <__vector_17>
24: 6b c0 rjmp .+214 ; 0xfc <__bad_interrupt>
00000026 <__ctors_end>:
26: 29 c6 rjmp .+3154 ; 0xc7a <__vector_17+0x38>
28: bf c6 rjmp .+3454 ; 0xda8 <__vector_17+0x166>
2a: be c6 rjmp .+3452 ; 0xda8 <__vector_17+0x166>
2c: bd c6 rjmp .+3450 ; 0xda8 <__vector_17+0x166>
2e: bc c6 rjmp .+3448 ; 0xda8 <__vector_17+0x166>
30: bb c6 rjmp .+3446 ; 0xda8 <__vector_17+0x166>
32: ba c6 rjmp .+3444 ; 0xda8 <__vector_17+0x166>
34: b9 c6 rjmp .+3442 ; 0xda8 <__vector_17+0x166>
36: 21 c6 rjmp .+3138 ; 0xc7a <__vector_17+0x38>
38: b7 c6 rjmp .+3438 ; 0xda8 <__vector_17+0x166>
3a: b6 c6 rjmp .+3436 ; 0xda8 <__vector_17+0x166>
3c: b5 c6 rjmp .+3434 ; 0xda8 <__vector_17+0x166>
3e: b4 c6 rjmp .+3432 ; 0xda8 <__vector_17+0x166>
40: b3 c6 rjmp .+3430 ; 0xda8 <__vector_17+0x166>
42: b2 c6 rjmp .+3428 ; 0xda8 <__vector_17+0x166>
44: b1 c6 rjmp .+3426 ; 0xda8 <__vector_17+0x166>
46: 31 c6 rjmp .+3170 ; 0xcaa <__vector_17+0x68>
48: af c6 rjmp .+3422 ; 0xda8 <__vector_17+0x166>
4a: ae c6 rjmp .+3420 ; 0xda8 <__vector_17+0x166>
4c: ad c6 rjmp .+3418 ; 0xda8 <__vector_17+0x166>
4e: ac c6 rjmp .+3416 ; 0xda8 <__vector_17+0x166>
50: ab c6 rjmp .+3414 ; 0xda8 <__vector_17+0x166>
52: aa c6 rjmp .+3412 ; 0xda8 <__vector_17+0x166>
54: a9 c6 rjmp .+3410 ; 0xda8 <__vector_17+0x166>
56: 3a c6 rjmp .+3188 ; 0xccc <__vector_17+0x8a>
58: a7 c6 rjmp .+3406 ; 0xda8 <__vector_17+0x166>
5a: a6 c6 rjmp .+3404 ; 0xda8 <__vector_17+0x166>
5c: a5 c6 rjmp .+3402 ; 0xda8 <__vector_17+0x166>
5e: a4 c6 rjmp .+3400 ; 0xda8 <__vector_17+0x166>
60: a3 c6 rjmp .+3398 ; 0xda8 <__vector_17+0x166>
62: a2 c6 rjmp .+3396 ; 0xda8 <__vector_17+0x166>
64: a1 c6 rjmp .+3394 ; 0xda8 <__vector_17+0x166>
66: 3b c6 rjmp .+3190 ; 0xcde <__vector_17+0x9c>
68: 9f c6 rjmp .+3390 ; 0xda8 <__vector_17+0x166>
6a: 9e c6 rjmp .+3388 ; 0xda8 <__vector_17+0x166>
6c: 9d c6 rjmp .+3386 ; 0xda8 <__vector_17+0x166>
6e: 9c c6 rjmp .+3384 ; 0xda8 <__vector_17+0x166>
70: 9b c6 rjmp .+3382 ; 0xda8 <__vector_17+0x166>
72: 9a c6 rjmp .+3380 ; 0xda8 <__vector_17+0x166>
74: 99 c6 rjmp .+3378 ; 0xda8 <__vector_17+0x166>
76: 54 c6 rjmp .+3240 ; 0xd20 <__vector_17+0xde>
78: 97 c6 rjmp .+3374 ; 0xda8 <__vector_17+0x166>
7a: 96 c6 rjmp .+3372 ; 0xda8 <__vector_17+0x166>
7c: 95 c6 rjmp .+3370 ; 0xda8 <__vector_17+0x166>
7e: 94 c6 rjmp .+3368 ; 0xda8 <__vector_17+0x166>
80: 93 c6 rjmp .+3366 ; 0xda8 <__vector_17+0x166>
82: 92 c6 rjmp .+3364 ; 0xda8 <__vector_17+0x166>
84: 91 c6 rjmp .+3362 ; 0xda8 <__vector_17+0x166>
86: 90 c6 rjmp .+3360 ; 0xda8 <__vector_17+0x166>
88: 8f c6 rjmp .+3358 ; 0xda8 <__vector_17+0x166>
8a: 8e c6 rjmp .+3356 ; 0xda8 <__vector_17+0x166>
8c: 8d c6 rjmp .+3354 ; 0xda8 <__vector_17+0x166>
8e: 8c c6 rjmp .+3352 ; 0xda8 <__vector_17+0x166>
90: 8b c6 rjmp .+3350 ; 0xda8 <__vector_17+0x166>
92: 8a c6 rjmp .+3348 ; 0xda8 <__vector_17+0x166>
94: 89 c6 rjmp .+3346 ; 0xda8 <__vector_17+0x166>
96: 4d c6 rjmp .+3226 ; 0xd32 <__vector_17+0xf0>
98: 87 c6 rjmp .+3342 ; 0xda8 <__vector_17+0x166>
9a: 86 c6 rjmp .+3340 ; 0xda8 <__vector_17+0x166>
9c: 85 c6 rjmp .+3338 ; 0xda8 <__vector_17+0x166>
9e: 84 c6 rjmp .+3336 ; 0xda8 <__vector_17+0x166>
a0: 83 c6 rjmp .+3334 ; 0xda8 <__vector_17+0x166>
a2: 82 c6 rjmp .+3332 ; 0xda8 <__vector_17+0x166>
a4: 81 c6 rjmp .+3330 ; 0xda8 <__vector_17+0x166>
a6: 12 c6 rjmp .+3108 ; 0xccc <__vector_17+0x8a>
a8: 7f c6 rjmp .+3326 ; 0xda8 <__vector_17+0x166>
aa: 7e c6 rjmp .+3324 ; 0xda8 <__vector_17+0x166>
ac: 7d c6 rjmp .+3322 ; 0xda8 <__vector_17+0x166>
ae: 7c c6 rjmp .+3320 ; 0xda8 <__vector_17+0x166>
b0: 7b c6 rjmp .+3318 ; 0xda8 <__vector_17+0x166>
b2: 7a c6 rjmp .+3316 ; 0xda8 <__vector_17+0x166>
b4: 79 c6 rjmp .+3314 ; 0xda8 <__vector_17+0x166>
b6: 4e c6 rjmp .+3228 ; 0xd54 <__vector_17+0x112>
b8: 77 c6 rjmp .+3310 ; 0xda8 <__vector_17+0x166>
ba: 76 c6 rjmp .+3308 ; 0xda8 <__vector_17+0x166>
bc: 75 c6 rjmp .+3306 ; 0xda8 <__vector_17+0x166>
be: 74 c6 rjmp .+3304 ; 0xda8 <__vector_17+0x166>
c0: 73 c6 rjmp .+3302 ; 0xda8 <__vector_17+0x166>
c2: 72 c6 rjmp .+3300 ; 0xda8 <__vector_17+0x166>
c4: 71 c6 rjmp .+3298 ; 0xda8 <__vector_17+0x166>
c6: 62 c6 rjmp .+3268 ; 0xd8c <__vector_17+0x14a>
000000c8 <__init>:
c8: 11 24 eor r1, r1
ca: 1f be out 0x3f, r1 ; 63
cc: cf e5 ldi r28, 0x5F ; 95
ce: d4 e0 ldi r29, 0x04 ; 4
d0: de bf out 0x3e, r29 ; 62
d2: cd bf out 0x3d, r28 ; 61
000000d4 <__do_copy_data>:
d4: 10 e0 ldi r17, 0x00 ; 0
d6: a0 e6 ldi r26, 0x60 ; 96
d8: b0 e0 ldi r27, 0x00 ; 0
da: ee eb ldi r30, 0xBE ; 190
dc: f0 e1 ldi r31, 0x10 ; 16
de: 02 c0 rjmp .+4 ; 0xe4 <.do_copy_data_start>
000000e0 <.do_copy_data_loop>:
e0: 05 90 lpm r0, Z+
e2: 0d 92 st X+, r0
000000e4 <.do_copy_data_start>:
e4: a0 37 cpi r26, 0x70 ; 112
e6: b1 07 cpc r27, r17
e8: d9 f7 brne .-10 ; 0xe0 <.do_copy_data_loop>
000000ea <__do_clear_bss>:
ea: 12 e0 ldi r17, 0x02 ; 2
ec: a0 e7 ldi r26, 0x70 ; 112
ee: b0 e0 ldi r27, 0x00 ; 0
f0: 01 c0 rjmp .+2 ; 0xf4 <.do_clear_bss_start>
000000f2 <.do_clear_bss_loop>:
f2: 1d 92 st X+, r1
000000f4 <.do_clear_bss_start>:
f4: a4 3e cpi r26, 0xE4 ; 228
f6: b1 07 cpc r27, r17
f8: e1 f7 brne .-8 ; 0xf2 <.do_clear_bss_loop>
fa: 30 c0 rjmp .+96 ; 0x15c <main>
000000fc <__bad_interrupt>:
fc: 91 c7 rjmp .+3874 ; 0x1020 <__vector_default>
000000fe <CamInt_resetCam>:
output the clock signal. Thus, if we reset the cam, the
AVR has no clock, and thus doesn't run...
***********************************************************/
void CamInt_resetCam(void)
{
fe: 08 95 ret
00000100 <CamInt_init>:
100: 8f 9a sbi 0x11, 7 ; 17
102: 8f 9a sbi 0x11, 7 ; 17
104: 8a 98 cbi 0x11, 2 ; 17
106: 97 98 cbi 0x12, 7 ; 18
108: 87 b3 in r24, 0x17 ; 23
10a: 80 7f andi r24, 0xF0 ; 240
10c: 87 bb out 0x17, r24 ; 23
10e: 87 b3 in r24, 0x17 ; 23
110: 80 6f ori r24, 0xF0 ; 240
112: 87 bb out 0x17, r24 ; 23
114: 84 b3 in r24, 0x14 ; 20
116: 80 7f andi r24, 0xF0 ; 240
118: 84 bb out 0x14, r24 ; 20
11a: 8e b5 in r24, 0x2e ; 46
11c: 88 7f andi r24, 0xF8 ; 248
11e: 8e bd out 0x2e, r24 ; 46
120: 85 b7 in r24, 0x35 ; 53
122: 8c 60 ori r24, 0x0C ; 12
124: 85 bf out 0x35, r24 ; 53
126: 85 b7 in r24, 0x35 ; 53
128: 83 60 ori r24, 0x03 ; 3
12a: 85 bf out 0x35, r24 ; 53
12c: 8b b7 in r24, 0x3b ; 59
12e: 80 64 ori r24, 0x40 ; 64
130: 8b bf out 0x3b, r24 ; 59
132: 86 e0 ldi r24, 0x06 ; 6
134: 83 bf out 0x33, r24 ; 51
136: 85 b7 in r24, 0x35 ; 53
138: 8f 78 andi r24, 0x8F ; 143
13a: 85 bf out 0x35, r24 ; 53
13c: 85 b7 in r24, 0x35 ; 53
13e: 80 68 ori r24, 0x80 ; 128
140: 85 bf out 0x35, r24 ; 53
142: e0 e0 ldi r30, 0x00 ; 0
144: f3 e0 ldi r31, 0x03 ; 3
146: 80 e3 ldi r24, 0x30 ; 48
148: df 01 movw r26, r30
14a: 98 2f mov r25, r24
14c: 1d 92 st X+, r1
14e: 9a 95 dec r25
150: e9 f7 brne .-6 ; 0x14c <CamInt_init+0x4c>
/* Needed in order to truncate to 8 bit. */
uint8_t len;
len = (uint8_t) n;
asm volatile (
152: a1 e0 ldi r26, 0x01 ; 1
154: b0 e0 ldi r27, 0x00 ; 0
156: 18 2e mov r1, r24
158: a0 d7 rcall .+3904 ; 0x109a <__eeprom_read_block_1C1D1E>
15a: 08 95 ret
0000015c <main>:
Inputs: none
Outputs: int
***********************************************************/
int main(void)
{
15c: cf e5 ldi r28, 0x5F ; 95
15e: d4 e0 ldi r29, 0x04 ; 4
160: de bf out 0x3e, r29 ; 62
162: cd bf out 0x3d, r28 ; 61
/* initialize all of the interface modules */
DebugInt_init();
164: cf d6 rcall .+3486 ; 0xf04 <DebugInt_init>
UartInt_init();
166: f4 d4 rcall .+2536 ; 0xb50 <UartInt_init>
I2CInt_init();
168: 2b d5 rcall .+2646 ; 0xbc0 <I2CInt_init>
CamInt_init();
16a: ca df rcall .-108 ; 0x100 <CamInt_init>
/* initialize the remaining modules that will process
data...interrupts need to be on for these */
ENABLE_INTS();
16c: 78 94 sei
CamConfig_init();
16e: 7e d6 rcall .+3324 ; 0xe6c <CamConfig_init>
UIMgr_init();
170: 8a d3 rcall .+1812 ; 0x886 <UIMgr_init>
FrameMgr_init();
172: 37 d2 rcall .+1134 ; 0x5e2 <FrameMgr_init>
/* provide a short delay for the camera to stabilize before
we let the executive start up */
Utility_delay(1000);
174: 88 ee ldi r24, 0xE8 ; 232
176: 93 e0 ldi r25, 0x03 ; 3
178: 8a d6 rcall .+3348 ; 0xe8e <Utility_delay>
/* the rest of the application will be under the
control of the Executive. */
Exec_run();
17a: 11 d0 rcall .+34 ; 0x19e <Exec_run>
/* this should never be reached */
return(0);
}
17c: 80 e0 ldi r24, 0x00 ; 0
17e: 90 e0 ldi r25, 0x00 ; 0
180: 9d c7 rjmp .+3898 ; 0x10bc <_exit>
00000182 <Exec_writeEventFifo>:
182: f8 94 cli
184: 90 91 70 00 lds r25, 0x0070
188: ec e6 ldi r30, 0x6C ; 108
18a: f2 e0 ldi r31, 0x02 ; 2
18c: e9 0f add r30, r25
18e: f1 1d adc r31, r1
190: 80 83 st Z, r24
192: 9f 5f subi r25, 0xFF ; 255
194: 97 70 andi r25, 0x07 ; 7
196: 90 93 70 00 sts 0x0070, r25
19a: 78 94 sei
19c: 08 95 ret
0000019e <Exec_run>:
19e: 80 91 72 00 lds r24, 0x0072
1a2: 88 23 and r24, r24
1a4: 99 f0 breq .+38 ; 0x1cc <Exec_run+0x2e>
1a6: 80 ff sbrs r24, 0
1a8: 07 c0 rjmp .+14 ; 0x1b8 <Exec_run+0x1a>
1aa: f8 94 cli
1ac: 8e 7f andi r24, 0xFE ; 254
1ae: 80 93 72 00 sts 0x0072, r24
1b2: 78 94 sei
1b4: b6 d0 rcall .+364 ; 0x322 <FrameMgr_processLine>
1b6: ff d2 rcall .+1534 ; 0x7b6 <UIMgr_transmitPendingData>
1b8: 80 91 72 00 lds r24, 0x0072
1bc: 81 ff sbrs r24, 1
1be: 06 c0 rjmp .+12 ; 0x1cc <Exec_run+0x2e>
1c0: f8 94 cli
1c2: 8d 7f andi r24, 0xFD ; 253
1c4: 80 93 72 00 sts 0x0072, r24
1c8: 78 94 sei
1ca: 12 d2 rcall .+1060 ; 0x5f0 <FrameMgr_acquireLine>
1cc: 20 91 71 00 lds r18, 0x0071
1d0: 80 91 70 00 lds r24, 0x0070
1d4: 82 17 cp r24, r18
1d6: 19 f3 breq .-58 ; 0x19e <Exec_run>
1d8: f8 94 cli
1da: e2 2f mov r30, r18
1dc: ff 27 eor r31, r31
1de: e4 59 subi r30, 0x94 ; 148
1e0: fd 4f sbci r31, 0xFD ; 253
1e2: 90 81 ld r25, Z
1e4: 82 2f mov r24, r18
1e6: 8f 5f subi r24, 0xFF ; 255
1e8: 87 70 andi r24, 0x07 ; 7
1ea: 80 93 71 00 sts 0x0071, r24
1ee: 78 94 sei
1f0: 89 2f mov r24, r25
1f2: 99 27 eor r25, r25
1f4: 80 31 cpi r24, 0x10 ; 16
1f6: 31 f1 breq .+76 ; 0x244 <Exec_run+0xa6>
1f8: 81 31 cpi r24, 0x11 ; 17
1fa: 68 f4 brcc .+26 ; 0x216 <Exec_run+0x78>
1fc: 82 30 cpi r24, 0x02 ; 2
1fe: c9 f0 breq .+50 ; 0x232 <Exec_run+0x94>
200: 83 30 cpi r24, 0x03 ; 3
202: 18 f4 brcc .+6 ; 0x20a <Exec_run+0x6c>
204: 81 30 cpi r24, 0x01 ; 1
206: 59 f6 brne .-106 ; 0x19e <Exec_run>
208: 2b c0 rjmp .+86 ; 0x260 <Exec_run+0xc2>
20a: 84 30 cpi r24, 0x04 ; 4
20c: 31 f1 breq .+76 ; 0x25a <Exec_run+0xbc>
20e: 88 30 cpi r24, 0x08 ; 8
210: 09 f0 breq .+2 ; 0x214 <Exec_run+0x76>
212: c5 cf rjmp .-118 ; 0x19e <Exec_run>
214: 1f c0 rjmp .+62 ; 0x254 <Exec_run+0xb6>
216: 80 38 cpi r24, 0x80 ; 128
218: 79 f0 breq .+30 ; 0x238 <Exec_run+0x9a>
21a: 81 38 cpi r24, 0x81 ; 129
21c: 20 f4 brcc .+8 ; 0x226 <Exec_run+0x88>
21e: 80 32 cpi r24, 0x20 ; 32
220: 09 f0 breq .+2 ; 0x224 <Exec_run+0x86>
222: bd cf rjmp .-134 ; 0x19e <Exec_run>
224: 14 c0 rjmp .+40 ; 0x24e <Exec_run+0xb0>
226: 81 38 cpi r24, 0x81 ; 129
228: 51 f0 breq .+20 ; 0x23e <Exec_run+0xa0>
22a: 80 39 cpi r24, 0x90 ; 144
22c: 09 f0 breq .+2 ; 0x230 <Exec_run+0x92>
22e: b7 cf rjmp .-146 ; 0x19e <Exec_run>
230: 1c c0 rjmp .+56 ; 0x26a <Exec_run+0xcc>
232: 82 e0 ldi r24, 0x02 ; 2
234: 2e d2 rcall .+1116 ; 0x692 <FrameMgr_dispatchEvent>
236: b3 cf rjmp .-154 ; 0x19e <Exec_run>
238: 80 e8 ldi r24, 0x80 ; 128
23a: 2b d2 rcall .+1110 ; 0x692 <FrameMgr_dispatchEvent>
23c: b0 cf rjmp .-160 ; 0x19e <Exec_run>
23e: 81 e8 ldi r24, 0x81 ; 129
240: 28 d2 rcall .+1104 ; 0x692 <FrameMgr_dispatchEvent>
242: ad cf rjmp .-166 ; 0x19e <Exec_run>
244: 80 e1 ldi r24, 0x10 ; 16
246: 25 d2 rcall .+1098 ; 0x692 <FrameMgr_dispatchEvent>
248: 80 e1 ldi r24, 0x10 ; 16
24a: 75 d4 rcall .+2282 ; 0xb36 <UIMgr_dispatchEvent>
24c: a8 cf rjmp .-176 ; 0x19e <Exec_run>
24e: 80 e2 ldi r24, 0x20 ; 32
250: 20 d2 rcall .+1088 ; 0x692 <FrameMgr_dispatchEvent>
252: a5 cf rjmp .-182 ; 0x19e <Exec_run>
254: 88 e0 ldi r24, 0x08 ; 8
256: 1d d2 rcall .+1082 ; 0x692 <FrameMgr_dispatchEvent>
258: a2 cf rjmp .-188 ; 0x19e <Exec_run>
25a: 84 e0 ldi r24, 0x04 ; 4
25c: 1a d2 rcall .+1076 ; 0x692 <FrameMgr_dispatchEvent>
25e: 9f cf rjmp .-194 ; 0x19e <Exec_run>
260: 81 e0 ldi r24, 0x01 ; 1
262: 69 d4 rcall .+2258 ; 0xb36 <UIMgr_dispatchEvent>
264: 81 e0 ldi r24, 0x01 ; 1
266: 15 d2 rcall .+1066 ; 0x692 <FrameMgr_dispatchEvent>
268: 9a cf rjmp .-204 ; 0x19e <Exec_run>
26a: 80 e9 ldi r24, 0x90 ; 144
26c: 64 d4 rcall .+2248 ; 0xb36 <UIMgr_dispatchEvent>
26e: 97 cf rjmp .-210 ; 0x19e <Exec_run>
00000270 <FrameMgr_processFrame>:
270: df 92 push r13
272: ef 92 push r14
274: ff 92 push r15
276: 0f 93 push r16
278: 1f 93 push r17
27a: cf 93 push r28
27c: df 93 push r29
27e: 20 91 60 00 lds r18, 0x0060
282: 30 91 61 00 lds r19, 0x0061
286: 80 91 73 00 lds r24, 0x0073
28a: 88 23 and r24, r24
28c: 09 f4 brne .+2 ; 0x290 <FrameMgr_processFrame+0x20>
28e: 3f c0 rjmp .+126 ; 0x30e <FrameMgr_processFrame+0x9e>
290: e9 01 movw r28, r18
292: 8a e0 ldi r24, 0x0A ; 10
294: 5c d2 rcall .+1208 ; 0x74e <UIMgr_writeTxFifo>
296: 80 91 73 00 lds r24, 0x0073
29a: 59 d2 rcall .+1202 ; 0x74e <UIMgr_writeTxFifo>
29c: dd 24 eor r13, r13
29e: 8f 81 ldd r24, Y+7 ; 0x07
2a0: 81 30 cpi r24, 0x01 ; 1
2a2: 69 f5 brne .+90 ; 0x2fe <FrameMgr_processFrame+0x8e>
2a4: 88 81 ld r24, Y
2a6: 80 38 cpi r24, 0x80 ; 128
2a8: e1 f0 breq .+56 ; 0x2e2 <FrameMgr_processFrame+0x72>
2aa: 80 34 cpi r24, 0x40 ; 64
2ac: 11 f4 brne .+4 ; 0x2b2 <FrameMgr_processFrame+0x42>
2ae: 81 e0 ldi r24, 0x01 ; 1
2b0: 19 c0 rjmp .+50 ; 0x2e4 <FrameMgr_processFrame+0x74>
2b2: 80 32 cpi r24, 0x20 ; 32
2b4: 11 f4 brne .+4 ; 0x2ba <FrameMgr_processFrame+0x4a>
2b6: 82 e0 ldi r24, 0x02 ; 2
2b8: 15 c0 rjmp .+42 ; 0x2e4 <FrameMgr_processFrame+0x74>
2ba: 80 31 cpi r24, 0x10 ; 16
2bc: 11 f4 brne .+4 ; 0x2c2 <FrameMgr_processFrame+0x52>
2be: 83 e0 ldi r24, 0x03 ; 3
2c0: 11 c0 rjmp .+34 ; 0x2e4 <FrameMgr_processFrame+0x74>
2c2: 88 30 cpi r24, 0x08 ; 8
2c4: 11 f4 brne .+4 ; 0x2ca <FrameMgr_processFrame+0x5a>
2c6: 84 e0 ldi r24, 0x04 ; 4
2c8: 0d c0 rjmp .+26 ; 0x2e4 <FrameMgr_processFrame+0x74>
2ca: 84 30 cpi r24, 0x04 ; 4
2cc: 11 f4 brne .+4 ; 0x2d2 <FrameMgr_processFrame+0x62>
2ce: 85 e0 ldi r24, 0x05 ; 5
2d0: 09 c0 rjmp .+18 ; 0x2e4 <FrameMgr_processFrame+0x74>
2d2: 82 30 cpi r24, 0x02 ; 2
2d4: 11 f4 brne .+4 ; 0x2da <FrameMgr_processFrame+0x6a>
2d6: 86 e0 ldi r24, 0x06 ; 6
2d8: 05 c0 rjmp .+10 ; 0x2e4 <FrameMgr_processFrame+0x74>
2da: 81 30 cpi r24, 0x01 ; 1
2dc: 11 f4 brne .+4 ; 0x2e2 <FrameMgr_processFrame+0x72>
2de: 87 e0 ldi r24, 0x07 ; 7
2e0: 01 c0 rjmp .+2 ; 0x2e4 <FrameMgr_processFrame+0x74>
2e2: 80 e0 ldi r24, 0x00 ; 0
2e4: 1b 81 ldd r17, Y+3 ; 0x03
2e6: 0c 81 ldd r16, Y+4 ; 0x04
2e8: fd 80 ldd r15, Y+5 ; 0x05
2ea: ee 80 ldd r14, Y+6 ; 0x06
2ec: 30 d2 rcall .+1120 ; 0x74e <UIMgr_writeTxFifo>
2ee: 81 2f mov r24, r17
2f0: 2e d2 rcall .+1116 ; 0x74e <UIMgr_writeTxFifo>
2f2: 80 2f mov r24, r16
2f4: 2c d2 rcall .+1112 ; 0x74e <UIMgr_writeTxFifo>
2f6: 8f 2d mov r24, r15
2f8: 2a d2 rcall .+1108 ; 0x74e <UIMgr_writeTxFifo>
2fa: 8e 2d mov r24, r14
2fc: 28 d2 rcall .+1104 ; 0x74e <UIMgr_writeTxFifo>
2fe: d3 94 inc r13
300: 88 e0 ldi r24, 0x08 ; 8
302: d8 16 cp r13, r24
304: 11 f0 breq .+4 ; 0x30a <FrameMgr_processFrame+0x9a>
306: 28 96 adiw r28, 0x08 ; 8
308: ca cf rjmp .-108 ; 0x29e <FrameMgr_processFrame+0x2e>
30a: 8f ef ldi r24, 0xFF ; 255
30c: 20 d2 rcall .+1088 ; 0x74e <UIMgr_writeTxFifo>
30e: 84 e0 ldi r24, 0x04 ; 4
310: 38 df rcall .-400 ; 0x182 <Exec_writeEventFifo>
312: df 91 pop r29
314: cf 91 pop r28
316: 1f 91 pop r17
318: 0f 91 pop r16
31a: ff 90 pop r15
31c: ef 90 pop r14
31e: df 90 pop r13
320: 08 95 ret
00000322 <FrameMgr_processLine>:
322: 2f 92 push r2
324: 3f 92 push r3
326: 4f 92 push r4
328: 5f 92 push r5
32a: 6f 92 push r6
32c: 7f 92 push r7
32e: 8f 92 push r8
330: 9f 92 push r9
332: af 92 push r10
334: bf 92 push r11
336: cf 92 push r12
338: df 92 push r13
33a: ef 92 push r14
33c: ff 92 push r15
33e: 0f 93 push r16
340: 1f 93 push r17
342: cf 93 push r28
344: df 93 push r29
346: cd b7 in r28, 0x3d ; 61
348: de b7 in r29, 0x3e ; 62
34a: 21 97 sbiw r28, 0x01 ; 1
34c: 0f b6 in r0, 0x3f ; 63
34e: f8 94 cli
350: de bf out 0x3e, r29 ; 62
352: 0f be out 0x3f, r0 ; 63
354: cd bf out 0x3d, r28 ; 61
356: 00 91 60 00 lds r16, 0x0060
35a: 10 91 61 00 lds r17, 0x0061
35e: 80 91 74 00 lds r24, 0x0074
362: 82 30 cpi r24, 0x02 ; 2
364: 09 f0 breq .+2 ; 0x368 <FrameMgr_processLine+0x46>
366: 6a c0 rjmp .+212 ; 0x43c <FrameMgr_processLine+0x11a>
368: 8b e0 ldi r24, 0x0B ; 11
36a: fc d3 rcall .+2040 ; 0xb64 <UartInt_txByte>
36c: 80 91 75 00 lds r24, 0x0075
370: f9 d3 rcall .+2034 ; 0xb64 <UartInt_txByte>
372: 0f 2e mov r0, r31
374: fc eb ldi r31, 0xBC ; 188
376: cf 2e mov r12, r31
378: f1 e0 ldi r31, 0x01 ; 1
37a: df 2e mov r13, r31
37c: f0 2d mov r31, r0
37e: 00 e0 ldi r16, 0x00 ; 0
380: 10 e0 ldi r17, 0x00 ; 0
382: 0f 2e mov r0, r31
384: fc e0 ldi r31, 0x0C ; 12
386: ef 2e mov r14, r31
388: f1 e0 ldi r31, 0x01 ; 1
38a: ff 2e mov r15, r31
38c: f0 2d mov r31, r0
38e: f6 01 movw r30, r12
390: 80 81 ld r24, Z
392: 89 83 std Y+1, r24 ; 0x01
394: 89 81 ldd r24, Y+1 ; 0x01
396: 8f 70 andi r24, 0x0F ; 15
398: 89 83 std Y+1, r24 ; 0x01
39a: 89 81 ldd r24, Y+1 ; 0x01
39c: 82 95 swap r24
39e: 80 7f andi r24, 0xF0 ; 240
3a0: 89 83 std Y+1, r24 ; 0x01
3a2: 99 81 ldd r25, Y+1 ; 0x01
3a4: f7 01 movw r30, r14
3a6: 80 81 ld r24, Z
3a8: 8f 70 andi r24, 0x0F ; 15
3aa: 89 2b or r24, r25
3ac: 89 83 std Y+1, r24 ; 0x01
3ae: 89 81 ldd r24, Y+1 ; 0x01
3b0: d9 d3 rcall .+1970 ; 0xb64 <UartInt_txByte>
3b2: d8 01 movw r26, r16
3b4: 11 96 adiw r26, 0x01 ; 1
3b6: fd 01 movw r30, r26
3b8: e4 5f subi r30, 0xF4 ; 244
3ba: fe 4f sbci r31, 0xFE ; 254
3bc: 80 81 ld r24, Z
3be: 89 83 std Y+1, r24 ; 0x01
3c0: 89 81 ldd r24, Y+1 ; 0x01
3c2: 8f 70 andi r24, 0x0F ; 15
3c4: 89 83 std Y+1, r24 ; 0x01
3c6: 89 81 ldd r24, Y+1 ; 0x01
3c8: 82 95 swap r24
3ca: 80 7f andi r24, 0xF0 ; 240
3cc: 89 83 std Y+1, r24 ; 0x01
3ce: 99 81 ldd r25, Y+1 ; 0x01
3d0: a4 54 subi r26, 0x44 ; 68
3d2: be 4f sbci r27, 0xFE ; 254
3d4: 8c 91 ld r24, X
3d6: 8f 70 andi r24, 0x0F ; 15
3d8: 89 2b or r24, r25
3da: 89 83 std Y+1, r24 ; 0x01
3dc: 89 81 ldd r24, Y+1 ; 0x01
3de: c2 d3 rcall .+1924 ; 0xb64 <UartInt_txByte>
3e0: 82 e0 ldi r24, 0x02 ; 2
3e2: 90 e0 ldi r25, 0x00 ; 0
3e4: c8 0e add r12, r24
3e6: d9 1e adc r13, r25
3e8: 0e 5f subi r16, 0xFE ; 254
3ea: 1f 4f sbci r17, 0xFF ; 255
3ec: e8 0e add r14, r24
3ee: f9 1e adc r15, r25
3f0: 00 3b cpi r16, 0xB0 ; 176
3f2: 11 05 cpc r17, r1
3f4: 61 f6 brne .-104 ; 0x38e <FrameMgr_processLine+0x6c>
3f6: 8f e0 ldi r24, 0x0F ; 15
3f8: b5 d3 rcall .+1898 ; 0xb64 <UartInt_txByte>
3fa: 80 91 75 00 lds r24, 0x0075
3fe: 8f 5f subi r24, 0xFF ; 255
400: 80 93 75 00 sts 0x0075, r24
404: 88 34 cpi r24, 0x48 ; 72
406: 60 f0 brcs .+24 ; 0x420 <FrameMgr_processLine+0xfe>
408: 10 92 75 00 sts 0x0075, r1
40c: 10 92 74 00 sts 0x0074, r1
410: 89 b7 in r24, 0x39 ; 57
412: 8b 7f andi r24, 0xFB ; 251
414: 89 bf out 0x39, r24 ; 57
416: 60 e0 ldi r22, 0x00 ; 0
418: 81 e1 ldi r24, 0x11 ; 17
41a: e9 d4 rcall .+2514 ; 0xdee <CamConfig_setCamReg>
41c: ed d4 rcall .+2522 ; 0xdf8 <CamConfig_sendFifoCmds>
41e: c8 c0 rjmp .+400 ; 0x5b0 <__stack+0x151>
420: 80 91 72 00 lds r24, 0x0072
424: 82 60 ori r24, 0x02 ; 2
426: 80 93 72 00 sts 0x0072, r24
42a: c2 c0 rjmp .+388 ; 0x5b0 <__stack+0x151>
42c: 80 e2 ldi r24, 0x20 ; 32
42e: a9 de rcall .-686 ; 0x182 <Exec_writeEventFifo>
430: 89 b7 in r24, 0x39 ; 57
432: 8b 7f andi r24, 0xFB ; 251
434: 89 bf out 0x39, r24 ; 57
436: 10 92 76 00 sts 0x0076, r1
43a: ba c0 rjmp .+372 ; 0x5b0 <__stack+0x151>
43c: 81 30 cpi r24, 0x01 ; 1
43e: 09 f0 breq .+2 ; 0x442 <FrameMgr_processLine+0x120>
440: b7 c0 rjmp .+366 ; 0x5b0 <__stack+0x151>
442: f0 90 76 00 lds r15, 0x0076
446: cf 2c mov r12, r15
448: dd 24 eor r13, r13
44a: 36 01 movw r6, r12
44c: 08 94 sec
44e: 61 08 sbc r6, r1
450: 71 08 sbc r7, r1
452: 70 91 73 00 lds r23, 0x0073
456: 0f 2e mov r0, r31
458: fc eb ldi r31, 0xBC ; 188
45a: 2f 2e mov r2, r31
45c: f1 e0 ldi r31, 0x01 ; 1
45e: 3f 2e mov r3, r31
460: f0 2d mov r31, r0
462: 50 e0 ldi r21, 0x00 ; 0
464: 40 e0 ldi r20, 0x00 ; 0
466: 61 e0 ldi r22, 0x01 ; 1
468: ef 2c mov r14, r15
46a: e3 94 inc r14
46c: f1 01 movw r30, r2
46e: 30 81 ld r19, Z
470: 56 0f add r21, r22
472: 61 81 ldd r22, Z+1 ; 0x01
474: 82 e0 ldi r24, 0x02 ; 2
476: 90 e0 ldi r25, 0x00 ; 0
478: 28 0e add r2, r24
47a: 39 1e adc r3, r25
47c: 46 0f add r20, r22
47e: 33 23 and r19, r19
480: 09 f4 brne .+2 ; 0x484 <__stack+0x25>
482: 5c c0 rjmp .+184 ; 0x53c <__stack+0xdd>
484: 64 30 cpi r22, 0x04 ; 4
486: 08 f4 brcc .+2 ; 0x48a <__stack+0x2b>
488: 59 c0 rjmp .+178 ; 0x53c <__stack+0xdd>
48a: d8 01 movw r26, r16
48c: 20 e0 ldi r18, 0x00 ; 0
48e: 8c 91 ld r24, X
490: 38 17 cp r19, r24
492: c9 f5 brne .+114 ; 0x506 <__stack+0xa7>
494: fd 01 movw r30, r26
496: 87 81 ldd r24, Z+7 ; 0x07
498: 81 30 cpi r24, 0x01 ; 1
49a: a9 f5 brne .+106 ; 0x506 <__stack+0xa7>
49c: 0f 2e mov r0, r31
49e: f6 e0 ldi r31, 0x06 ; 6
4a0: af 2e mov r10, r31
4a2: bb 24 eor r11, r11
4a4: f0 2d mov r31, r0
4a6: aa 0e add r10, r26
4a8: bb 1e adc r11, r27
4aa: 86 81 ldd r24, Z+6 ; 0x06
4ac: 99 27 eor r25, r25
4ae: 86 15 cp r24, r6
4b0: 97 05 cpc r25, r7
4b2: 49 f5 brne .+82 ; 0x506 <__stack+0xa7>
4b4: 2d 01 movw r4, r26
4b6: 08 94 sec
4b8: 41 1c adc r4, r1
4ba: 51 1c adc r5, r1
4bc: 81 81 ldd r24, Z+1 ; 0x01
4be: 88 24 eor r8, r8
4c0: 99 24 eor r9, r9
4c2: 68 94 set
4c4: 81 f8 bld r8, 1
4c6: 8a 0e add r8, r26
4c8: 9b 1e adc r9, r27
4ca: 92 81 ldd r25, Z+2 ; 0x02
4cc: 58 17 cp r21, r24
4ce: 10 f0 brcs .+4 ; 0x4d4 <__stack+0x75>
4d0: 95 17 cp r25, r21
4d2: 40 f4 brcc .+16 ; 0x4e4 <__stack+0x85>
4d4: 48 17 cp r20, r24
4d6: 10 f0 brcs .+4 ; 0x4dc <__stack+0x7d>
4d8: 94 17 cp r25, r20
4da: 20 f4 brcc .+8 ; 0x4e4 <__stack+0x85>
4dc: 85 17 cp r24, r21
4de: 98 f0 brcs .+38 ; 0x506 <__stack+0xa7>
4e0: 49 17 cp r20, r25
4e2: 88 f0 brcs .+34 ; 0x506 <__stack+0xa7>
4e4: f2 01 movw r30, r4
4e6: 50 83 st Z, r21
4e8: f4 01 movw r30, r8
4ea: 40 83 st Z, r20
4ec: fd 01 movw r30, r26
4ee: 83 81 ldd r24, Z+3 ; 0x03
4f0: 58 17 cp r21, r24
4f2: 08 f4 brcc .+2 ; 0x4f6 <__stack+0x97>
4f4: 53 83 std Z+3, r21 ; 0x03
4f6: fd 01 movw r30, r26
4f8: 85 81 ldd r24, Z+5 ; 0x05
4fa: 84 17 cp r24, r20
4fc: 08 f4 brcc .+2 ; 0x500 <__stack+0xa1>
4fe: 45 83 std Z+5, r20 ; 0x05
500: f5 01 movw r30, r10
502: f0 82 st Z, r15
504: 1b c0 rjmp .+54 ; 0x53c <__stack+0xdd>
506: 2f 5f subi r18, 0xFF ; 255
508: 28 30 cpi r18, 0x08 ; 8
50a: 09 f4 brne .+2 ; 0x50e <__stack+0xaf>
50c: 4d c0 rjmp .+154 ; 0x5a8 <__stack+0x149>
50e: 18 96 adiw r26, 0x08 ; 8
510: be cf rjmp .-132 ; 0x48e <__stack+0x2f>
512: d8 01 movw r26, r16
514: 90 e0 ldi r25, 0x00 ; 0
516: fd 01 movw r30, r26
518: 87 81 ldd r24, Z+7 ; 0x07
51a: 88 23 and r24, r24
51c: 21 f0 breq .+8 ; 0x526 <__stack+0xc7>
51e: 18 96 adiw r26, 0x08 ; 8
520: 9f 5f subi r25, 0xFF ; 255
522: 98 30 cpi r25, 0x08 ; 8
524: c1 f7 brne .-16 ; 0x516 <__stack+0xb7>
526: 3c 93 st X, r19
528: fd 01 movw r30, r26
52a: 51 83 std Z+1, r21 ; 0x01
52c: 42 83 std Z+2, r20 ; 0x02
52e: 53 83 std Z+3, r21 ; 0x03
530: f4 82 std Z+4, r15 ; 0x04
532: 45 83 std Z+5, r20 ; 0x05
534: f6 82 std Z+6, r15 ; 0x06
536: 81 e0 ldi r24, 0x01 ; 1
538: 87 83 std Z+7, r24 ; 0x07
53a: 7f 5f subi r23, 0xFF ; 255
53c: 40 3b cpi r20, 0xB0 ; 176
53e: 08 f4 brcc .+2 ; 0x542 <__stack+0xe3>
540: 95 cf rjmp .-214 ; 0x46c <__stack+0xd>
542: 70 93 73 00 sts 0x0073, r23
546: c6 01 movw r24, r12
548: 87 70 andi r24, 0x07 ; 7
54a: 90 70 andi r25, 0x00 ; 0
54c: 07 97 sbiw r24, 0x07 ; 7
54e: 01 f5 brne .+64 ; 0x590 <__stack+0x131>
550: d8 01 movw r26, r16
552: 17 96 adiw r26, 0x07 ; 7
554: 40 e0 ldi r20, 0x00 ; 0
556: 8c 91 ld r24, X
558: 81 30 cpi r24, 0x01 ; 1
55a: a1 f4 brne .+40 ; 0x584 <__stack+0x125>
55c: fd 01 movw r30, r26
55e: 31 97 sbiw r30, 0x01 ; 1
560: 90 81 ld r25, Z
562: fd 01 movw r30, r26
564: 33 97 sbiw r30, 0x03 ; 3
566: 80 81 ld r24, Z
568: 29 2f mov r18, r25
56a: 33 27 eor r19, r19
56c: f9 01 movw r30, r18
56e: e8 1b sub r30, r24
570: f1 09 sbc r31, r1
572: 33 97 sbiw r30, 0x03 ; 3
574: 3c f4 brge .+14 ; 0x584 <__stack+0x125>
576: c6 01 movw r24, r12
578: 82 1b sub r24, r18
57a: 93 0b sbc r25, r19
57c: 03 97 sbiw r24, 0x03 ; 3
57e: 14 f0 brlt .+4 ; 0x584 <__stack+0x125>
580: 1c 92 st X, r1
582: 71 50 subi r23, 0x01 ; 1
584: 4f 5f subi r20, 0xFF ; 255
586: 18 96 adiw r26, 0x08 ; 8
588: 48 30 cpi r20, 0x08 ; 8
58a: 29 f7 brne .-54 ; 0x556 <__stack+0xf7>
58c: 70 93 73 00 sts 0x0073, r23
590: e0 92 76 00 sts 0x0076, r14
594: f0 e9 ldi r31, 0x90 ; 144
596: ef 16 cp r14, r31
598: 09 f4 brne .+2 ; 0x59c <__stack+0x13d>
59a: 48 cf rjmp .-368 ; 0x42c <FrameMgr_processLine+0x10a>
59c: 80 91 72 00 lds r24, 0x0072
5a0: 82 60 ori r24, 0x02 ; 2
5a2: 80 93 72 00 sts 0x0072, r24
5a6: 04 c0 rjmp .+8 ; 0x5b0 <__stack+0x151>
5a8: 78 30 cpi r23, 0x08 ; 8
5aa: 08 f4 brcc .+2 ; 0x5ae <__stack+0x14f>
5ac: b2 cf rjmp .-156 ; 0x512 <__stack+0xb3>
5ae: c6 cf rjmp .-116 ; 0x53c <__stack+0xdd>
5b0: 21 96 adiw r28, 0x01 ; 1
5b2: 0f b6 in r0, 0x3f ; 63
5b4: f8 94 cli
5b6: de bf out 0x3e, r29 ; 62
5b8: 0f be out 0x3f, r0 ; 63
5ba: cd bf out 0x3d, r28 ; 61
5bc: df 91 pop r29
5be: cf 91 pop r28
5c0: 1f 91 pop r17
5c2: 0f 91 pop r16
5c4: ff 90 pop r15
5c6: ef 90 pop r14
5c8: df 90 pop r13
5ca: cf 90 pop r12
5cc: bf 90 pop r11
5ce: af 90 pop r10
5d0: 9f 90 pop r9
5d2: 8f 90 pop r8
5d4: 7f 90 pop r7
5d6: 6f 90 pop r6
5d8: 5f 90 pop r5
5da: 4f 90 pop r4
5dc: 3f 90 pop r3
5de: 2f 90 pop r2
5e0: 08 95 ret
000005e2 <FrameMgr_init>:
5e2: 80 e4 ldi r24, 0x40 ; 64
5e4: e8 e7 ldi r30, 0x78 ; 120
5e6: f0 e0 ldi r31, 0x00 ; 0
5e8: 11 92 st Z+, r1
5ea: 8a 95 dec r24
5ec: e9 f7 brne .-6 ; 0x5e8 <FrameMgr_init+0x6>
5ee: 08 95 ret
000005f0 <FrameMgr_acquireLine>:
5f0: 80 91 74 00 lds r24, 0x0074
5f4: 82 30 cpi r24, 0x02 ; 2
5f6: 49 f5 brne .+82 ; 0x64a <FrameMgr_acquireLine+0x5a>
5f8: 80 91 75 00 lds r24, 0x0075
5fc: 28 2f mov r18, r24
5fe: 22 0f add r18, r18
600: 80 eb ldi r24, 0xB0 ; 176
602: ec eb ldi r30, 0xBC ; 188
604: f1 e0 ldi r31, 0x01 ; 1
606: 98 2f mov r25, r24
608: 11 92 st Z+, r1
60a: 9a 95 dec r25
60c: e9 f7 brne .-6 ; 0x608 <FrameMgr_acquireLine+0x18>
60e: ec e0 ldi r30, 0x0C ; 12
610: f1 e0 ldi r31, 0x01 ; 1
612: 11 92 st Z+, r1
614: 8a 95 dec r24
616: e9 f7 brne .-6 ; 0x612 <FrameMgr_acquireLine+0x22>
618: 82 9b sbis 0x10, 2 ; 16
61a: fe cf rjmp .-4 ; 0x618 <FrameMgr_acquireLine+0x28>
61c: 82 9b sbis 0x10, 2 ; 16
61e: 07 c0 rjmp .+14 ; 0x62e <FrameMgr_acquireLine+0x3e>
620: fd cf rjmp .-6 ; 0x61c <FrameMgr_acquireLine+0x2c>
622: 90 e0 ldi r25, 0x00 ; 0
624: 84 9b sbis 0x10, 4 ; 16
626: fe cf rjmp .-4 ; 0x624 <FrameMgr_acquireLine+0x34>
628: 84 9b sbis 0x10, 4 ; 16
62a: 04 c0 rjmp .+8 ; 0x634 <FrameMgr_acquireLine+0x44>
62c: fd cf rjmp .-6 ; 0x628 <FrameMgr_acquireLine+0x38>
62e: 22 23 and r18, r18
630: c1 f7 brne .-16 ; 0x622 <FrameMgr_acquireLine+0x32>
632: 05 c0 rjmp .+10 ; 0x63e <FrameMgr_acquireLine+0x4e>
634: 91 50 subi r25, 0x01 ; 1
636: 82 2f mov r24, r18
638: 81 95 neg r24
63a: 98 17 cp r25, r24
63c: 99 f7 brne .-26 ; 0x624 <FrameMgr_acquireLine+0x34>
63e: 6c e0 ldi r22, 0x0C ; 12
640: 71 e0 ldi r23, 0x01 ; 1
642: 8c eb ldi r24, 0xBC ; 188
644: 91 e0 ldi r25, 0x01 ; 1
646: c3 d4 rcall .+2438 ; 0xfce <CamIntAsm_acquireDumpLine>
648: 08 95 ret
64a: 81 30 cpi r24, 0x01 ; 1
64c: 39 f4 brne .+14 ; 0x65c <FrameMgr_acquireLine+0x6c>
64e: 84 99 sbic 0x10, 4 ; 16
650: fe cf rjmp .-4 ; 0x64e <FrameMgr_acquireLine+0x5e>
652: 60 e0 ldi r22, 0x00 ; 0
654: 73 e0 ldi r23, 0x03 ; 3
656: 8c eb ldi r24, 0xBC ; 188
658: 91 e0 ldi r25, 0x01 ; 1
65a: 72 d4 rcall .+2276 ; 0xf40 <CamIntAsm_acquireTrackingLine>
65c: 08 95 ret
0000065e <FrameMgr_acquireFrame>:
65e: 80 91 74 00 lds r24, 0x0074
662: 81 30 cpi r24, 0x01 ; 1
664: a9 f4 brne .+42 ; 0x690 <FrameMgr_acquireFrame+0x32>
666: 10 92 76 00 sts 0x0076, r1
66a: 80 91 73 00 lds r24, 0x0073
66e: 80 93 77 00 sts 0x0077, r24
672: 10 92 73 00 sts 0x0073, r1
676: 80 e4 ldi r24, 0x40 ; 64
678: e8 e7 ldi r30, 0x78 ; 120
67a: f0 e0 ldi r31, 0x00 ; 0
67c: 11 92 st Z+, r1
67e: 8a 95 dec r24
680: e9 f7 brne .-6 ; 0x67c <FrameMgr_acquireFrame+0x1e>
682: 82 9b sbis 0x10, 2 ; 16
684: fe cf rjmp .-4 ; 0x682 <FrameMgr_acquireFrame+0x24>
686: 60 e0 ldi r22, 0x00 ; 0
688: 73 e0 ldi r23, 0x03 ; 3
68a: 8c eb ldi r24, 0xBC ; 188
68c: 91 e0 ldi r25, 0x01 ; 1
68e: 58 d4 rcall .+2224 ; 0xf40 <CamIntAsm_acquireTrackingLine>
690: 08 95 ret
00000692 <FrameMgr_dispatchEvent>:
692: 84 30 cpi r24, 0x04 ; 4
694: 19 f1 breq .+70 ; 0x6dc <FrameMgr_dispatchEvent+0x4a>
696: 85 30 cpi r24, 0x05 ; 5
698: 28 f4 brcc .+10 ; 0x6a4 <FrameMgr_dispatchEvent+0x12>
69a: 81 30 cpi r24, 0x01 ; 1
69c: 09 f1 breq .+66 ; 0x6e0 <FrameMgr_dispatchEvent+0x4e>
69e: 82 30 cpi r24, 0x02 ; 2
6a0: 41 f5 brne .+80 ; 0x6f2 <FrameMgr_dispatchEvent+0x60>
6a2: 07 c0 rjmp .+14 ; 0x6b2 <FrameMgr_dispatchEvent+0x20>
6a4: 80 38 cpi r24, 0x80 ; 128
6a6: 99 f0 breq .+38 ; 0x6ce <FrameMgr_dispatchEvent+0x3c>
6a8: 81 38 cpi r24, 0x81 ; 129
6aa: 09 f1 breq .+66 ; 0x6ee <FrameMgr_dispatchEvent+0x5c>
6ac: 80 32 cpi r24, 0x20 ; 32
6ae: 09 f5 brne .+66 ; 0x6f2 <FrameMgr_dispatchEvent+0x60>
6b0: 13 c0 rjmp .+38 ; 0x6d8 <FrameMgr_dispatchEvent+0x46>
6b2: 61 e0 ldi r22, 0x01 ; 1
6b4: 81 e1 ldi r24, 0x11 ; 17
6b6: 9b d3 rcall .+1846 ; 0xdee <CamConfig_setCamReg>
6b8: 9f d3 rcall .+1854 ; 0xdf8 <CamConfig_sendFifoCmds>
6ba: 88 ee ldi r24, 0xE8 ; 232
6bc: 93 e0 ldi r25, 0x03 ; 3
6be: e7 d3 rcall .+1998 ; 0xe8e <Utility_delay>
6c0: 10 92 75 00 sts 0x0075, r1
6c4: 82 e0 ldi r24, 0x02 ; 2
6c6: 80 93 74 00 sts 0x0074, r24
6ca: 92 df rcall .-220 ; 0x5f0 <FrameMgr_acquireLine>
6cc: 08 95 ret
6ce: 81 e0 ldi r24, 0x01 ; 1
6d0: 80 93 74 00 sts 0x0074, r24
6d4: c4 df rcall .-120 ; 0x65e <FrameMgr_acquireFrame>
6d6: 08 95 ret
6d8: cb dd rcall .-1130 ; 0x270 <FrameMgr_processFrame>
6da: 08 95 ret
6dc: c0 df rcall .-128 ; 0x65e <FrameMgr_acquireFrame>
6de: 08 95 ret
6e0: 80 91 74 00 lds r24, 0x0074
6e4: 88 23 and r24, r24
6e6: 29 f0 breq .+10 ; 0x6f2 <FrameMgr_dispatchEvent+0x60>
6e8: 84 e0 ldi r24, 0x04 ; 4
6ea: 4b dd rcall .-1386 ; 0x182 <Exec_writeEventFifo>
6ec: 08 95 ret
6ee: 10 92 74 00 sts 0x0074, r1
6f2: 08 95 ret
000006f4 <UIMgr_writeBufferToTxFifo>:
6f4: dc 01 movw r26, r24
6f6: 86 2f mov r24, r22
6f8: 66 23 and r22, r22
6fa: c9 f0 breq .+50 ; 0x72e <UIMgr_writeBufferToTxFifo+0x3a>
6fc: f8 94 cli
6fe: 61 50 subi r22, 0x01 ; 1
700: 6f 3f cpi r22, 0xFF ; 255
702: a1 f0 breq .+40 ; 0x72c <UIMgr_writeBufferToTxFifo+0x38>
704: 26 2f mov r18, r22
706: 44 e9 ldi r20, 0x94 ; 148
708: 52 e0 ldi r21, 0x02 ; 2
70a: 86 1b sub r24, r22
70c: 68 2f mov r22, r24
70e: 62 50 subi r22, 0x02 ; 2
710: 80 91 ba 00 lds r24, 0x00BA
714: fa 01 movw r30, r20
716: e8 0f add r30, r24
718: f1 1d adc r31, r1
71a: 9d 91 ld r25, X+
71c: 90 83 st Z, r25
71e: 8f 5f subi r24, 0xFF ; 255
720: 8f 73 andi r24, 0x3F ; 63
722: 80 93 ba 00 sts 0x00BA, r24
726: 21 50 subi r18, 0x01 ; 1
728: 62 17 cp r22, r18
72a: 91 f7 brne .-28 ; 0x710 <UIMgr_writeBufferToTxFifo+0x1c>
72c: 78 94 sei
72e: 08 95 ret
00000730 <UIMgr_readTxFifo>:
730: f8 94 cli
732: 90 91 bb 00 lds r25, 0x00BB
736: e4 e9 ldi r30, 0x94 ; 148
738: f2 e0 ldi r31, 0x02 ; 2
73a: e9 0f add r30, r25
73c: f1 1d adc r31, r1
73e: 80 81 ld r24, Z
740: 9f 5f subi r25, 0xFF ; 255
742: 9f 73 andi r25, 0x3F ; 63
744: 90 93 bb 00 sts 0x00BB, r25
748: 78 94 sei
74a: 99 27 eor r25, r25
74c: 08 95 ret
0000074e <UIMgr_writeTxFifo>:
74e: f8 94 cli
750: 90 91 ba 00 lds r25, 0x00BA
754: e4 e9 ldi r30, 0x94 ; 148
756: f2 e0 ldi r31, 0x02 ; 2
758: e9 0f add r30, r25
75a: f1 1d adc r31, r1
75c: 80 83 st Z, r24
75e: 9f 5f subi r25, 0xFF ; 255
760: 9f 73 andi r25, 0x3F ; 63
762: 90 93 ba 00 sts 0x00BA, r25
766: 78 94 sei
768: 08 95 ret
0000076a <UIMgr_flushTxBuffer>:
76a: 90 91 ba 00 lds r25, 0x00BA
76e: 80 91 bb 00 lds r24, 0x00BB
772: 98 17 cp r25, r24
774: 41 f0 breq .+16 ; 0x786 <UIMgr_flushTxBuffer+0x1c>
776: dc df rcall .-72 ; 0x730 <UIMgr_readTxFifo>
778: f5 d1 rcall .+1002 ; 0xb64 <UartInt_txByte>
77a: 90 91 ba 00 lds r25, 0x00BA
77e: 80 91 bb 00 lds r24, 0x00BB
782: 98 17 cp r25, r24
784: c1 f7 brne .-16 ; 0x776 <UIMgr_flushTxBuffer+0xc>
786: 08 95 ret
00000788 <UIMgr_txBuffer>:
788: 0f 93 push r16
78a: 1f 93 push r17
78c: cf 93 push r28
78e: df 93 push r29
790: ec 01 movw r28, r24
792: 86 2f mov r24, r22
794: 61 50 subi r22, 0x01 ; 1
796: 6f 3f cpi r22, 0xFF ; 255
798: 49 f0 breq .+18 ; 0x7ac <UIMgr_txBuffer+0x24>
79a: 16 2f mov r17, r22
79c: 86 1b sub r24, r22
79e: 08 2f mov r16, r24
7a0: 02 50 subi r16, 0x02 ; 2
7a2: 89 91 ld r24, Y+
7a4: df d1 rcall .+958 ; 0xb64 <UartInt_txByte>
7a6: 11 50 subi r17, 0x01 ; 1
7a8: 01 17 cp r16, r17
7aa: d9 f7 brne .-10 ; 0x7a2 <UIMgr_txBuffer+0x1a>
7ac: df 91 pop r29
7ae: cf 91 pop r28
7b0: 1f 91 pop r17
7b2: 0f 91 pop r16
7b4: 08 95 ret
000007b6 <UIMgr_transmitPendingData>:
7b6: 90 91 ba 00 lds r25, 0x00BA
7ba: 80 91 bb 00 lds r24, 0x00BB
7be: 98 17 cp r25, r24
7c0: 11 f0 breq .+4 ; 0x7c6 <UIMgr_transmitPendingData+0x10>
7c2: b6 df rcall .-148 ; 0x730 <UIMgr_readTxFifo>
7c4: cf d1 rcall .+926 ; 0xb64 <UartInt_txByte>
7c6: 08 95 ret
000007c8 <UIMgr_convertTokenToCmd>:
7c8: 90 91 bf 00 lds r25, 0x00BF
7cc: 90 35 cpi r25, 0x50 ; 80
7ce: 41 f4 brne .+16 ; 0x7e0 <UIMgr_convertTokenToCmd+0x18>
7d0: 80 91 c0 00 lds r24, 0x00C0
7d4: 87 34 cpi r24, 0x47 ; 71
7d6: 09 f5 brne .+66 ; 0x81a <UIMgr_convertTokenToCmd+0x52>
7d8: 81 e0 ldi r24, 0x01 ; 1
7da: 80 93 62 00 sts 0x0062, r24
7de: 48 c0 rjmp .+144 ; 0x870 <UIMgr_convertTokenToCmd+0xa8>
7e0: 97 34 cpi r25, 0x47 ; 71
7e2: 39 f4 brne .+14 ; 0x7f2 <UIMgr_convertTokenToCmd+0x2a>
7e4: 80 91 c0 00 lds r24, 0x00C0
7e8: 86 35 cpi r24, 0x56 ; 86
7ea: 09 f5 brne .+66 ; 0x82e <UIMgr_convertTokenToCmd+0x66>
7ec: 10 92 62 00 sts 0x0062, r1
7f0: 3f c0 rjmp .+126 ; 0x870 <UIMgr_convertTokenToCmd+0xa8>
7f2: 94 34 cpi r25, 0x44 ; 68
7f4: 41 f4 brne .+16 ; 0x806 <UIMgr_convertTokenToCmd+0x3e>
7f6: 80 91 c0 00 lds r24, 0x00C0
7fa: 86 34 cpi r24, 0x46 ; 70
7fc: 11 f5 brne .+68 ; 0x842 <UIMgr_convertTokenToCmd+0x7a>
7fe: 83 e0 ldi r24, 0x03 ; 3
800: 80 93 62 00 sts 0x0062, r24
804: 35 c0 rjmp .+106 ; 0x870 <UIMgr_convertTokenToCmd+0xa8>
806: 93 34 cpi r25, 0x43 ; 67
808: 41 f4 brne .+16 ; 0x81a <UIMgr_convertTokenToCmd+0x52>
80a: 80 91 c0 00 lds r24, 0x00C0
80e: 82 35 cpi r24, 0x52 ; 82
810: 11 f5 brne .+68 ; 0x856 <UIMgr_convertTokenToCmd+0x8e>
812: 82 e0 ldi r24, 0x02 ; 2
814: 80 93 62 00 sts 0x0062, r24
818: 2b c0 rjmp .+86 ; 0x870 <UIMgr_convertTokenToCmd+0xa8>
81a: 95 34 cpi r25, 0x45 ; 69
81c: 41 f4 brne .+16 ; 0x82e <UIMgr_convertTokenToCmd+0x66>
81e: 80 91 c0 00 lds r24, 0x00C0
822: 84 35 cpi r24, 0x54 ; 84
824: 11 f5 brne .+68 ; 0x86a <UIMgr_convertTokenToCmd+0xa2>
826: 84 e0 ldi r24, 0x04 ; 4
828: 80 93 62 00 sts 0x0062, r24
82c: 21 c0 rjmp .+66 ; 0x870 <UIMgr_convertTokenToCmd+0xa8>
82e: 93 35 cpi r25, 0x53 ; 83
830: 41 f4 brne .+16 ; 0x842 <UIMgr_convertTokenToCmd+0x7a>
832: 80 91 c0 00 lds r24, 0x00C0
836: 8d 34 cpi r24, 0x4D ; 77
838: c1 f4 brne .+48 ; 0x86a <UIMgr_convertTokenToCmd+0xa2>
83a: 86 e0 ldi r24, 0x06 ; 6
83c: 80 93 62 00 sts 0x0062, r24
840: 17 c0 rjmp .+46 ; 0x870 <UIMgr_convertTokenToCmd+0xa8>
842: 94 34 cpi r25, 0x44 ; 68
844: 41 f4 brne .+16 ; 0x856 <UIMgr_convertTokenToCmd+0x8e>
846: 80 91 c0 00 lds r24, 0x00C0
84a: 84 35 cpi r24, 0x54 ; 84
84c: 71 f4 brne .+28 ; 0x86a <UIMgr_convertTokenToCmd+0xa2>
84e: 85 e0 ldi r24, 0x05 ; 5
850: 80 93 62 00 sts 0x0062, r24
854: 0d c0 rjmp .+26 ; 0x870 <UIMgr_convertTokenToCmd+0xa8>
856: 92 35 cpi r25, 0x52 ; 82
858: 41 f4 brne .+16 ; 0x86a <UIMgr_convertTokenToCmd+0xa2>
85a: 80 91 c0 00 lds r24, 0x00C0
85e: 83 35 cpi r24, 0x53 ; 83
860: 21 f4 brne .+8 ; 0x86a <UIMgr_convertTokenToCmd+0xa2>
862: 87 e0 ldi r24, 0x07 ; 7
864: 80 93 62 00 sts 0x0062, r24
868: 03 c0 rjmp .+6 ; 0x870 <UIMgr_convertTokenToCmd+0xa8>
86a: 89 e0 ldi r24, 0x09 ; 9
86c: 80 93 62 00 sts 0x0062, r24
870: 83 e0 ldi r24, 0x03 ; 3
872: ef eb ldi r30, 0xBF ; 191
874: f0 e0 ldi r31, 0x00 ; 0
876: 11 92 st Z+, r1
878: 8a 95 dec r24
87a: e9 f7 brne .-6 ; 0x876 <UIMgr_convertTokenToCmd+0xae>
87c: 10 92 be 00 sts 0x00BE, r1
880: 10 92 bd 00 sts 0x00BD, r1
884: 08 95 ret
00000886 <UIMgr_init>:
886: 10 92 bf 00 sts 0x00BF, r1
88a: 10 92 c0 00 sts 0x00C0, r1
88e: 10 92 c1 00 sts 0x00C1, r1
892: 10 92 c2 00 sts 0x00C2, r1
896: 80 e4 ldi r24, 0x40 ; 64
898: e3 ec ldi r30, 0xC3 ; 195
89a: f0 e0 ldi r31, 0x00 ; 0
89c: 98 2f mov r25, r24
89e: 11 92 st Z+, r1
8a0: 9a 95 dec r25
8a2: e9 f7 brne .-6 ; 0x89e <UIMgr_init+0x18>
8a4: e4 e9 ldi r30, 0x94 ; 148
8a6: f2 e0 ldi r31, 0x02 ; 2
8a8: 11 92 st Z+, r1
8aa: 8a 95 dec r24
8ac: e9 f7 brne .-6 ; 0x8a8 <UIMgr_init+0x22>
8ae: 80 e2 ldi r24, 0x20 ; 32
8b0: e4 e7 ldi r30, 0x74 ; 116
8b2: f2 e0 ldi r31, 0x02 ; 2
8b4: 11 92 st Z+, r1
8b6: 8a 95 dec r24
8b8: e9 f7 brne .-6 ; 0x8b4 <UIMgr_init+0x2e>
8ba: 08 95 ret
000008bc <UIMgr_convertTokenToValue>:
8bc: 8f eb ldi r24, 0xBF ; 191
8be: 90 e0 ldi r25, 0x00 ; 0
8c0: b0 d3 rcall .+1888 ; 0x1022 <atoi>
8c2: 9c 01 movw r18, r24
8c4: 8f 3f cpi r24, 0xFF ; 255
8c6: 91 05 cpc r25, r1
8c8: 69 f0 breq .+26 ; 0x8e4 <UIMgr_convertTokenToValue+0x28>
8ca: 60 f0 brcs .+24 ; 0x8e4 <UIMgr_convertTokenToValue+0x28>
8cc: 89 e0 ldi r24, 0x09 ; 9
8ce: 80 93 62 00 sts 0x0062, r24
8d2: 80 91 bc 00 lds r24, 0x00BC
8d6: e3 ec ldi r30, 0xC3 ; 195
8d8: f0 e0 ldi r31, 0x00 ; 0
8da: e8 0f add r30, r24
8dc: f1 1d adc r31, r1
8de: 8f ef ldi r24, 0xFF ; 255
8e0: 80 83 st Z, r24
8e2: 07 c0 rjmp .+14 ; 0x8f2 <UIMgr_convertTokenToValue+0x36>
8e4: 80 91 bc 00 lds r24, 0x00BC
8e8: e3 ec ldi r30, 0xC3 ; 195
8ea: f0 e0 ldi r31, 0x00 ; 0
8ec: e8 0f add r30, r24
8ee: f1 1d adc r31, r1
8f0: 20 83 st Z, r18
8f2: 83 e0 ldi r24, 0x03 ; 3
8f4: ef eb ldi r30, 0xBF ; 191
8f6: f0 e0 ldi r31, 0x00 ; 0
8f8: 11 92 st Z+, r1
8fa: 8a 95 dec r24
8fc: e9 f7 brne .-6 ; 0x8f8 <UIMgr_convertTokenToValue+0x3c>
8fe: 10 92 be 00 sts 0x00BE, r1
902: 10 92 bd 00 sts 0x00BD, r1
906: 08 95 ret
00000908 <UIMgr_processReceivedData>:
908: ff 92 push r15
90a: 0f 93 push r16
90c: 1f 93 push r17
90e: cf 93 push r28
910: df 93 push r29
912: 0f 2e mov r0, r31
914: f9 e0 ldi r31, 0x09 ; 9
916: ff 2e mov r15, r31
918: f0 2d mov r31, r0
91a: ff c0 rjmp .+510 ; 0xb1a <UIMgr_processReceivedData+0x212>
91c: f8 94 cli
91e: e2 2f mov r30, r18
920: ff 27 eor r31, r31
922: ec 58 subi r30, 0x8C ; 140
924: fd 4f sbci r31, 0xFD ; 253
926: 90 81 ld r25, Z
928: 82 2f mov r24, r18
92a: 8f 5f subi r24, 0xFF ; 255
92c: 8f 71 andi r24, 0x1F ; 31
92e: 80 93 b9 00 sts 0x00B9, r24
932: 78 94 sei
934: 9d 30 cpi r25, 0x0D ; 13
936: 09 f0 breq .+2 ; 0x93a <UIMgr_processReceivedData+0x32>
938: b1 c0 rjmp .+354 ; 0xa9c <UIMgr_processReceivedData+0x194>
93a: 80 91 bc 00 lds r24, 0x00BC
93e: 88 23 and r24, r24
940: 11 f4 brne .+4 ; 0x946 <UIMgr_processReceivedData+0x3e>
942: 42 df rcall .-380 ; 0x7c8 <UIMgr_convertTokenToCmd>
944: 06 c0 rjmp .+12 ; 0x952 <UIMgr_processReceivedData+0x4a>
946: ba df rcall .-140 ; 0x8bc <UIMgr_convertTokenToValue>
948: 80 91 bc 00 lds r24, 0x00BC
94c: 8f 5f subi r24, 0xFF ; 255
94e: 80 93 bc 00 sts 0x00BC, r24
952: 84 e6 ldi r24, 0x64 ; 100
954: 90 e0 ldi r25, 0x00 ; 0
956: 9b d2 rcall .+1334 ; 0xe8e <Utility_delay>
958: 80 91 62 00 lds r24, 0x0062
95c: 88 50 subi r24, 0x08 ; 8
95e: 82 30 cpi r24, 0x02 ; 2
960: 58 f4 brcc .+22 ; 0x978 <UIMgr_processReceivedData+0x70>
962: 8e e4 ldi r24, 0x4E ; 78
964: f4 de rcall .-536 ; 0x74e <UIMgr_writeTxFifo>
966: 83 e4 ldi r24, 0x43 ; 67
968: f2 de rcall .-540 ; 0x74e <UIMgr_writeTxFifo>
96a: 8b e4 ldi r24, 0x4B ; 75
96c: f0 de rcall .-544 ; 0x74e <UIMgr_writeTxFifo>
96e: 8d e0 ldi r24, 0x0D ; 13
970: ee de rcall .-548 ; 0x74e <UIMgr_writeTxFifo>
972: 80 e9 ldi r24, 0x90 ; 144
974: 06 dc rcall .-2036 ; 0x182 <Exec_writeEventFifo>
976: 89 c0 rjmp .+274 ; 0xa8a <UIMgr_processReceivedData+0x182>
978: 81 e4 ldi r24, 0x41 ; 65
97a: e9 de rcall .-558 ; 0x74e <UIMgr_writeTxFifo>
97c: 83 e4 ldi r24, 0x43 ; 67
97e: e7 de rcall .-562 ; 0x74e <UIMgr_writeTxFifo>
980: 8b e4 ldi r24, 0x4B ; 75
982: e5 de rcall .-566 ; 0x74e <UIMgr_writeTxFifo>
984: 8d e0 ldi r24, 0x0D ; 13
986: e3 de rcall .-570 ; 0x74e <UIMgr_writeTxFifo>
988: 80 e9 ldi r24, 0x90 ; 144
98a: fb db rcall .-2058 ; 0x182 <Exec_writeEventFifo>
98c: 80 91 62 00 lds r24, 0x0062
990: 81 30 cpi r24, 0x01 ; 1
992: 09 f4 brne .+2 ; 0x996 <UIMgr_processReceivedData+0x8e>
994: 7a c0 rjmp .+244 ; 0xa8a <UIMgr_processReceivedData+0x182>
996: 88 23 and r24, r24
998: 71 f4 brne .+28 ; 0x9b6 <UIMgr_processReceivedData+0xae>
99a: 80 91 63 00 lds r24, 0x0063
99e: 88 23 and r24, r24
9a0: 09 f4 brne .+2 ; 0x9a4 <UIMgr_processReceivedData+0x9c>
9a2: 73 c0 rjmp .+230 ; 0xa8a <UIMgr_processReceivedData+0x182>
9a4: c3 e6 ldi r28, 0x63 ; 99
9a6: d0 e0 ldi r29, 0x00 ; 0
9a8: 21 96 adiw r28, 0x01 ; 1
9aa: d1 de rcall .-606 ; 0x74e <UIMgr_writeTxFifo>
9ac: 88 81 ld r24, Y
9ae: 88 23 and r24, r24
9b0: 09 f4 brne .+2 ; 0x9b4 <UIMgr_processReceivedData+0xac>
9b2: 6b c0 rjmp .+214 ; 0xa8a <UIMgr_processReceivedData+0x182>
9b4: f9 cf rjmp .-14 ; 0x9a8 <UIMgr_processReceivedData+0xa0>
9b6: 87 30 cpi r24, 0x07 ; 7
9b8: 11 f4 brne .+4 ; 0x9be <UIMgr_processReceivedData+0xb6>
9ba: a1 db rcall .-2238 ; 0xfe <CamInt_resetCam>
9bc: 66 c0 rjmp .+204 ; 0xa8a <UIMgr_processReceivedData+0x182>
9be: 83 30 cpi r24, 0x03 ; 3
9c0: 31 f4 brne .+12 ; 0x9ce <UIMgr_processReceivedData+0xc6>
9c2: 84 e6 ldi r24, 0x64 ; 100
9c4: 90 e0 ldi r25, 0x00 ; 0
9c6: 63 d2 rcall .+1222 ; 0xe8e <Utility_delay>
9c8: 82 e0 ldi r24, 0x02 ; 2
9ca: db db rcall .-2122 ; 0x182 <Exec_writeEventFifo>
9cc: 5e c0 rjmp .+188 ; 0xa8a <UIMgr_processReceivedData+0x182>
9ce: 82 30 cpi r24, 0x02 ; 2
9d0: 99 f4 brne .+38 ; 0x9f8 <UIMgr_processReceivedData+0xf0>
9d2: 80 91 bc 00 lds r24, 0x00BC
9d6: 82 30 cpi r24, 0x02 ; 2
9d8: 68 f0 brcs .+26 ; 0x9f4 <UIMgr_processReceivedData+0xec>
9da: 11 e0 ldi r17, 0x01 ; 1
9dc: e1 2f mov r30, r17
9de: ff 27 eor r31, r31
9e0: ed 53 subi r30, 0x3D ; 61
9e2: ff 4f sbci r31, 0xFF ; 255
9e4: 61 81 ldd r22, Z+1 ; 0x01
9e6: 80 81 ld r24, Z
9e8: 02 d2 rcall .+1028 ; 0xdee <CamConfig_setCamReg>
9ea: 1e 5f subi r17, 0xFE ; 254
9ec: 80 91 bc 00 lds r24, 0x00BC
9f0: 18 17 cp r17, r24
9f2: a0 f3 brcs .-24 ; 0x9dc <UIMgr_processReceivedData+0xd4>
9f4: 01 d2 rcall .+1026 ; 0xdf8 <CamConfig_sendFifoCmds>
9f6: 49 c0 rjmp .+146 ; 0xa8a <UIMgr_processReceivedData+0x182>
9f8: 84 30 cpi r24, 0x04 ; 4
9fa: 31 f4 brne .+12 ; 0xa08 <UIMgr_processReceivedData+0x100>
9fc: 84 e6 ldi r24, 0x64 ; 100
9fe: 90 e0 ldi r25, 0x00 ; 0
a00: 46 d2 rcall .+1164 ; 0xe8e <Utility_delay>
a02: 80 e8 ldi r24, 0x80 ; 128
a04: be db rcall .-2180 ; 0x182 <Exec_writeEventFifo>
a06: 41 c0 rjmp .+130 ; 0xa8a <UIMgr_processReceivedData+0x182>
a08: 85 30 cpi r24, 0x05 ; 5
a0a: 19 f4 brne .+6 ; 0xa12 <UIMgr_processReceivedData+0x10a>
a0c: 81 e8 ldi r24, 0x81 ; 129
a0e: b9 db rcall .-2190 ; 0x182 <Exec_writeEventFifo>
a10: 3c c0 rjmp .+120 ; 0xa8a <UIMgr_processReceivedData+0x182>
a12: 86 30 cpi r24, 0x06 ; 6
a14: 09 f0 breq .+2 ; 0xa18 <UIMgr_processReceivedData+0x110>
a16: 39 c0 rjmp .+114 ; 0xa8a <UIMgr_processReceivedData+0x182>
a18: 80 91 bc 00 lds r24, 0x00BC
a1c: 88 23 and r24, r24
a1e: 09 f4 brne .+2 ; 0xa22 <UIMgr_processReceivedData+0x11a>
a20: 34 c0 rjmp .+104 ; 0xa8a <UIMgr_processReceivedData+0x182>
a22: 40 e0 ldi r20, 0x00 ; 0
a24: 03 ec ldi r16, 0xC3 ; 195
a26: 10 e0 ldi r17, 0x00 ; 0
a28: 60 e0 ldi r22, 0x00 ; 0
a2a: 73 e0 ldi r23, 0x03 ; 3
a2c: 84 2f mov r24, r20
a2e: 99 27 eor r25, r25
a30: 9c 01 movw r18, r24
a32: 2f 5f subi r18, 0xFF ; 255
a34: 3f 4f sbci r19, 0xFF ; 255
a36: f9 01 movw r30, r18
a38: e0 0f add r30, r16
a3a: f1 1f adc r31, r17
a3c: e0 81 ld r30, Z
a3e: ec 01 movw r28, r24
a40: c6 0f add r28, r22
a42: d7 1f adc r29, r23
a44: e8 83 st Y, r30
uint8_t
eeprom_read_byte (const uint8_t *addr)
{
uint8_t result;
asm volatile
a46: d9 01 movw r26, r18
a48: 20 d3 rcall .+1600 ; 0x108a <__eeprom_read_byte_1C1D1E>
a4a: 80 2d mov r24, r0
static unsigned char tokenBuffer[MAX_TOKEN_COUNT];
static UIMgr_Cmd_t receivedCmd = noCmd;
static unsigned char AVRcamVersion[] = "AVRcam v1.4\r";
/* Local Function Declaration */
static unsigned char UIMgr_readRxFifo(void);
static unsigned char UIMgr_readTxFifo(void);
static unsigned char UIMgr_readRxFifo(void);
static void UIMgr_sendNck(void);
static void UIMgr_sendAck(void);
static void UIMgr_convertTokenToCmd(void);
static void UIMgr_convertTokenToValue(void);
static void UIMgr_executeCmd(void);
/* Extern Variables */
unsigned char UIMgr_rxFifo[UI_MGR_RX_FIFO_SIZE];
unsigned char UIMgr_rxFifoHead=0;
unsigned char UIMgr_rxFifoTail=0;
unsigned char UIMgr_txFifo[UI_MGR_TX_FIFO_SIZE];
unsigned char UIMgr_txFifoHead=0;
unsigned char UIMgr_txFifoTail=0;
/* Definitions */
#define IS_DATA_IN_TX_FIFO() (!(UIMgr_txFifoHead == UIMgr_txFifoTail))
#define IS_DATA_IN_RX_FIFO() (!(UIMgr_rxFifoHead == UIMgr_rxFifoTail))
/* MAX_EEPROM_WRITE_ATTEMPTS limits the number of writes that can be
done to a particular EEPROM cell, so that it can't possible just
write to the same cell over and over */
#define MAX_EEPROM_WRITE_ATTEMPTS 3
/***********************************************************
Function Name: UIMgr_init
Function Description: This function is responsible for
initializing the UIMgr module. It sets up the fifo
used to hold incoming data, etc.
Inputs: none
Outputs: none
***********************************************************/
void UIMgr_init(void)
{
memset(asciiTokenBuffer,0x00,MAX_TOKEN_LENGTH+1);
memset(tokenBuffer,0x00,MAX_TOKEN_COUNT);
memset(UIMgr_txFifo,0x00,UI_MGR_TX_FIFO_SIZE);
memset(UIMgr_rxFifo,0x00,UI_MGR_RX_FIFO_SIZE);
}
/***********************************************************
Function Name: UIMgr_dispatchEvent
Function Description: This function is responsible for
processing events that pertain to the UIMgr.
Inputs: event - the generated event
Outputs: none
***********************************************************/
void UIMgr_dispatchEvent(unsigned char event)
{
switch(event)
{
case EV_ACQUIRE_LINE_COMPLETE:
UIMgr_transmitPendingData();
break;
case EV_SERIAL_DATA_RECEIVED:
UIMgr_processReceivedData();
break;
case EV_SERIAL_DATA_PENDING_TX:
UIMgr_flushTxBuffer();
break;
}
}
/***********************************************************
Function Name: UIMgr_transmitPendingData
Function Description: This function is responsible for
transmitting a single byte of data if data is waiting
to be sent. Otherwise, if nothing is waiting, the
function just returns.
Inputs: none
Outputs: none
***********************************************************/
void UIMgr_transmitPendingData(void)
{
if (IS_DATA_IN_TX_FIFO() == TRUE)
{
/* data is waiting...send a single byte */
UartInt_txByte( UIMgr_readTxFifo() );
}
}
/***********************************************************
Function Name: UIMgr_processReceivedData
Function Description: This function is responsible for
parsing any serial data waiting in the rx fifo
Inputs: none
Outputs: none
***********************************************************/
void UIMgr_processReceivedData(void)
{
unsigned char tmpData = 0;
/* still need to add a mechanism to handle token counts
that are excessive!!! FIX ME!!! */
while(IS_DATA_IN_RX_FIFO() == TRUE)
{
tmpData = UIMgr_readRxFifo();
if (tmpData == '\r')
{
/* we have reached a token separator */
if (tokenCount == 0)
{
/* convert the command */
UIMgr_convertTokenToCmd();
}
else
{
/* convert a value */
UIMgr_convertTokenToValue();
tokenCount++;
}
/* either way, it is time to try to process the received
token list since we have reached the end of the cmd. */
Utility_delay(100);
if (receivedCmd == invalidCmd ||
receivedCmd == noCmd )
{
UIMgr_sendNck();
PUBLISH_EVENT(EV_SERIAL_DATA_PENDING_TX);
}
else
{
UIMgr_sendAck();
/* publish the serial data pending event, so it
will push the ACK out before we execute the cmd */
PUBLISH_EVENT(EV_SERIAL_DATA_PENDING_TX);
UIMgr_executeCmd();
}
/* reset any necessary data */
tokenCount = 0;
memset(tokenBuffer,0x00,MAX_TOKEN_COUNT);
}
else if (tmpData == ' ') /* space char */
{
/* the end of a token has been reached */
if (tokenCount == 0)
{
UIMgr_convertTokenToCmd();
tokenCount++; /* check this...why is this being incremented here??? This
means we have received a token, with tokenCount == 0, which means it is a
command...why is this contributing to tokenCount?
This might cause the set color map command to include too much data, since
it sets the color map based on tokenCount...CHECK*/
}
else
{
/* check to see if this token is going to push
us over the limit...if so, abort the transaction */
if (tokenCount+1 >= MAX_TOKEN_COUNT)
{
/* we received too many tokens, and
need to NCK this request, since its too
large...reset everything...*/
charCount=0;
charIndex=0;
tokenCount=0;
receivedCmd = invalidCmd;
}
else
{
/* tokenCount is still in range...*/
UIMgr_convertTokenToValue();
tokenCount++;
}
}
}
else if ( (tmpData >= 'A' && tmpData <= 'Z') ||
(tmpData >= '0' && tmpData <= '9') )
{
/* a valid range of token was received */
asciiTokenBuffer[charIndex] = tmpData;
charCount++;
charIndex++;
if (charCount > MAX_TOKEN_LENGTH)
{
/* we have received a token that cannot be handled...
set the received cmd to an invalid cmd, and wait
for the \r to process it */
receivedCmd = invalidCmd;
charIndex = 0; /* ...so we won't overwrite memory */
}
}
else
{
/* an invalid character was received */
receivedCmd = invalidCmd;
}
} /* end while */
asm volatile("clt"::); /* clear out the T flag in case it wasn't
cleared already */
}
/***********************************************************
Function Name: UIMgr_executeCmd
Function Description: This function is responsible for
executing whatever cmd is stored in the receivedCmd
object.
Inputs: none
Outputs: none
***********************************************************/
static void UIMgr_executeCmd(void)
{
unsigned char i,eepromData, num_writes=0;
unsigned char *pData;
unsigned char eeprom_write_succeeded = FALSE;
#if DEBUG_COLOR_MAP
unsigned char asciiBuffer[5];
#endif
if (receivedCmd == pingCmd)
{
}
else if (receivedCmd == getVersionCmd)
{
pData = AVRcamVersion;
while(*pData != 0)
{
UIMgr_writeTxFifo(*pData++);
}
}
else if (receivedCmd == resetCameraCmd)
{
CamInt_resetCam();
}
else if (receivedCmd == dumpFrameCmd)
{
/* publish the event that will indicate that
a request has come to dump a frame...this will
be received by the FrameMgr, which will begin
dumping the frame...a short delay is needed
here to keep the Java demo app happy (sometimes
it wouldn't be able to receive the serial data
as quickly as AVRcam can provide it). */
Utility_delay(100);
PUBLISH_EVENT(EV_DUMP_FRAME);
}
else if (receivedCmd == setCameraRegsCmd)
{
/* we need to gather the tokens and
build config cmds to be sent to the camera */
for (i=1; i<tokenCount; i+=2) /* starts at 1 since first token
is the CR cmd */
{
CamConfig_setCamReg(tokenBuffer[i],tokenBuffer[i+1]);
}
CamConfig_sendFifoCmds();
}
else if (receivedCmd == enableTrackingCmd)
{
/* publish the event...again with a short delay */
Utility_delay(100);
PUBLISH_EVENT(EV_ENABLE_TRACKING);
}
else if (receivedCmd == disableTrackingCmd)
{
PUBLISH_EVENT(EV_DISABLE_TRACKING);
}
else if (receivedCmd == setColorMapCmd)
{
/* copy the received tokens into the color map */
for (i=0; i<tokenCount; i++)
{
colorMap[i] = tokenBuffer[i+1];
/* write each colorMap byte to EEPROM, but only those
that changed...this will help reduce wear on the EEPROM */
eepromData = eeprom_read_byte( (unsigned char*)(i+1));
if (eepromData != colorMap[i])
a4c: e8 17 cp r30, r24
a4e: c1 f0 breq .+48 ; 0xa80 <UIMgr_processReceivedData+0x178>
void
eeprom_write_byte (uint8_t *addr,uint8_t value)
{
asm volatile (
a50: d9 01 movw r26, r18
a52: 0e 2e mov r0, r30
a54: 27 d3 rcall .+1614 ; 0x10a4 <__eeprom_write_byte_1C1D1E>
a56: d9 01 movw r26, r18
a58: 18 d3 rcall .+1584 ; 0x108a <__eeprom_read_byte_1C1D1E>
a5a: 80 2d mov r24, r0
{
/* need to actually perform the write because the
data in eeprom is different than the current colorMap */
eeprom_write_succeeded = FALSE;
while(eeprom_write_succeeded == FALSE && num_writes < MAX_EEPROM_WRITE_ATTEMPTS)
{
eeprom_write_byte((unsigned char*)(i+1),colorMap[i]);
num_writes++;
eepromData = eeprom_read_byte( (unsigned char*)(i+1));
if (eepromData == colorMap[i])
a5c: 98 81 ld r25, Y
a5e: 98 17 cp r25, r24
a60: 79 f0 breq .+30 ; 0xa80 <UIMgr_processReceivedData+0x178>
void
eeprom_write_byte (uint8_t *addr,uint8_t value)
{
asm volatile (
a62: d9 01 movw r26, r18
a64: 09 2e mov r0, r25
a66: 1e d3 rcall .+1596 ; 0x10a4 <__eeprom_write_byte_1C1D1E>
a68: d9 01 movw r26, r18
a6a: 0f d3 rcall .+1566 ; 0x108a <__eeprom_read_byte_1C1D1E>
a6c: 80 2d mov r24, r0
a6e: 98 81 ld r25, Y
a70: 98 17 cp r25, r24
a72: 31 f0 breq .+12 ; 0xa80 <UIMgr_processReceivedData+0x178>
void
eeprom_write_byte (uint8_t *addr,uint8_t value)
{
asm volatile (
a74: d9 01 movw r26, r18
a76: 09 2e mov r0, r25
a78: 15 d3 rcall .+1578 ; 0x10a4 <__eeprom_write_byte_1C1D1E>
a7a: d9 01 movw r26, r18
a7c: 06 d3 rcall .+1548 ; 0x108a <__eeprom_read_byte_1C1D1E>
a7e: 80 2d mov r24, r0
a80: 4f 5f subi r20, 0xFF ; 255
a82: 80 91 bc 00 lds r24, 0x00BC
a86: 48 17 cp r20, r24
a88: 88 f2 brcs .-94 ; 0xa2c <UIMgr_processReceivedData+0x124>
a8a: 10 92 bc 00 sts 0x00BC, r1
a8e: 80 e4 ldi r24, 0x40 ; 64
a90: e3 ec ldi r30, 0xC3 ; 195
a92: f0 e0 ldi r31, 0x00 ; 0
a94: 11 92 st Z+, r1
a96: 8a 95 dec r24
a98: e9 f7 brne .-6 ; 0xa94 <UIMgr_processReceivedData+0x18c>
a9a: 3f c0 rjmp .+126 ; 0xb1a <UIMgr_processReceivedData+0x212>
a9c: 90 32 cpi r25, 0x20 ; 32
a9e: f1 f4 brne .+60 ; 0xadc <UIMgr_processReceivedData+0x1d4>
aa0: 80 91 bc 00 lds r24, 0x00BC
aa4: 88 23 and r24, r24
aa6: 39 f4 brne .+14 ; 0xab6 <UIMgr_processReceivedData+0x1ae>
aa8: 8f de rcall .-738 ; 0x7c8 <UIMgr_convertTokenToCmd>
aaa: 80 91 bc 00 lds r24, 0x00BC
aae: 8f 5f subi r24, 0xFF ; 255
ab0: 80 93 bc 00 sts 0x00BC, r24
ab4: 32 c0 rjmp .+100 ; 0xb1a <UIMgr_processReceivedData+0x212>
ab6: 99 27 eor r25, r25
ab8: cf 97 sbiw r24, 0x3f ; 63
aba: 4c f0 brlt .+18 ; 0xace <UIMgr_processReceivedData+0x1c6>
abc: 10 92 bd 00 sts 0x00BD, r1
ac0: 10 92 be 00 sts 0x00BE, r1
ac4: 10 92 bc 00 sts 0x00BC, r1
ac8: f0 92 62 00 sts 0x0062, r15
acc: 26 c0 rjmp .+76 ; 0xb1a <UIMgr_processReceivedData+0x212>
ace: f6 de rcall .-532 ; 0x8bc <UIMgr_convertTokenToValue>
ad0: 80 91 bc 00 lds r24, 0x00BC
ad4: 8f 5f subi r24, 0xFF ; 255
ad6: 80 93 bc 00 sts 0x00BC, r24
ada: 1f c0 rjmp .+62 ; 0xb1a <UIMgr_processReceivedData+0x212>
adc: 89 2f mov r24, r25
ade: 81 54 subi r24, 0x41 ; 65
ae0: 8a 31 cpi r24, 0x1A ; 26
ae2: 18 f0 brcs .+6 ; 0xaea <UIMgr_processReceivedData+0x1e2>
ae4: 8f 5e subi r24, 0xEF ; 239
ae6: 8a 30 cpi r24, 0x0A ; 10
ae8: b0 f4 brcc .+44 ; 0xb16 <UIMgr_processReceivedData+0x20e>
aea: 80 91 be 00 lds r24, 0x00BE
aee: e8 2f mov r30, r24
af0: ff 27 eor r31, r31
af2: e1 54 subi r30, 0x41 ; 65
af4: ff 4f sbci r31, 0xFF ; 255
af6: 90 83 st Z, r25
af8: 90 91 bd 00 lds r25, 0x00BD
afc: 9f 5f subi r25, 0xFF ; 255
afe: 90 93 bd 00 sts 0x00BD, r25
b02: 8f 5f subi r24, 0xFF ; 255
b04: 80 93 be 00 sts 0x00BE, r24
b08: 94 30 cpi r25, 0x04 ; 4
b0a: 38 f0 brcs .+14 ; 0xb1a <UIMgr_processReceivedData+0x212>
b0c: f0 92 62 00 sts 0x0062, r15
b10: 10 92 be 00 sts 0x00BE, r1
b14: 02 c0 rjmp .+4 ; 0xb1a <UIMgr_processReceivedData+0x212>
b16: f0 92 62 00 sts 0x0062, r15
b1a: 20 91 b9 00 lds r18, 0x00B9
b1e: 80 91 b8 00 lds r24, 0x00B8
b22: 82 17 cp r24, r18
b24: 09 f0 breq .+2 ; 0xb28 <UIMgr_processReceivedData+0x220>
b26: fa ce rjmp .-524 ; 0x91c <UIMgr_processReceivedData+0x14>
b28: e8 94 clt
b2a: df 91 pop r29
b2c: cf 91 pop r28
b2e: 1f 91 pop r17
b30: 0f 91 pop r16
b32: ff 90 pop r15
b34: 08 95 ret
00000b36 <UIMgr_dispatchEvent>:
b36: 80 31 cpi r24, 0x10 ; 16
b38: 29 f0 breq .+10 ; 0xb44 <UIMgr_dispatchEvent+0xe>
b3a: 80 39 cpi r24, 0x90 ; 144
b3c: 39 f0 breq .+14 ; 0xb4c <UIMgr_dispatchEvent+0x16>
b3e: 81 30 cpi r24, 0x01 ; 1
b40: 31 f4 brne .+12 ; 0xb4e <UIMgr_dispatchEvent+0x18>
b42: 02 c0 rjmp .+4 ; 0xb48 <UIMgr_dispatchEvent+0x12>
b44: 38 de rcall .-912 ; 0x7b6 <UIMgr_transmitPendingData>
b46: 08 95 ret
b48: df de rcall .-578 ; 0x908 <UIMgr_processReceivedData>
b4a: 08 95 ret
b4c: 0e de rcall .-996 ; 0x76a <UIMgr_flushTxBuffer>
b4e: 08 95 ret
00000b50 <UartInt_init>:
b50: 10 bc out 0x20, r1 ; 32
b52: 82 e1 ldi r24, 0x12 ; 18
b54: 89 b9 out 0x09, r24 ; 9
b56: 88 e9 ldi r24, 0x98 ; 152
b58: 8a b9 out 0x0a, r24 ; 10
b5a: 86 e8 ldi r24, 0x86 ; 134
b5c: 80 bd out 0x20, r24 ; 32
b5e: 82 e0 ldi r24, 0x02 ; 2
b60: 8b b9 out 0x0b, r24 ; 11
b62: 08 95 ret
00000b64 <UartInt_txByte>:
b64: 5d 9b sbis 0x0b, 5 ; 11
b66: fe cf rjmp .-4 ; 0xb64 <UartInt_txByte>
b68: 8c b9 out 0x0c, r24 ; 12
b6a: 08 95 ret
00000b6c <__vector_11>:
b6c: 1f 92 push r1
b6e: 0f 92 push r0
b70: 0f b6 in r0, 0x3f ; 63
b72: 0f 92 push r0
b74: 11 24 eor r1, r1
b76: 8f 93 push r24
b78: 9f 93 push r25
b7a: ef 93 push r30
b7c: ff 93 push r31
b7e: 80 91 b8 00 lds r24, 0x00B8
b82: 9c b1 in r25, 0x0c ; 12
b84: e4 e7 ldi r30, 0x74 ; 116
b86: f2 e0 ldi r31, 0x02 ; 2
b88: e8 0f add r30, r24
b8a: f1 1d adc r31, r1
b8c: 90 83 st Z, r25
b8e: 8f 5f subi r24, 0xFF ; 255
b90: 8f 71 andi r24, 0x1F ; 31
b92: 80 93 b8 00 sts 0x00B8, r24
b96: 80 91 70 00 lds r24, 0x0070
b9a: ec e6 ldi r30, 0x6C ; 108
b9c: f2 e0 ldi r31, 0x02 ; 2
b9e: e8 0f add r30, r24
ba0: f1 1d adc r31, r1
ba2: 91 e0 ldi r25, 0x01 ; 1
ba4: 90 83 st Z, r25
ba6: 8f 5f subi r24, 0xFF ; 255
ba8: 87 70 andi r24, 0x07 ; 7
baa: 80 93 70 00 sts 0x0070, r24
bae: ff 91 pop r31
bb0: ef 91 pop r30
bb2: 9f 91 pop r25
bb4: 8f 91 pop r24
bb6: 0f 90 pop r0
bb8: 0f be out 0x3f, r0 ; 63
bba: 0f 90 pop r0
bbc: 1f 90 pop r1
bbe: 18 95 reti
00000bc0 <I2CInt_init>:
bc0: 11 b8 out 0x01, r1 ; 1
bc2: 88 e4 ldi r24, 0x48 ; 72
bc4: 80 b9 out 0x00, r24 ; 0
bc6: 08 95 ret
00000bc8 <I2CInt_writeData>:
bc8: 98 2f mov r25, r24
bca: 80 91 08 01 lds r24, 0x0108
bce: 88 23 and r24, r24
bd0: e4 f3 brlt .-8 ; 0xbca <I2CInt_writeData+0x2>
bd2: 06 b6 in r0, 0x36 ; 54
bd4: 04 fc sbrc r0, 4
bd6: fd cf rjmp .-6 ; 0xbd2 <I2CInt_writeData+0xa>
bd8: 90 93 03 01 sts 0x0103, r25
bdc: 70 93 05 01 sts 0x0105, r23
be0: 60 93 04 01 sts 0x0104, r22
be4: 40 93 07 01 sts 0x0107, r20
be8: 10 92 06 01 sts 0x0106, r1
bec: 10 92 09 01 sts 0x0109, r1
bf0: 85 ea ldi r24, 0xA5 ; 165
bf2: 86 bf out 0x36, r24 ; 54
bf4: 80 91 08 01 lds r24, 0x0108
bf8: 80 68 ori r24, 0x80 ; 128
bfa: 80 93 08 01 sts 0x0108, r24
bfe: 08 95 ret
00000c00 <I2CInt_readData>:
c00: 98 2f mov r25, r24
c02: 80 91 08 01 lds r24, 0x0108
c06: 88 23 and r24, r24
c08: e4 f3 brlt .-8 ; 0xc02 <I2CInt_readData+0x2>
c0a: 90 93 03 01 sts 0x0103, r25
c0e: 70 93 05 01 sts 0x0105, r23
c12: 60 93 04 01 sts 0x0104, r22
c16: 40 93 07 01 sts 0x0107, r20
c1a: 81 e0 ldi r24, 0x01 ; 1
c1c: 80 93 06 01 sts 0x0106, r24
c20: 10 92 09 01 sts 0x0109, r1
c24: 85 ea ldi r24, 0xA5 ; 165
c26: 86 bf out 0x36, r24 ; 54
c28: 80 91 08 01 lds r24, 0x0108
c2c: 80 68 ori r24, 0x80 ; 128
c2e: 80 93 08 01 sts 0x0108, r24
c32: 08 95 ret
00000c34 <I2CInt_isI2cBusy>:
c34: 80 91 08 01 lds r24, 0x0108
c38: 88 1f adc r24, r24
c3a: 88 27 eor r24, r24
c3c: 88 1f adc r24, r24
c3e: 99 27 eor r25, r25
c40: 08 95 ret
00000c42 <__vector_17>:
c42: 1f 92 push r1
c44: 0f 92 push r0
c46: 0f b6 in r0, 0x3f ; 63
c48: 0f 92 push r0
c4a: 11 24 eor r1, r1
c4c: 8f 93 push r24
c4e: 9f 93 push r25
c50: af 93 push r26
c52: bf 93 push r27
c54: ef 93 push r30
c56: ff 93 push r31
c58: 81 b1 in r24, 0x01 ; 1
c5a: 99 27 eor r25, r25
c5c: aa 27 eor r26, r26
c5e: bb 27 eor r27, r27
c60: 88 7f andi r24, 0xF8 ; 248
c62: 90 70 andi r25, 0x00 ; 0
c64: a0 70 andi r26, 0x00 ; 0
c66: b0 70 andi r27, 0x00 ; 0
c68: fc 01 movw r30, r24
c6a: 38 97 sbiw r30, 0x08 ; 8
c6c: e1 35 cpi r30, 0x51 ; 81
c6e: f1 05 cpc r31, r1
c70: 08 f0 brcs .+2 ; 0xc74 <__vector_17+0x32>
c72: 9a c0 rjmp .+308 ; 0xda8 <__vector_17+0x166>
c74: ed 5e subi r30, 0xED ; 237
c76: ff 4f sbci r31, 0xFF ; 255
c78: 09 94 ijmp
c7a: 80 91 09 01 lds r24, 0x0109
c7e: 83 30 cpi r24, 0x03 ; 3
c80: 48 f0 brcs .+18 ; 0xc94 <__vector_17+0x52>
c82: 86 b7 in r24, 0x36 ; 54
c84: 80 69 ori r24, 0x90 ; 144
c86: 86 bf out 0x36, r24 ; 54
c88: 80 91 08 01 lds r24, 0x0108
c8c: 8f 77 andi r24, 0x7F ; 127
c8e: 80 93 08 01 sts 0x0108, r24
c92: 8a c0 rjmp .+276 ; 0xda8 <__vector_17+0x166>
c94: 80 91 03 01 lds r24, 0x0103
c98: 90 91 06 01 lds r25, 0x0106
c9c: 88 0f add r24, r24
c9e: 89 0f add r24, r25
ca0: 83 b9 out 0x03, r24 ; 3
ca2: 86 b7 in r24, 0x36 ; 54
ca4: 8f 7d andi r24, 0xDF ; 223
ca6: 86 bf out 0x36, r24 ; 54
ca8: 7f c0 rjmp .+254 ; 0xda8 <__vector_17+0x166>
caa: 10 92 09 01 sts 0x0109, r1
cae: e0 91 04 01 lds r30, 0x0104
cb2: f0 91 05 01 lds r31, 0x0105
cb6: 80 81 ld r24, Z
cb8: 83 b9 out 0x03, r24 ; 3
cba: 31 96 adiw r30, 0x01 ; 1
cbc: f0 93 05 01 sts 0x0105, r31
cc0: e0 93 04 01 sts 0x0104, r30
cc4: 86 b7 in r24, 0x36 ; 54
cc6: 80 68 ori r24, 0x80 ; 128
cc8: 86 bf out 0x36, r24 ; 54
cca: 6e c0 rjmp .+220 ; 0xda8 <__vector_17+0x166>
ccc: 80 91 09 01 lds r24, 0x0109
cd0: 8f 5f subi r24, 0xFF ; 255
cd2: 80 93 09 01 sts 0x0109, r24
cd6: 86 b7 in r24, 0x36 ; 54
cd8: 80 6b ori r24, 0xB0 ; 176
cda: 86 bf out 0x36, r24 ; 54
cdc: 65 c0 rjmp .+202 ; 0xda8 <__vector_17+0x166>
cde: 80 91 07 01 lds r24, 0x0107
ce2: 81 50 subi r24, 0x01 ; 1
ce4: 80 93 07 01 sts 0x0107, r24
ce8: 80 91 07 01 lds r24, 0x0107
cec: 88 23 and r24, r24
cee: 79 f0 breq .+30 ; 0xd0e <__vector_17+0xcc>
cf0: e0 91 04 01 lds r30, 0x0104
cf4: f0 91 05 01 lds r31, 0x0105
cf8: 80 81 ld r24, Z
cfa: 83 b9 out 0x03, r24 ; 3
cfc: 31 96 adiw r30, 0x01 ; 1
cfe: f0 93 05 01 sts 0x0105, r31
d02: e0 93 04 01 sts 0x0104, r30
d06: 86 b7 in r24, 0x36 ; 54
d08: 80 68 ori r24, 0x80 ; 128
d0a: 86 bf out 0x36, r24 ; 54
d0c: 4d c0 rjmp .+154 ; 0xda8 <__vector_17+0x166>
d0e: 86 b7 in r24, 0x36 ; 54
d10: 80 69 ori r24, 0x90 ; 144
d12: 86 bf out 0x36, r24 ; 54
d14: 80 91 08 01 lds r24, 0x0108
d18: 8f 77 andi r24, 0x7F ; 127
d1a: 80 93 08 01 sts 0x0108, r24
d1e: 44 c0 rjmp .+136 ; 0xda8 <__vector_17+0x166>
d20: 86 b7 in r24, 0x36 ; 54
d22: 80 69 ori r24, 0x90 ; 144
d24: 86 bf out 0x36, r24 ; 54
d26: 80 91 08 01 lds r24, 0x0108
d2a: 8f 77 andi r24, 0x7F ; 127
d2c: 80 93 08 01 sts 0x0108, r24
d30: 3b c0 rjmp .+118 ; 0xda8 <__vector_17+0x166>
d32: 80 91 07 01 lds r24, 0x0107
d36: 81 50 subi r24, 0x01 ; 1
d38: 80 93 07 01 sts 0x0107, r24
d3c: 80 91 07 01 lds r24, 0x0107
d40: 88 23 and r24, r24
d42: 21 f0 breq .+8 ; 0xd4c <__vector_17+0x10a>
d44: 86 b7 in r24, 0x36 ; 54
d46: 80 6c ori r24, 0xC0 ; 192
d48: 86 bf out 0x36, r24 ; 54
d4a: 2e c0 rjmp .+92 ; 0xda8 <__vector_17+0x166>
d4c: 86 b7 in r24, 0x36 ; 54
d4e: 80 68 ori r24, 0x80 ; 128
d50: 86 bf out 0x36, r24 ; 54
d52: 2a c0 rjmp .+84 ; 0xda8 <__vector_17+0x166>
d54: e0 91 04 01 lds r30, 0x0104
d58: f0 91 05 01 lds r31, 0x0105
d5c: 83 b1 in r24, 0x03 ; 3
d5e: 80 83 st Z, r24
d60: 31 96 adiw r30, 0x01 ; 1
d62: f0 93 05 01 sts 0x0105, r31
d66: e0 93 04 01 sts 0x0104, r30
d6a: 80 91 07 01 lds r24, 0x0107
d6e: 81 50 subi r24, 0x01 ; 1
d70: 80 93 07 01 sts 0x0107, r24
d74: 80 91 07 01 lds r24, 0x0107
d78: 88 23 and r24, r24
d7a: 21 f0 breq .+8 ; 0xd84 <__vector_17+0x142>
d7c: 86 b7 in r24, 0x36 ; 54
d7e: 80 6c ori r24, 0xC0 ; 192
d80: 86 bf out 0x36, r24 ; 54
d82: 12 c0 rjmp .+36 ; 0xda8 <__vector_17+0x166>
d84: 86 b7 in r24, 0x36 ; 54
d86: 8f 7b andi r24, 0xBF ; 191
d88: 86 bf out 0x36, r24 ; 54
d8a: 0e c0 rjmp .+28 ; 0xda8 <__vector_17+0x166>
d8c: e0 91 04 01 lds r30, 0x0104
d90: f0 91 05 01 lds r31, 0x0105
d94: 83 b1 in r24, 0x03 ; 3
d96: 80 83 st Z, r24
d98: 86 b7 in r24, 0x36 ; 54
d9a: 80 69 ori r24, 0x90 ; 144
d9c: 86 bf out 0x36, r24 ; 54
d9e: 80 91 08 01 lds r24, 0x0108
da2: 8f 77 andi r24, 0x7F ; 127
da4: 80 93 08 01 sts 0x0108, r24
da8: ff 91 pop r31
daa: ef 91 pop r30
dac: bf 91 pop r27
dae: af 91 pop r26
db0: 9f 91 pop r25
db2: 8f 91 pop r24
db4: 0f 90 pop r0
db6: 0f be out 0x3f, r0 ; 63
db8: 0f 90 pop r0
dba: 1f 90 pop r1
dbc: 18 95 reti
00000dbe <CamConfig_writeTxFifo>:
dbe: 20 91 0a 01 lds r18, 0x010A
dc2: e2 2f mov r30, r18
dc4: ff 27 eor r31, r31
dc6: ee 0f add r30, r30
dc8: ff 1f adc r31, r31
dca: ec 52 subi r30, 0x2C ; 44
dcc: fd 4f sbci r31, 0xFD ; 253
dce: 91 83 std Z+1, r25 ; 0x01
dd0: 80 83 st Z, r24
dd2: 2f 5f subi r18, 0xFF ; 255
dd4: 27 70 andi r18, 0x07 ; 7
dd6: 20 93 0a 01 sts 0x010A, r18
dda: 90 e0 ldi r25, 0x00 ; 0
ddc: 80 91 0b 01 lds r24, 0x010B
de0: 28 17 cp r18, r24
de2: 09 f4 brne .+2 ; 0xde6 <CamConfig_writeTxFifo+0x28>
de4: 91 e0 ldi r25, 0x01 ; 1
de6: 81 e0 ldi r24, 0x01 ; 1
de8: 89 27 eor r24, r25
dea: 99 27 eor r25, r25
dec: 08 95 ret
00000dee <CamConfig_setCamReg>:
dee: 28 2f mov r18, r24
df0: 36 2f mov r19, r22
df2: c9 01 movw r24, r18
df4: e4 df rcall .-56 ; 0xdbe <CamConfig_writeTxFifo>
df6: 08 95 ret
00000df8 <CamConfig_sendFifoCmds>:
df8: 0f 93 push r16
dfa: 1f 93 push r17
dfc: cf 93 push r28
dfe: df 93 push r29
e00: cd b7 in r28, 0x3d ; 61
e02: de b7 in r29, 0x3e ; 62
e04: 22 97 sbiw r28, 0x02 ; 2
e06: 0f b6 in r0, 0x3f ; 63
e08: f8 94 cli
e0a: de bf out 0x3e, r29 ; 62
e0c: 0f be out 0x3f, r0 ; 63
e0e: cd bf out 0x3d, r28 ; 61
e10: 8e 01 movw r16, r28
e12: 0f 5f subi r16, 0xFF ; 255
e14: 1f 4f sbci r17, 0xFF ; 255
e16: 19 c0 rjmp .+50 ; 0xe4a <CamConfig_sendFifoCmds+0x52>
e18: e3 2f mov r30, r19
e1a: ff 27 eor r31, r31
e1c: ee 0f add r30, r30
e1e: ff 1f adc r31, r31
e20: ec 52 subi r30, 0x2C ; 44
e22: fd 4f sbci r31, 0xFD ; 253
e24: 91 81 ldd r25, Z+1 ; 0x01
e26: 20 81 ld r18, Z
e28: 83 2f mov r24, r19
e2a: 8f 5f subi r24, 0xFF ; 255
e2c: 87 70 andi r24, 0x07 ; 7
e2e: 80 93 0b 01 sts 0x010B, r24
e32: 9a 83 std Y+2, r25 ; 0x02
e34: 29 83 std Y+1, r18 ; 0x01
e36: 42 e0 ldi r20, 0x02 ; 2
e38: b8 01 movw r22, r16
e3a: 80 e6 ldi r24, 0x60 ; 96
e3c: c5 de rcall .-630 ; 0xbc8 <I2CInt_writeData>
e3e: 84 e6 ldi r24, 0x64 ; 100
e40: 90 e0 ldi r25, 0x00 ; 0
e42: 25 d0 rcall .+74 ; 0xe8e <Utility_delay>
e44: f7 de rcall .-530 ; 0xc34 <I2CInt_isI2cBusy>
e46: 81 30 cpi r24, 0x01 ; 1
e48: e9 f3 breq .-6 ; 0xe44 <CamConfig_sendFifoCmds+0x4c>
e4a: 30 91 0b 01 lds r19, 0x010B
e4e: 80 91 0a 01 lds r24, 0x010A
e52: 83 17 cp r24, r19
e54: 09 f7 brne .-62 ; 0xe18 <CamConfig_sendFifoCmds+0x20>
e56: 22 96 adiw r28, 0x02 ; 2
e58: 0f b6 in r0, 0x3f ; 63
e5a: f8 94 cli
e5c: de bf out 0x3e, r29 ; 62
e5e: 0f be out 0x3f, r0 ; 63
e60: cd bf out 0x3d, r28 ; 61
e62: df 91 pop r29
e64: cf 91 pop r28
e66: 1f 91 pop r17
e68: 0f 91 pop r16
e6a: 08 95 ret
00000e6c <CamConfig_init>:
e6c: 60 e2 ldi r22, 0x20 ; 32
e6e: 84 e1 ldi r24, 0x14 ; 20
e70: be df rcall .-132 ; 0xdee <CamConfig_setCamReg>
e72: 60 e4 ldi r22, 0x40 ; 64
e74: 89 e3 ldi r24, 0x39 ; 57
e76: bb df rcall .-138 ; 0xdee <CamConfig_setCamReg>
e78: 68 e2 ldi r22, 0x28 ; 40
e7a: 82 e1 ldi r24, 0x12 ; 18
e7c: b8 df rcall .-144 ; 0xdee <CamConfig_setCamReg>
e7e: 65 e0 ldi r22, 0x05 ; 5
e80: 88 e2 ldi r24, 0x28 ; 40
e82: b5 df rcall .-150 ; 0xdee <CamConfig_setCamReg>
e84: 61 e0 ldi r22, 0x01 ; 1
e86: 83 e1 ldi r24, 0x13 ; 19
e88: b2 df rcall .-156 ; 0xdee <CamConfig_setCamReg>
e8a: b6 df rcall .-148 ; 0xdf8 <CamConfig_sendFifoCmds>
e8c: 08 95 ret
00000e8e <Utility_delay>:
e8e: cf 93 push r28
e90: df 93 push r29
e92: cd b7 in r28, 0x3d ; 61
e94: de b7 in r29, 0x3e ; 62
e96: 24 97 sbiw r28, 0x04 ; 4
e98: 0f b6 in r0, 0x3f ; 63
e9a: f8 94 cli
e9c: de bf out 0x3e, r29 ; 62
e9e: 0f be out 0x3f, r0 ; 63
ea0: cd bf out 0x3d, r28 ; 61
ea2: 9c 01 movw r18, r24
ea4: 1a 82 std Y+2, r1 ; 0x02
ea6: 19 82 std Y+1, r1 ; 0x01
ea8: 1c 82 std Y+4, r1 ; 0x04
eaa: 1b 82 std Y+3, r1 ; 0x03
eac: 1a 82 std Y+2, r1 ; 0x02
eae: 19 82 std Y+1, r1 ; 0x01
eb0: 89 81 ldd r24, Y+1 ; 0x01
eb2: 9a 81 ldd r25, Y+2 ; 0x02
eb4: 82 17 cp r24, r18
eb6: 93 07 cpc r25, r19
eb8: e0 f4 brcc .+56 ; 0xef2 <Utility_delay+0x64>
eba: 1c 82 std Y+4, r1 ; 0x04
ebc: 1b 82 std Y+3, r1 ; 0x03
ebe: 8b 81 ldd r24, Y+3 ; 0x03
ec0: 9c 81 ldd r25, Y+4 ; 0x04
ec2: 88 5e subi r24, 0xE8 ; 232
ec4: 93 40 sbci r25, 0x03 ; 3
ec6: 58 f4 brcc .+22 ; 0xede <Utility_delay+0x50>
ec8: 00 00 nop
eca: 8b 81 ldd r24, Y+3 ; 0x03
ecc: 9c 81 ldd r25, Y+4 ; 0x04
ece: 01 96 adiw r24, 0x01 ; 1
ed0: 9c 83 std Y+4, r25 ; 0x04
ed2: 8b 83 std Y+3, r24 ; 0x03
ed4: 8b 81 ldd r24, Y+3 ; 0x03
ed6: 9c 81 ldd r25, Y+4 ; 0x04
ed8: 88 5e subi r24, 0xE8 ; 232
eda: 93 40 sbci r25, 0x03 ; 3
edc: a8 f3 brcs .-22 ; 0xec8 <Utility_delay+0x3a>
ede: 89 81 ldd r24, Y+1 ; 0x01
ee0: 9a 81 ldd r25, Y+2 ; 0x02
ee2: 01 96 adiw r24, 0x01 ; 1
ee4: 9a 83 std Y+2, r25 ; 0x02
ee6: 89 83 std Y+1, r24 ; 0x01
ee8: 89 81 ldd r24, Y+1 ; 0x01
eea: 9a 81 ldd r25, Y+2 ; 0x02
eec: 82 17 cp r24, r18
eee: 93 07 cpc r25, r19
ef0: 20 f3 brcs .-56 ; 0xeba <Utility_delay+0x2c>
ef2: 24 96 adiw r28, 0x04 ; 4
ef4: 0f b6 in r0, 0x3f ; 63
ef6: f8 94 cli
ef8: de bf out 0x3e, r29 ; 62
efa: 0f be out 0x3f, r0 ; 63
efc: cd bf out 0x3d, r28 ; 61
efe: df 91 pop r29
f00: cf 91 pop r28
f02: 08 95 ret
00000f04 <DebugInt_init>:
f04: 8e 9a sbi 0x11, 6 ; 17
f06: 96 9a sbi 0x12, 6 ; 18
f08: 84 ef ldi r24, 0xF4 ; 244
f0a: 91 e0 ldi r25, 0x01 ; 1
f0c: c0 df rcall .-128 ; 0xe8e <Utility_delay>
f0e: 96 98 cbi 0x12, 6 ; 18
f10: 84 ef ldi r24, 0xF4 ; 244
f12: 91 e0 ldi r25, 0x01 ; 1
f14: bc df rcall .-136 ; 0xe8e <Utility_delay>
f16: 96 9a sbi 0x12, 6 ; 18
f18: 84 ef ldi r24, 0xF4 ; 244
f1a: 91 e0 ldi r25, 0x01 ; 1
f1c: b8 df rcall .-144 ; 0xe8e <Utility_delay>
f1e: 96 98 cbi 0x12, 6 ; 18
f20: 84 ef ldi r24, 0xF4 ; 244
f22: 91 e0 ldi r25, 0x01 ; 1
f24: b4 df rcall .-152 ; 0xe8e <Utility_delay>
f26: 96 9a sbi 0x12, 6 ; 18
f28: 84 ef ldi r24, 0xF4 ; 244
f2a: 91 e0 ldi r25, 0x01 ; 1
f2c: b0 df rcall .-160 ; 0xe8e <Utility_delay>
f2e: 96 98 cbi 0x12, 6 ; 18
f30: 84 ef ldi r24, 0xF4 ; 244
f32: 91 e0 ldi r25, 0x01 ; 1
f34: ac df rcall .-168 ; 0xe8e <Utility_delay>
f36: 96 9a sbi 0x12, 6 ; 18
f38: 08 95 ret
00000f3a <CamIntAsm_waitForNewTrackingFrame>:
; set, and the function will return.
;*****************************************************************
CamIntAsm_waitForNewTrackingFrame:
sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
f3a: 96 9a sbi 0x12, 6 ; 18
cbi _SFR_IO_ADDR(PORTD),PD6
f3c: 96 98 cbi 0x12, 6 ; 18
sleep
f3e: 88 95 sleep
00000f40 <CamIntAsm_acquireTrackingLine>:
;*****************************************************************
; REMEMBER...everything from here on out is critically timed to be
; synchronized with the flow of pixel data from the camera...
;*****************************************************************
CamIntAsm_acquireTrackingLine:
brts _cleanUp
f40: e6 f1 brts .+120 ; 0xfba <_cleanUp>
;sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
;cbi _SFR_IO_ADDR(PORTD),PD6
in tmp1,_SFR_IO_ADDR(TCCR1B) ; Enable the PCLK line to actually
f42: 3e b5 in r19, 0x2e ; 46
ori tmp1, 0x07 ; feed Timer1
f44: 37 60 ori r19, 0x07 ; 7
out _SFR_IO_ADDR(TCCR1B),tmp1
f46: 3e bd out 0x2e, r19 ; 46
; The line is about to start...
ldi pixelCount,0 ; Initialize the RLE stats...
f48: 00 e0 ldi r16, 0x00 ; 0
ldi pixelRunStart,PIXEL_RUN_START_INITIAL ; Remember, we always calculate
f4a: 10 e5 ldi r17, 0x50 ; 80
; the pixel run length as
; TCNT1L - pixelRunStart
ldi lastColor,0x00 ; clear out the last color before we start
f4c: 20 e0 ldi r18, 0x00 ; 0
mov XH,currLineBuffHigh ; Load the pointer to the current line
f4e: b9 2f mov r27, r25
mov XL,currLineBuffLow ; buffer into the X pointer regs
f50: a8 2f mov r26, r24
mov ZH,colorMapHigh ; Load the pointers to the membership
f52: f7 2f mov r31, r23
mov ZL,colorMapLow ; lookup tables (ZL and YL will be overwritten
f54: e6 2f mov r30, r22
mov YH,colorMapHigh ; as soon as we start reading data) to Z and Y
f56: d7 2f mov r29, r23
in tmp1, _SFR_IO_ADDR(TIMSK) ; enable TIMER1 to start counting
f58: 39 b7 in r19, 0x39 ; 57
ori tmp1, ENABLE_PCLK_TIMER1_OVERFLOW_BITMASK ; external PCLK pulses and interrupt on
f5a: 34 60 ori r19, 0x04 ; 4
out _SFR_IO_ADDR(TIMSK),tmp1 ; overflow
f5c: 39 bf out 0x39, r19 ; 57
ldi tmp1,PIXEL_RUN_START_INITIAL ; set up the TCNT1 to overflow (and
f5e: 30 e5 ldi r19, 0x50 ; 80
ldi tmp2,0xFF ; interrupts) after 176 pixels
f60: 4f ef ldi r20, 0xFF ; 255
out _SFR_IO_ADDR(TCNT1H),tmp2
f62: 4d bd out 0x2d, r20 ; 45
out _SFR_IO_ADDR(TCNT1L),tmp1
f64: 3c bd out 0x2c, r19 ; 44
mov YL,colorMapLow
f66: c6 2f mov r28, r22
in tmp1, _SFR_IO_ADDR(GICR) ; enable the HREF interrupt...remember, we
f68: 3b b7 in r19, 0x3b ; 59
; only use this interrupt to synchronize
; the beginning of the line
ori tmp1, HREF_INTERRUPT_ENABLE_MASK
f6a: 30 68 ori r19, 0x80 ; 128
out _SFR_IO_ADDR(GICR), tmp1
f6c: 3b bf out 0x3b, r19 ; 59
00000f6e <_trackFrame>:
;*******************************************************************************************
; Track Frame handler
;*******************************************************************************************
_trackFrame:
sbi _SFR_IO_ADDR(PORTD),PD6
f6e: 96 9a sbi 0x12, 6 ; 18
sleep ; ...And we wait...
f70: 88 95 sleep
; Returning from the interrupt/sleep wakeup will consume
; 14 clock cycles (7 to wakeup from idle sleep, 3 to vector, and 4 to return)
; Disable the HREF interrupt
cbi _SFR_IO_ADDR(PORTD),PD6
f72: 96 98 cbi 0x12, 6 ; 18
in tmp1, _SFR_IO_ADDR(GICR)
f74: 3b b7 in r19, 0x3b ; 59
andi tmp1, HREF_INTERRUPT_DISABLE_MASK
f76: 3f 77 andi r19, 0x7F ; 127
out _SFR_IO_ADDR(GICR), tmp1
f78: 3b bf out 0x3b, r19 ; 59
; A couple of NOPs are needed here to sync up the pixel data...the number (2)
; of NOPs was determined emperically by trial and error.
nop
f7a: 00 00 nop
...
00000f7e <_acquirePixelBlock>:
nop
_acquirePixelBlock: ; Clock Cycle Count
in ZL,RB_PORT ; sample the red value (PINB) (1)
f7e: e6 b3 in r30, 0x16 ; 22
in YL,G_PORT ; sample the green value (PINC) (1)
f80: c3 b3 in r28, 0x13 ; 19
andi YL,0x0F ; clear the high nibble (1)
f82: cf 70 andi r28, 0x0F ; 15
ldd color,Z+RED_MEM_OFFSET ; lookup the red membership (2)
f84: 30 81 ld r19, Z
in ZL,RB_PORT ; sample the blue value (PINB) (1)
f86: e6 b3 in r30, 0x16 ; 22
ldd greenData,Y+GREEN_MEM_OFFSET; lookup the green membership (2)
f88: 48 89 ldd r20, Y+16 ; 0x10
ldd blueData,Z+BLUE_MEM_OFFSET ; lookup the blue membership (2)
f8a: 50 a1 ldd r21, Z+32 ; 0x20
and color,greenData ; mask memberships together (1)
f8c: 34 23 and r19, r20
and color,blueData ; to produce the final color (1)
f8e: 35 23 and r19, r21
brts _cleanUpTrackingLine ; if some interrupt routine has (1...not set)
f90: 76 f0 brts .+28 ; 0xfae <_cleanUpTrackingLine>
; come in and set our T flag in
; SREG, then we need to hop out
; and blow away this frames data (common cleanup)
cp color,lastColor ; check to see if the run continues (1)
f92: 32 17 cp r19, r18
breq _acquirePixelBlock ; (2...equal)
f94: a1 f3 breq .-24 ; 0xf7e <_acquirePixelBlock>
; ___________
; 16 clock cycles
; (16 clock cycles = 1 uS = 1 pixelBlock time)
; Toggle the debug line to indicate a color change
sbi _SFR_IO_ADDR(PORTD),PD6
f96: 96 9a sbi 0x12, 6 ; 18
nop
f98: 00 00 nop
cbi _SFR_IO_ADDR(PORTD),PD6
f9a: 96 98 cbi 0x12, 6 ; 18
mov tmp2,pixelRunStart ; get the count value of the
f9c: 41 2f mov r20, r17
; current pixel run
in pixelCount,_SFR_IO_ADDR(TCNT1L) ; get the current TCNT1 value
f9e: 0c b5 in r16, 0x2c ; 44
mov pixelRunStart,pixelCount ; reload pixelRunStart for the
fa0: 10 2f mov r17, r16
; next run
sub pixelCount,tmp2 ; pixelCount = TCNT1L - pixelRunStart
fa2: 04 1b sub r16, r20
st X+,lastColor ; record the color run in the current line buffer
fa4: 2d 93 st X+, r18
st X+,pixelCount ; with its length
fa6: 0d 93 st X+, r16
mov lastColor,color ; set lastColor so we can figure out when it changes
fa8: 23 2f mov r18, r19
nop ; waste one more cycle for a total of 16
faa: 00 00 nop
rjmp _acquirePixelBlock
fac: e8 cf rjmp .-48 ; 0xf7e <_acquirePixelBlock>
00000fae <_cleanUpTrackingLine>:
; _cleanUpTrackingLine is used to write the last run length block off to the currentLineBuffer so
; that all 176 pixels in the line are accounted for.
_cleanUpTrackingLine:
ldi pixelCount,0xFF ; the length of the last run is ALWAYS 0xFF minus the last
fae: 0f ef ldi r16, 0xFF ; 255
sub pixelCount,pixelRunStart ; pixelRunStart
fb0: 01 1b sub r16, r17
inc pixelCount ; increment pixelCount since we actually need to account
fb2: 03 95 inc r16
; for the overflow of TCNT1
st X+,color ; record the color run in the current line buffer
fb4: 3d 93 st X+, r19
st X,pixelCount
fb6: 0c 93 st X, r16
rjmp _cleanUp
fb8: 00 c0 rjmp .+0 ; 0xfba <_cleanUp>
00000fba <_cleanUp>:
_cleanUpDumpLine:
; NOTE: If serial data is received, to interrupt the tracking of a line, we'll
; get a EV_SERIAL_DATA_RECEIVED event, and the T bit set so we will end the
; line's processing...however, the PCLK will keep on ticking for the rest of
; the frame/line, which will cause the TCNT to eventually overflow and
; interrupt us, generating a EV_ACQUIRE_LINE_COMPLETE event. We don't want
; this, so we need to actually turn off the PCLK counting each time we exit
; this loop, and only turn it on when we begin acquiring lines....
; NOT NEEDED FOR NOW...
;in tmp1, _SFR_IO_ADDR(TIMSK) ; disable TIMER1 to stop counting
;andi tmp1, DISABLE_PCLK_TIMER1_OVERFLOW_BITMASK ; external PCLK pulses
;out _SFR_IO_ADDR(TIMSK),tmp1
_cleanUp:
; Disable the external clocking of the Timer1 counter
in tmp1, _SFR_IO_ADDR(TCCR1B)
fba: 3e b5 in r19, 0x2e ; 46
andi tmp1, 0xF8
fbc: 38 7f andi r19, 0xF8 ; 248
out _SFR_IO_ADDR(TCCR1B),tmp1
fbe: 3e bd out 0x2e, r19 ; 46
; Toggle the debug line to indicate the line is complete
sbi _SFR_IO_ADDR(PORTD),PD6
fc0: 96 9a sbi 0x12, 6 ; 18
cbi _SFR_IO_ADDR(PORTD),PD6
fc2: 96 98 cbi 0x12, 6 ; 18
clt ; clear out the T bit since we have detected
fc4: e8 94 clt
00000fc6 <_exit>:
; the interruption and are exiting to handle it
_exit:
ret
fc6: 08 95 ret
00000fc8 <CamIntAsm_waitForNewDumpFrame>:
;*****************************************************************
; Function Name: CamIntAsm_waitForNewDumpFrame
; Function Description: This function is responsible for
; going to sleep until a new frame begins (indicated by
; VSYNC transitioning from low to high. This will wake
; the "VSYNC sleep" up and allow it to continue with
; acquiring a line of pixel data to dump out to the UI.
; Inputs: r25 - MSB of currentLineBuffer
; r24 - LSB of currentLineBuffer
; r23 - MSB of prevLineBuffer
; r22 - LSB of prevLineBuffer
; Outputs: none
; NOTES: This function doesn't really return...it sorta just
; floats into the acquireDumpLine function after the "VSYNC sleep"
; is awoken.
;*****************************************************************
CamIntAsm_waitForNewDumpFrame:
sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
fc8: 96 9a sbi 0x12, 6 ; 18
cbi _SFR_IO_ADDR(PORTD),PD6
fca: 96 98 cbi 0x12, 6 ; 18
sleep
fcc: 88 95 sleep
00000fce <CamIntAsm_acquireDumpLine>:
;*****************************************************************
; REMEMBER...everything from here on out is critically timed to be
; synchronized with the flow of pixel data from the camera...
;*****************************************************************
CamIntAsm_acquireDumpLine:
brts _cleanUp
fce: ae f3 brts .-22 ; 0xfba <_cleanUp>
;sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
;cbi _SFR_IO_ADDR(PORTD),PD6
mov XH,currLineBuffHigh ; Load the pointer to the current line
fd0: b9 2f mov r27, r25
mov XL,currLineBuffLow ; buffer into the X pointer regs
fd2: a8 2f mov r26, r24
mov YH,prevLineBuffHigh ; Load the pointer to the previous line
fd4: d7 2f mov r29, r23
mov YL,prevLineBuffLow ; buffer into the Y pointer regs
fd6: c6 2f mov r28, r22
ldi tmp1,PIXEL_RUN_START_INITIAL ; set up the TCNT1 to overflow (and
fd8: 30 e5 ldi r19, 0x50 ; 80
ldi tmp2,0xFF ; interrupts) after 176 pixels
fda: 4f ef ldi r20, 0xFF ; 255
out _SFR_IO_ADDR(TCNT1H),tmp2
fdc: 4d bd out 0x2d, r20 ; 45
out _SFR_IO_ADDR(TCNT1L),tmp1
fde: 3c bd out 0x2c, r19 ; 44
in tmp1, _SFR_IO_ADDR(TCCR1B) ; Enable the PCLK line to actually
fe0: 3e b5 in r19, 0x2e ; 46
ori tmp1, 0x07 ; feed Timer1
fe2: 37 60 ori r19, 0x07 ; 7
out _SFR_IO_ADDR(TCCR1B),tmp1
fe4: 3e bd out 0x2e, r19 ; 46
nop
fe6: 00 00 nop
in tmp1, _SFR_IO_ADDR(TIMSK) ; enable TIMER1 to start counting
fe8: 39 b7 in r19, 0x39 ; 57
ori tmp1, ENABLE_PCLK_TIMER1_OVERFLOW_BITMASK ; external PCLK pulses and interrupt on
fea: 34 60 ori r19, 0x04 ; 4
out _SFR_IO_ADDR(TIMSK),tmp1 ; overflow
fec: 39 bf out 0x39, r19 ; 57
in tmp1, _SFR_IO_ADDR(GICR) ; enable the HREF interrupt...remember, we
fee: 3b b7 in r19, 0x3b ; 59
; only use this interrupt to synchronize
; the beginning of the line
ori tmp1, HREF_INTERRUPT_ENABLE_MASK
ff0: 30 68 ori r19, 0x80 ; 128
out _SFR_IO_ADDR(GICR), tmp1
ff2: 3b bf out 0x3b, r19 ; 59
00000ff4 <_dumpFrame>:
;*******************************************************************************************
; Dump Frame handler
;*******************************************************************************************
_dumpFrame:
sbi _SFR_IO_ADDR(PORTD),PD6
ff4: 96 9a sbi 0x12, 6 ; 18
sleep ; ...And we wait...
ff6: 88 95 sleep
cbi _SFR_IO_ADDR(PORTD),PD6
ff8: 96 98 cbi 0x12, 6 ; 18
in tmp1, _SFR_IO_ADDR(GICR) ; disable the HREF interrupt
ffa: 3b b7 in r19, 0x3b ; 59
andi tmp1, HREF_INTERRUPT_DISABLE_MASK ; so we don't get interrupted
ffc: 3f 77 andi r19, 0x7F ; 127
out _SFR_IO_ADDR(GICR), tmp1 ; while dumping the line
ffe: 3b bf out 0x3b, r19 ; 59
...
00001002 <_sampleDumpPixel>:
nop ; Remember...if we ever remove the "cbi" instruction above,
; we need to add two more NOPs to cover this
; Ok...the following loop needs to run in 8 clock cycles, so we can get every
; pixel in the line...this shouldn't be a problem, since the PCLK timing was
; reduced by a factor of 2 whenever we go to dump a line (this is to give us
; enough time to do the sampling and storing of the pixel data). In addition,
; it is assumed that we will have to do some minor processing on the data right
; before we send it out, like mask off the top 4-bits of each, and then pack both
; low nibbles into a single byte for transmission...we just don't have time to
; do that here (only 8 instruction cycles :-) )
_sampleDumpPixel:
in tmp1,G_PORT ; sample the G value (1)
1002: 33 b3 in r19, 0x13 ; 19
in tmp2,RB_PORT ; sample the R/B value (1)
1004: 46 b3 in r20, 0x16 ; 22
st X+,tmp1 ; store to the currLineBuff and inc ptrs(2)
1006: 3d 93 st X+, r19
st Y+,tmp2 ; store to the prevLineBuff and inc ptrs(2)
1008: 49 93 st Y+, r20
brtc _sampleDumpPixel ; loop back unless flag is set (2...if not set)
100a: de f7 brtc .-10 ; 0x1002 <_sampleDumpPixel>
; ___________
; 8 cycles normally
; if we make it here, it means the T flag is set, and we must have been interrupted
; so we need to exit (what if we were interrupted for serial? should we disable it?)
rjmp _cleanUpDumpLine
100c: d6 cf rjmp .-84 ; 0xfba <_cleanUp>
0000100e <__vector_1>:
;***********************************************************
; Function Name: <interrupt handler for External Interrupt0>
; Function Description: This function is responsible
; for handling a rising edge on the Ext Interrupt 0. This
; routine simply returns, since we just want to wake up
; whenever the VSYNC transitions (meaning the start of a new
; frame).
; Inputs: none
; Outputs: none
;***********************************************************
SIG_INTERRUPT0:
; This will wake us up when VSYNC transitions high...we just want to return
reti
100e: 18 95 reti
00001010 <__vector_2>:
;***********************************************************
; Function Name: <interrupt handler for External Interrupt1>
; Function Description: This function is responsible
; for handling a falling edge on the Ext Interrupt 1. This
; routine simply returns, since we just want to wake up
; whenever the HREF transitions (meaning the pixels
; are starting after VSYNC transitioned, and we need to
; start acquiring the pixel blocks
; Inputs: none
; Outputs: none
;***********************************************************
SIG_INTERRUPT1:
; This will wake us up when HREF transitions high...we just want to return
reti
1010: 18 95 reti
00001012 <__vector_8>:
;***********************************************************
; Function Name: <interrupt handler for Timer0 overflow>
; Function Description: This function is responsible
; for handling the Timer0 overflow (hooked up to indicate
; when we have reached the number of HREFs required in a
; single frame). We set the T flag in the SREG to
; indicate to the _acquirePixelBlock routine that it needs
; to exit, and then set the appropriate action to take in
; the eventList of the Executive module.
; Inputs: none
; Outputs: none
; Note: Originally, the HREF pulses were also going to
; be counted by a hardware counter, but it didn't end up
; being necessary
;***********************************************************
;SIG_OVERFLOW0:
; set ; set the T bit in SREG
; lds tmp1,eventBitmask
; ori tmp1,EV_ACQUIRE_FRAME_COMPLETE
; sts eventBitmask,tmp1
; reti
;***********************************************************
; Function Name: <interrupt handler for Timer1 overflow>
; Function Description: This function is responsible
; for handling the Timer1 overflow (hooked up to indicate
; when we have reached the end of a line of pixel data,
; since PCLK is hooked up to overflow TCNT1 after 176
; pixels). This routine generates an acquire line complete
; event in the fastEventBitmask, which is streamlined for
; efficiency reasons.
;***********************************************************
SIG_OVERFLOW1:
lds tmp1,fastEventBitmask ; set a flag indicating
1012: 30 91 72 00 lds r19, 0x0072
ori tmp1,FEV_ACQUIRE_LINE_COMPLETE ; a line is complete
1016: 31 60 ori r19, 0x01 ; 1
sts fastEventBitmask,tmp1
1018: 30 93 72 00 sts 0x0072, r19
set ; set the T bit in SREG
101c: 68 94 set
;sbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
;cbi _SFR_IO_ADDR(PORTD),PD6 ; For testing...
reti
101e: 18 95 reti
00001020 <__vector_default>:
; This is the default handler for all interrupts that don't
; have handler routines specified for them.
.global __vector_default
__vector_default:
reti
1020: 18 95 reti
00001022 <atoi>:
1022: fc 01 movw r30, r24
1024: 88 27 eor r24, r24
1026: 99 27 eor r25, r25
1028: e8 94 clt
102a: 21 91 ld r18, Z+
102c: 22 23 and r18, r18
102e: e9 f0 breq .+58 ; 0x106a <atoi+0x48>
1030: 20 32 cpi r18, 0x20 ; 32
1032: d9 f3 breq .-10 ; 0x102a <atoi+0x8>
1034: 29 30 cpi r18, 0x09 ; 9
1036: c9 f3 breq .-14 ; 0x102a <atoi+0x8>
1038: 2a 30 cpi r18, 0x0A ; 10
103a: b9 f3 breq .-18 ; 0x102a <atoi+0x8>
103c: 2c 30 cpi r18, 0x0C ; 12
103e: a9 f3 breq .-22 ; 0x102a <atoi+0x8>
1040: 2d 30 cpi r18, 0x0D ; 13
1042: 99 f3 breq .-26 ; 0x102a <atoi+0x8>
1044: 26 37 cpi r18, 0x76 ; 118
1046: 89 f3 breq .-30 ; 0x102a <atoi+0x8>
1048: 2b 32 cpi r18, 0x2B ; 43
104a: 19 f0 breq .+6 ; 0x1052 <atoi+0x30>
104c: 2d 32 cpi r18, 0x2D ; 45
104e: 21 f4 brne .+8 ; 0x1058 <atoi+0x36>
1050: 68 94 set
1052: 21 91 ld r18, Z+
1054: 22 23 and r18, r18
1056: 49 f0 breq .+18 ; 0x106a <atoi+0x48>
1058: 20 33 cpi r18, 0x30 ; 48
105a: 3c f0 brlt .+14 ; 0x106a <atoi+0x48>
105c: 2a 33 cpi r18, 0x3A ; 58
105e: 2c f4 brge .+10 ; 0x106a <atoi+0x48>
1060: 20 53 subi r18, 0x30 ; 48
1062: 0b d0 rcall .+22 ; 0x107a <__mulhi_const_10>
1064: 82 0f add r24, r18
1066: 91 1d adc r25, r1
1068: f4 cf rjmp .-24 ; 0x1052 <atoi+0x30>
106a: 81 15 cp r24, r1
106c: 91 05 cpc r25, r1
106e: 21 f0 breq .+8 ; 0x1078 <atoi+0x56>
1070: 1e f4 brtc .+6 ; 0x1078 <atoi+0x56>
1072: 80 95 com r24
1074: 90 95 com r25
1076: 01 96 adiw r24, 0x01 ; 1
1078: 08 95 ret
0000107a <__mulhi_const_10>:
107a: 7a e0 ldi r23, 0x0A ; 10
107c: 97 9f mul r25, r23
107e: 90 2d mov r25, r0
1080: 87 9f mul r24, r23
1082: 80 2d mov r24, r0
1084: 91 0d add r25, r1
1086: 11 24 eor r1, r1
1088: 08 95 ret
0000108a <__eeprom_read_byte_1C1D1E>:
108a: e1 99 sbic 0x1c, 1 ; 28
108c: fe cf rjmp .-4 ; 0x108a <__eeprom_read_byte_1C1D1E>
108e: bf bb out 0x1f, r27 ; 31
1090: ae bb out 0x1e, r26 ; 30
1092: e0 9a sbi 0x1c, 0 ; 28
1094: 11 96 adiw r26, 0x01 ; 1
1096: 0d b2 in r0, 0x1d ; 29
1098: 08 95 ret
0000109a <__eeprom_read_block_1C1D1E>:
109a: f7 df rcall .-18 ; 0x108a <__eeprom_read_byte_1C1D1E>
109c: 01 92 st Z+, r0
109e: 1a 94 dec r1
10a0: e1 f7 brne .-8 ; 0x109a <__eeprom_read_block_1C1D1E>
10a2: 08 95 ret
000010a4 <__eeprom_write_byte_1C1D1E>:
10a4: e1 99 sbic 0x1c, 1 ; 28
10a6: fe cf rjmp .-4 ; 0x10a4 <__eeprom_write_byte_1C1D1E>
10a8: bf bb out 0x1f, r27 ; 31
10aa: ae bb out 0x1e, r26 ; 30
10ac: 0d ba out 0x1d, r0 ; 29
10ae: 11 96 adiw r26, 0x01 ; 1
10b0: 0f b6 in r0, 0x3f ; 63
10b2: f8 94 cli
10b4: e2 9a sbi 0x1c, 2 ; 28
10b6: e1 9a sbi 0x1c, 1 ; 28
10b8: 0f be out 0x3f, r0 ; 63
10ba: 08 95 ret
000010bc <_exit>:
10bc: ff cf rjmp .-2 ; 0x10bc <_exit>