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Ignore whitespace Rev 349 → Rev 350

/schemata/mereni/VLF/SIM/receiver-PSpiceFiles/SCHEMATIC1/test/test.out
0,0 → 1,154
**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
 
** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]
 
 
**** CIRCUIT DESCRIPTION
 
 
******************************************************************************
 
 
 
 
** Creating circuit file "test.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
 
*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of C:\OrCAD\OrCAD_10.5_Demo\tools\PSpice\PSpice.ini file:
.lib "nom.lib"
 
*Analysis directives:
.AC LIN 5000 10000 30000
.PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"
 
 
 
**** INCLUDING SCHEMATIC1.net ****
* source RECEIVER
C_C1 0 N03478 15nF
V_V2 N03432 0 DC 0Vdc AC 1Vac
R_R1 0 N03490 100
E_U1 N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718
+ N03634 1G
 
R_R4 N03718 N03462 6.8k
R_R5 0 N03718 6.8k
C_C5 N03478 N03718 100nF
C_C2 N03518 N03510 1n
R_R6 N03774 N03782 20k
R_R7 0 N03774 100000k
V_V1 N03462 0 12Vdc
R_R2 N03634 N03510 100k
L_L1 N03462 N03478 3900uH
C_C3 N03634 N03510 270pF
X_TX1 N03518 0 N03782 N03774 SCHEMATIC1_TX1
J_J1 N03478 N03432 N03490 JbreakN
C_C4 N03622 N03634 1nF
R_R3 0 N03622 10k
 
.subckt SCHEMATIC1_TX1 1 2 3 4
L1_TX1 1 2 1000
L2_TX1 3 4 1000
K_TX1 L1_TX1 L2_TX1 1 KRM8PL_3C8
.ends SCHEMATIC1_TX1
 
**** RESUMING test.cir ****
.END
**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
 
** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]
 
 
**** Junction FET MODEL PARAMETERS
 
 
******************************************************************************
 
 
 
 
JbreakN
NJF
VTO -2
BETA 100.000000E-06
 
**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
 
** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]
 
 
**** Ferromagnetic Core MODEL PARAMETERS
 
 
******************************************************************************
 
 
 
 
KRM8PL_3C8
LEVEL 2
AREA .63
PATH 3.84
MS 415.200000E+03
A 44.82
C .4112
K 25.74
 
**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
 
** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]
 
 
**** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C
 
 
******************************************************************************
 
 
 
NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
 
 
(N03432) 0.0000 (N03462) 12.0000 (N03478) 12.0000 (N03490) .0385
 
(N03510) 6.0000 (N03518) 0.0000 (N03622) 0.0000 (N03634) 6.0000
 
(N03718) 6.0000 (N03774) 0.0000 (N03782) 0.0000
 
 
 
 
VOLTAGE SOURCE CURRENTS
NAME CURRENT
 
V_V2 1.206E-11
V_V1 -1.267E-03
 
TOTAL POWER DISSIPATION 1.52E-02 WATTS
 
 
 
JOB CONCLUDED
**** 08/21/07 15:28:32 ************** PSpice Lite (Jan 2005) *****************
 
** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]
 
 
**** JOB STATISTICS SUMMARY
 
 
******************************************************************************
 
 
 
Total job time (using Solver 1) = .89