| 0,0 → 1,64 |
|---|
| |
| **** 08/21/07 14:53:51 ************** PSpice Lite (Jan 2005) ***************** |
| |
| ** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ] |
| |
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| **** CIRCUIT DESCRIPTION |
| |
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| ****************************************************************************** |
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| |
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| ** Creating circuit file "test.cir" |
| ** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS |
| |
| *Libraries: |
| * Profile Libraries : |
| * Local Libraries : |
| * From [PSPICE NETLIST] section of C:\OrCAD\OrCAD_10.5_Demo\tools\PSpice\PSpice.ini file: |
| .lib "nom.lib" |
| |
| *Analysis directives: |
| .AC LIN 7000 0 250000 |
| -------------$ |
| ERROR -- Invalid value |
| .PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) |
| .INC "..\SCHEMATIC1.net" |
| |
| |
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| **** INCLUDING SCHEMATIC1.net **** |
| * source RECEIVER |
| C_C1 0 N03478 22nF |
| V_V2 N03432 0 DC 0Vdc AC 1Vac |
| R_R1 0 N03490 10 |
| E_U1 N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718 |
| + N03634 1G |
| |
| R_R4 N03718 N03462 4.7k |
| R_R5 0 N03718 4.7k |
| C_C5 N03478 N03718 100nF |
| C_C2 N03518 N03510 1n |
| R_R6 N03774 N03782 10k |
| R_R7 0 N03774 100000k |
| V_V1 N03462 0 12Vdc |
| R_R2 N03634 N03510 100k |
| L_L1 N03462 N03478 3mH |
| C_C3 N03634 N03510 1n |
| X_TX1 N03518 0 N03782 N03774 SCHEMATIC1_TX1 |
| J_J1 N03478 N03432 N03490 JbreakN |
| C_C4 N03622 N03634 47nF |
| R_R3 0 N03622 10k |
| |
| .subckt SCHEMATIC1_TX1 1 2 3 4 |
| L1_TX1 1 2 100 |
| L2_TX1 3 4 100 |
| K_TX1 L1_TX1 L2_TX1 1 KRM8PL_3C8 |
| .ends SCHEMATIC1_TX1 |
| |
| **** RESUMING test.cir **** |
| .END |
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