Subversion Repositories svnkaklik

Rev

Rev 6 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log

Rev 6 Rev 410
1
ÀÄhack
1
ÀÄhack
2
   ÃÄmain  0/753  Ram=21
2
   ÃÄmain  0/753  Ram=21
3
   ³  ÃÄ??0??
3
   ³  ÃÄ??0??
4
   ³  ÃÄ@delay_ms1  0/24  Ram=1
4
   ³  ÃÄ@delay_ms1  0/24  Ram=1
5
   ³  ÃÄ@const11193  0/11  Ram=0
5
   ³  ÃÄ@const11193  0/11  Ram=0
6
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
6
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
7
   ³  ÃÄ@const290  0/15  Ram=0
7
   ³  ÃÄ@const290  0/15  Ram=0
8
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
8
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
9
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
9
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
10
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
10
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
11
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
11
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
12
   ³  ÃÄ@GETCH_1_  0/53  Ram=1
12
   ³  ÃÄ@GETCH_1_  0/53  Ram=1
13
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
13
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
14
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
14
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
15
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
15
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
16
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
16
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
17
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
17
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
18
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
18
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
19
   ³  ÃÄ@const11223  0/19  Ram=0
19
   ³  ÃÄ@const11223  0/19  Ram=0
20
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
20
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
21
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
21
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
22
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
22
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
23
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
23
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
24
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
24
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
25
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
25
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
26
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
26
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
27
   ³  ÃÄ@delay_ms1  0/24  Ram=1
27
   ³  ÃÄ@delay_ms1  0/24  Ram=1
28
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
28
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
29
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
29
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
30
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
30
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
31
   ³  ÃÄ@const11259  0/28  Ram=0
31
   ³  ÃÄ@const11259  0/28  Ram=0
32
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
32
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
33
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
33
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
34
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
34
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
35
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
35
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
36
   ³  ÃÄ@const11259  0/28  Ram=0
36
   ³  ÃÄ@const11259  0/28  Ram=0
37
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
37
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
38
   ³  ÃÄ@PRINTF_U_1200_51_50  0/78  Ram=2
38
   ³  ÃÄ@PRINTF_U_1200_51_50  0/78  Ram=2
39
   ³  ³  ÃÄ@DIV88  0/21  Ram=3
39
   ³  ³  ÃÄ@DIV88  0/21  Ram=3
40
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
40
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
41
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
41
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
42
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
42
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
43
   ³  ³  ÃÄ@DIV88  0/21  Ram=3
43
   ³  ³  ÃÄ@DIV88  0/21  Ram=3
44
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
44
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
45
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
45
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
46
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
46
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
47
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
47
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
48
   ³  ÃÄ@delay_ms1  0/24  Ram=1
48
   ³  ÃÄ@delay_ms1  0/24  Ram=1
49
   ³  ÃÄ@delay_ms1  0/24  Ram=1
49
   ³  ÃÄ@delay_ms1  0/24  Ram=1
50
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
50
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
51
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
51
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
52
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
52
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
53
   ³  ÃÄ@const11300  0/21  Ram=0
53
   ³  ÃÄ@const11300  0/21  Ram=0
54
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
54
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
55
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
55
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
56
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
56
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
57
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
57
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
58
   ³  ÃÄ@const11300  0/21  Ram=0
58
   ³  ÃÄ@const11300  0/21  Ram=0
59
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
59
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
60
   ³  ÃÄ@delay_ms1  0/24  Ram=1
60
   ³  ÃÄ@delay_ms1  0/24  Ram=1
61
   ³  ÃÄ@delay_ms1  0/24  Ram=1
61
   ³  ÃÄ@delay_ms1  0/24  Ram=1
62
   ³  ÃÄ@const290  0/15  Ram=0
62
   ³  ÃÄ@const290  0/15  Ram=0
63
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
63
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
64
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
64
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
65
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
65
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
66
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
66
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
67
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
67
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
68
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
68
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
69
   ³  ÃÄ@const11330  0/22  Ram=0
69
   ³  ÃÄ@const11330  0/22  Ram=0
70
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
70
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
71
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
71
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
72
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
72
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
73
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
73
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
74
   ³  ÃÄ@const11330  0/22  Ram=0
74
   ³  ÃÄ@const11330  0/22  Ram=0
75
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
75
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
76
   ³  ÃÄatol  0/256  Ram=11
76
   ³  ÃÄatol  0/256  Ram=11
77
   ³  ³  ÀÄ@MUL1616  0/22  Ram=5
77
   ³  ³  ÀÄ@MUL1616  0/22  Ram=5
78
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
78
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
79
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
79
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
80
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
80
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
81
   ³  ÃÄ@const11344  0/21  Ram=0
81
   ³  ÃÄ@const11344  0/21  Ram=0
82
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
82
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
83
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
83
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
84
   ³  ÃÄ@const11344  0/21  Ram=0
84
   ³  ÃÄ@const11344  0/21  Ram=0
85
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
85
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
86
   ³  ÃÄ@const11352  0/10  Ram=0
86
   ³  ÃÄ@const11352  0/10  Ram=0
87
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
87
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
88
   ³  ÃÄatol  0/256  Ram=11
88
   ³  ÃÄatol  0/256  Ram=11
89
   ³  ³  ÀÄ@MUL1616  0/22  Ram=5
89
   ³  ³  ÀÄ@MUL1616  0/22  Ram=5
90
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
90
   ³  ÃÄ@PRINTF_LU_1200_51_50  0/106  Ram=9
91
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
91
   ³  ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
92
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
92
   ³  ³  ÀÄ@PUTCHAR_1_  0/44  Ram=1
93
   ³  ÃÄ@const11365  0/14  Ram=0
93
   ³  ÃÄ@const11365  0/14  Ram=0
94
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
94
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
95
   ³  ÃÄ@const11352  0/10  Ram=0
95
   ³  ÃÄ@const11352  0/10  Ram=0
96
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
96
   ³  ÃÄ@PUTCHAR_1_  0/44  Ram=1
97
   ³  ÃÄ@delay_ms1  0/24  Ram=1
97
   ³  ÃÄ@delay_ms1  0/24  Ram=1
98
   ³  ÀÄ@delay_ms1  0/24  Ram=1
98
   ³  ÀÄ@delay_ms1  0/24  Ram=1
99
   ÃÄTIMER1_isr  0/3  Ram=0
99
   ÃÄTIMER1_isr  0/3  Ram=0
100
   ÀÄTIMER2_isr  0/3  Ram=0
100
   ÀÄTIMER2_isr  0/3  Ram=0