WebSVN – svnkaklik – Diff – /schemata/mereni/VLF/SIM/receiver-PSpiceFiles/SCHEMATIC1/test/test.out



**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
 
 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
 
 
 ****     CIRCUIT DESCRIPTION
 
 
******************************************************************************
 
 
 
 
** Creating circuit file "test.cir" 
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
 
*Libraries: 
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of C:\OrCAD\OrCAD_10.5_Demo\tools\PSpice\PSpice.ini file:
.lib "nom.lib" 
 
*Analysis directives: 
.AC LIN 5000 10000 30000
.PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) 
.INC "..\SCHEMATIC1.net" 
 
 
 
**** INCLUDING SCHEMATIC1.net ****
* source RECEIVER
C_C1         0 N03478  15nF  
V_V2         N03432 0 DC 0Vdc AC 0.001Vac 
R_R1         0 N03490  100  
E_U1         N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718
+  N03634 1G
 
R_R4         N03718 N03462  6.8k  
R_R5         0 N03718  6.8k  
C_C5         N03478 N03718  100nF  
C_C2         N03518 N03510  1n  
R_R6         N03774 N03782  20k  
R_R7         0 N03774  100000k  
V_V1         N03462 0 12Vdc
R_R2         N03634 N03510  100k  
L_L1         N03462 N03478  4900uH  
C_C3         N03634 N03510  100pF  
X_TX1    N03518 0 N03782 N03774 SCHEMATIC1_TX1 
J_J1         N03478 N03432 N03490 JbreakN 
C_C4         N03622 N03634  4.7nF  
R_R3         0 N03622  10k  
 
.subckt SCHEMATIC1_TX1 1 2 3 4  
L1_TX1         1 2 1000
L2_TX1         3 4 1000
K_TX1         L1_TX1 L2_TX1 1 KRM8PL_3C8
.ends SCHEMATIC1_TX1
 
**** RESUMING test.cir ****
.END

**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
 
 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
 
 
 ****     Junction FET MODEL PARAMETERS
 
 
******************************************************************************
 
 
 
 
               JbreakN         
               NJF             
         VTO   -2            
        BETA  100.000000E-06 
 

**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
 
 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
 
 
 ****     Ferromagnetic Core MODEL PARAMETERS
 
 
******************************************************************************
 
 
 
 
               KRM8PL_3C8      
       LEVEL    2            
        AREA     .63         
        PATH    3.84         
          MS  415.200000E+03 
           A   44.82         
           C     .4112       
           K   25.74         
 

**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
 
 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
 
 
 ****     SMALL SIGNAL BIAS SOLUTION       TEMPERATURE =   27.000 DEG C
 
 
******************************************************************************
 
 
 
 NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE     NODE   VOLTAGE
 
 
(N03432)    0.0000 (N03462)   12.0000 (N03478)   12.0000 (N03490)     .0385     
 
(N03510)    6.0000 (N03518)    0.0000 (N03622)    0.0000 (N03634)    6.0000     
 
(N03718)    6.0000 (N03774)    0.0000 (N03782)    0.0000 
 
 
 
 
    VOLTAGE SOURCE CURRENTS
    NAME         CURRENT
 
    V_V2         1.206E-11
    V_V1        -1.267E-03
 
    TOTAL POWER DISSIPATION   1.52E-02  WATTS
 
 
 
          JOB CONCLUDED

**** 08/23/07 17:58:38 ************** PSpice Lite (Jan 2005) *****************
 
 ** Profile: "SCHEMATIC1-test"  [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ] 
 
 
 ****     JOB STATISTICS SUMMARY
 
 
******************************************************************************
 
 
 
  Total job time (using Solver 1)   =         .82



Rev 350	Rev 352
1		1
2	`** 08/21/07 15:28:32 ********** PSpice Lite (Jan 2005) ***************`	2	`** 08/23/07 17:58:38 ********** PSpice Lite (Jan 2005) ***************`
3		3
4	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]`	4	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]`
5		5
6		6
7	`**** CIRCUIT DESCRIPTION`	7	`**** CIRCUIT DESCRIPTION`
8		8
9		9
10	`******************************************************************************`	10	`******************************************************************************`
11		11
12		12
13		13
14		14
15	`** Creating circuit file "test.cir"`	15	`** Creating circuit file "test.cir"`
16	`** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS`	16	`** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS`
17		17
18	`*Libraries:`	18	`*Libraries:`
19	`* Profile Libraries :`	19	`* Profile Libraries :`
20	`* Local Libraries :`	20	`* Local Libraries :`
21	`* From [PSPICE NETLIST] section of C:\OrCAD\OrCAD_10.5_Demo\tools\PSpice\PSpice.ini file:`	21	`* From [PSPICE NETLIST] section of C:\OrCAD\OrCAD_10.5_Demo\tools\PSpice\PSpice.ini file:`
22	`.lib "nom.lib"`	22	`.lib "nom.lib"`
23		23
24	`*Analysis directives:`	24	`*Analysis directives:`
25	`.AC LIN 5000 10000 30000`	25	`.AC LIN 5000 10000 30000`
26	`.PROBE V(alias()) I(alias()) W(alias()) D(alias()) NOISE(alias(*))`	26	`.PROBE V(alias()) I(alias()) W(alias()) D(alias()) NOISE(alias(*))`
27	`.INC "..\SCHEMATIC1.net"`	27	`.INC "..\SCHEMATIC1.net"`
28		28
29		29
30		30
31	`** INCLUDING SCHEMATIC1.net **`	31	`** INCLUDING SCHEMATIC1.net **`
32	`* source RECEIVER`	32	`* source RECEIVER`
33	`C_C1 0 N03478 15nF`	33	`C_C1 0 N03478 15nF`
34	`V_V2 N03432 0 DC 0Vdc AC 1Vac`	34	`V_V2 N03432 0 DC 0Vdc AC 0.001Vac`
35	`R_R1 0 N03490 100`	35	`R_R1 0 N03490 100`
36	`E_U1 N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718`	36	`E_U1 N03510 0 VALUE {LIMIT(V(N03718,N03634)*1E6,-15V,+15V)} _U1 N03718`
37	`+ N03634 1G`	37	`+ N03634 1G`
38		38
39	`R_R4 N03718 N03462 6.8k`	39	`R_R4 N03718 N03462 6.8k`
40	`R_R5 0 N03718 6.8k`	40	`R_R5 0 N03718 6.8k`
41	`C_C5 N03478 N03718 100nF`	41	`C_C5 N03478 N03718 100nF`
42	`C_C2 N03518 N03510 1n`	42	`C_C2 N03518 N03510 1n`
43	`R_R6 N03774 N03782 20k`	43	`R_R6 N03774 N03782 20k`
44	`R_R7 0 N03774 100000k`	44	`R_R7 0 N03774 100000k`
45	`V_V1 N03462 0 12Vdc`	45	`V_V1 N03462 0 12Vdc`
46	`R_R2 N03634 N03510 100k`	46	`R_R2 N03634 N03510 100k`
47	`L_L1 N03462 N03478 3900uH`	47	`L_L1 N03462 N03478 4900uH`
48	`C_C3 N03634 N03510 270pF`	48	`C_C3 N03634 N03510 100pF`
49	`X_TX1 N03518 0 N03782 N03774 SCHEMATIC1_TX1`	49	`X_TX1 N03518 0 N03782 N03774 SCHEMATIC1_TX1`
50	`J_J1 N03478 N03432 N03490 JbreakN`	50	`J_J1 N03478 N03432 N03490 JbreakN`
51	`C_C4 N03622 N03634 1nF`	51	`C_C4 N03622 N03634 4.7nF`
52	`R_R3 0 N03622 10k`	52	`R_R3 0 N03622 10k`
53		53
54	`.subckt SCHEMATIC1_TX1 1 2 3 4`	54	`.subckt SCHEMATIC1_TX1 1 2 3 4`
55	`L1_TX1 1 2 1000`	55	`L1_TX1 1 2 1000`
56	`L2_TX1 3 4 1000`	56	`L2_TX1 3 4 1000`
57	`K_TX1 L1_TX1 L2_TX1 1 KRM8PL_3C8`	57	`K_TX1 L1_TX1 L2_TX1 1 KRM8PL_3C8`
58	`.ends SCHEMATIC1_TX1`	58	`.ends SCHEMATIC1_TX1`
59		59
60	`** RESUMING test.cir **`	60	`** RESUMING test.cir **`
61	`.END`	61	`.END`
62		62
63	`** 08/21/07 15:28:32 ********** PSpice Lite (Jan 2005) ***************`	63	`** 08/23/07 17:58:38 ********** PSpice Lite (Jan 2005) ***************`
64		64
65	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]`	65	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]`
66		66
67		67
68	`**** Junction FET MODEL PARAMETERS`	68	`**** Junction FET MODEL PARAMETERS`
69		69
70		70
71	`******************************************************************************`	71	`******************************************************************************`
72		72
73		73
74		74
75		75
76	`JbreakN`	76	`JbreakN`
77	`NJF`	77	`NJF`
78	`VTO -2`	78	`VTO -2`
79	`BETA 100.000000E-06`	79	`BETA 100.000000E-06`
80		80
81		81
82	`** 08/21/07 15:28:32 ********** PSpice Lite (Jan 2005) ***************`	82	`** 08/23/07 17:58:38 ********** PSpice Lite (Jan 2005) ***************`
83		83
84	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]`	84	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]`
85		85
86		86
87	`**** Ferromagnetic Core MODEL PARAMETERS`	87	`**** Ferromagnetic Core MODEL PARAMETERS`
88		88
89		89
90	`******************************************************************************`	90	`******************************************************************************`
91		91
92		92
93		93
94		94
95	`KRM8PL_3C8`	95	`KRM8PL_3C8`
96	`LEVEL 2`	96	`LEVEL 2`
97	`AREA .63`	97	`AREA .63`
98	`PATH 3.84`	98	`PATH 3.84`
99	`MS 415.200000E+03`	99	`MS 415.200000E+03`
100	`A 44.82`	100	`A 44.82`
101	`C .4112`	101	`C .4112`
102	`K 25.74`	102	`K 25.74`
103		103
104		104
105	`** 08/21/07 15:28:32 ********** PSpice Lite (Jan 2005) ***************`	105	`** 08/23/07 17:58:38 ********** PSpice Lite (Jan 2005) ***************`
106		106
107	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]`	107	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]`
108		108
109		109
110	`**** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C`	110	`**** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C`
111		111
112		112
113	`******************************************************************************`	113	`******************************************************************************`
114		114
115		115
116		116
117	`NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE`	117	`NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE`
118		118
119		119
120	`(N03432) 0.0000 (N03462) 12.0000 (N03478) 12.0000 (N03490) .0385`	120	`(N03432) 0.0000 (N03462) 12.0000 (N03478) 12.0000 (N03490) .0385`
121		121
122	`(N03510) 6.0000 (N03518) 0.0000 (N03622) 0.0000 (N03634) 6.0000`	122	`(N03510) 6.0000 (N03518) 0.0000 (N03622) 0.0000 (N03634) 6.0000`
123		123
124	`(N03718) 6.0000 (N03774) 0.0000 (N03782) 0.0000`	124	`(N03718) 6.0000 (N03774) 0.0000 (N03782) 0.0000`
125		125
126		126
127		127
128		128
129	`VOLTAGE SOURCE CURRENTS`	129	`VOLTAGE SOURCE CURRENTS`
130	`NAME CURRENT`	130	`NAME CURRENT`
131		131
132	`V_V2 1.206E-11`	132	`V_V2 1.206E-11`
133	`V_V1 -1.267E-03`	133	`V_V1 -1.267E-03`
134		134
135	`TOTAL POWER DISSIPATION 1.52E-02 WATTS`	135	`TOTAL POWER DISSIPATION 1.52E-02 WATTS`
136		136
137		137
138		138
139	`JOB CONCLUDED`	139	`JOB CONCLUDED`
140		140
141	`** 08/21/07 15:28:32 ********** PSpice Lite (Jan 2005) ***************`	141	`** 08/23/07 17:58:38 ********** PSpice Lite (Jan 2005) ***************`
142		142
143	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-PSpiceFiles\SCHEMATIC1\test.sim ]`	143	`** Profile: "SCHEMATIC1-test" [ D:\KAKLIK\projekty\schemata\mereni\VLF\SIM\receiver-pspicefiles\schematic1\test.sim ]`
144		144
145		145
146	`**** JOB STATISTICS SUMMARY`	146	`**** JOB STATISTICS SUMMARY`
147		147
148		148
149	`******************************************************************************`	149	`******************************************************************************`
150		150
151		151
152		152
153	`Total job time (using Solver 1) = .89`	153	`Total job time (using Solver 1) = .82`
154		154
155		155

Subversion Repositories svnkaklik

(root)/schemata/mereni/VLF/SIM/receiver-PSpiceFiles/SCHEMATIC1/test/test.out – Rev 350 → 352