| Line 1... |
Line 1... |
| 1 |
D G "__PCM__" 0 247 ""4.059d"" |
1 |
D G "__PCM__" 0 285 ""4.058s"" |
| 2 |
D G "__DEVICE__" 0 247 "877" |
2 |
D G "__DEVICE__" 0 285 "876" |
| 3 |
D G "__DATE__" 0 247 ""04-V-07"" |
3 |
D G "__DATE__" 0 285 ""07-V-08"" |
| 4 |
D G "__TIME__" 0 247 ""12:10:53"" "Standard Header file for the PIC16F877A device ////////////////" |
4 |
D G "__TIME__" 0 285 ""16:06:11"" "Standard Header file for the PIC16F876A device ////////////////" |
| 5 |
d G "PIN_A0" 2 19 "40" |
5 |
d G "PIN_A0" 2 19 "40" |
| 6 |
d G "PIN_A1" 2 20 "41" |
6 |
d G "PIN_A1" 2 20 "41" |
| 7 |
d G "PIN_A2" 2 21 "42" |
7 |
d G "PIN_A2" 2 21 "42" |
| 8 |
d G "PIN_A3" 2 22 "43" |
8 |
d G "PIN_A3" 2 22 "43" |
| 9 |
d G "PIN_A4" 2 23 "44" |
9 |
d G "PIN_A4" 2 23 "44" |
| Line 22... |
Line 22... |
| 22 |
d G "PIN_C3" 2 38 "59" |
22 |
d G "PIN_C3" 2 38 "59" |
| 23 |
d G "PIN_C4" 2 39 "60" |
23 |
d G "PIN_C4" 2 39 "60" |
| 24 |
d G "PIN_C5" 2 40 "61" |
24 |
d G "PIN_C5" 2 40 "61" |
| 25 |
d G "PIN_C6" 2 41 "62" |
25 |
d G "PIN_C6" 2 41 "62" |
| 26 |
d G "PIN_C7" 2 42 "63" |
26 |
d G "PIN_C7" 2 42 "63" |
| 27 |
d G "PIN_D0" 2 44 "64" |
27 |
d G "FALSE" 2 45 "0" |
| 28 |
d G "PIN_D1" 2 45 "65" |
28 |
d G "TRUE" 2 46 "1" |
| 29 |
d G "PIN_D2" 2 46 "66" |
29 |
d G "BYTE" 2 48 "int8" |
| 30 |
d G "PIN_D3" 2 47 "67" |
30 |
d G "BOOLEAN" 2 49 "int1" |
| 31 |
d G "PIN_D4" 2 48 "68" |
31 |
d G "getc" 2 51 "getch" |
| 32 |
d G "PIN_D5" 2 49 "69" |
32 |
d G "fgetc" 2 52 "getch" |
| 33 |
d G "PIN_D6" 2 50 "70" |
33 |
d G "getchar" 2 53 "getch" |
| 34 |
d G "PIN_D7" 2 51 "71" |
34 |
d G "putc" 2 54 "putchar" |
| 35 |
d G "PIN_E0" 2 53 "72" |
35 |
d G "fputc" 2 55 "putchar" |
| 36 |
d G "PIN_E1" 2 54 "73" |
36 |
d G "fgets" 2 56 "gets" |
| 37 |
d G "PIN_E2" 2 55 "74" |
37 |
d G "fputs" 2 57 "puts" |
| 38 |
d G "FALSE" 2 58 "0" |
38 |
d G "WDT_FROM_SLEEP" 2 62 "3" |
| 39 |
d G "TRUE" 2 59 "1" |
39 |
d G "WDT_TIMEOUT" 2 63 "11" |
| 40 |
d G "BYTE" 2 61 "int8" |
40 |
d G "MCLR_FROM_SLEEP" 2 64 "19" |
| 41 |
d G "BOOLEAN" 2 62 "int1" |
41 |
d G "MCLR_FROM_RUN" 2 65 "27" |
| 42 |
d G "getc" 2 64 "getch" |
42 |
d G "NORMAL_POWER_UP" 2 66 "25" |
| 43 |
d G "fgetc" 2 65 "getch" |
43 |
d G "BROWNOUT_RESTART" 2 67 "26" |
| 44 |
d G "getchar" 2 66 "getch" |
44 |
d G "RTCC_INTERNAL" 2 75 "0" |
| 45 |
d G "putc" 2 67 "putchar" |
45 |
d G "RTCC_EXT_L_TO_H" 2 76 "32" |
| 46 |
d G "fputc" 2 68 "putchar" |
46 |
d G "RTCC_EXT_H_TO_L" 2 77 "48" |
| 47 |
d G "fgets" 2 69 "gets" |
47 |
d G "RTCC_DIV_1" 2 79 "8" |
| 48 |
d G "fputs" 2 70 "puts" |
48 |
d G "RTCC_DIV_2" 2 80 "0" |
| 49 |
d G "WDT_FROM_SLEEP" 2 75 "3" |
49 |
d G "RTCC_DIV_4" 2 81 "1" |
| 50 |
d G "WDT_TIMEOUT" 2 76 "11" |
50 |
d G "RTCC_DIV_8" 2 82 "2" |
| 51 |
d G "MCLR_FROM_SLEEP" 2 77 "19" |
51 |
d G "RTCC_DIV_16" 2 83 "3" |
| 52 |
d G "MCLR_FROM_RUN" 2 78 "27" |
52 |
d G "RTCC_DIV_32" 2 84 "4" |
| 53 |
d G "NORMAL_POWER_UP" 2 79 "25" |
53 |
d G "RTCC_DIV_64" 2 85 "5" |
| 54 |
d G "BROWNOUT_RESTART" 2 80 "26" |
54 |
d G "RTCC_DIV_128" 2 86 "6" |
| 55 |
d G "RTCC_INTERNAL" 2 88 "0" |
55 |
d G "RTCC_DIV_256" 2 87 "7" |
| 56 |
d G "RTCC_EXT_L_TO_H" 2 89 "32" |
56 |
d G "RTCC_8_BIT" 2 90 "0" |
| 57 |
d G "RTCC_EXT_H_TO_L" 2 90 "48" |
57 |
d G "WDT_18MS" 2 102 "0x8008" |
| 58 |
d G "RTCC_DIV_1" 2 92 "8" |
58 |
d G "WDT_36MS" 2 103 "9" |
| 59 |
d G "RTCC_DIV_2" 2 93 "0" |
59 |
d G "WDT_72MS" 2 104 "10" |
| 60 |
d G "RTCC_DIV_4" 2 94 "1" |
60 |
d G "WDT_144MS" 2 105 "11" |
| 61 |
d G "RTCC_DIV_8" 2 95 "2" |
61 |
d G "WDT_288MS" 2 106 "12" |
| 62 |
d G "RTCC_DIV_16" 2 96 "3" |
62 |
d G "WDT_576MS" 2 107 "13" |
| 63 |
d G "RTCC_DIV_32" 2 97 "4" |
63 |
d G "WDT_1152MS" 2 108 "14" |
| 64 |
d G "RTCC_DIV_64" 2 98 "5" |
64 |
d G "WDT_2304MS" 2 109 "15" |
| 65 |
d G "RTCC_DIV_128" 2 99 "6" |
65 |
d G "T1_DISABLED" 2 115 "0" |
| 66 |
d G "RTCC_DIV_256" 2 100 "7" |
66 |
d G "T1_INTERNAL" 2 116 "0x85" |
| 67 |
d G "RTCC_8_BIT" 2 103 "0" |
67 |
d G "T1_EXTERNAL" 2 117 "0x87" |
| 68 |
d G "WDT_18MS" 2 115 "0x8008" |
68 |
d G "T1_EXTERNAL_SYNC" 2 118 "0x83" |
| 69 |
d G "WDT_36MS" 2 116 "9" |
69 |
d G "T1_CLK_OUT" 2 120 "8" |
| 70 |
d G "WDT_72MS" 2 117 "10" |
70 |
d G "T1_DIV_BY_1" 2 122 "0" |
| 71 |
d G "WDT_144MS" 2 118 "11" |
71 |
d G "T1_DIV_BY_2" 2 123 "0x10" |
| 72 |
d G "WDT_288MS" 2 119 "12" |
72 |
d G "T1_DIV_BY_4" 2 124 "0x20" |
| 73 |
d G "WDT_576MS" 2 120 "13" |
73 |
d G "T1_DIV_BY_8" 2 125 "0x30" |
| 74 |
d G "WDT_1152MS" 2 121 "14" |
74 |
d G "T2_DISABLED" 2 130 "0" |
| 75 |
d G "WDT_2304MS" 2 122 "15" |
75 |
d G "T2_DIV_BY_1" 2 131 "4" |
| 76 |
d G "T1_DISABLED" 2 128 "0" |
76 |
d G "T2_DIV_BY_4" 2 132 "5" |
| 77 |
d G "T1_INTERNAL" 2 129 "0x85" |
77 |
d G "T2_DIV_BY_16" 2 133 "6" |
| 78 |
d G "T1_EXTERNAL" 2 130 "0x87" |
78 |
d G "CCP_OFF" 2 139 "0" |
| 79 |
d G "T1_EXTERNAL_SYNC" 2 131 "0x83" |
79 |
d G "CCP_CAPTURE_FE" 2 140 "4" |
| 80 |
d G "T1_CLK_OUT" 2 133 "8" |
80 |
d G "CCP_CAPTURE_RE" 2 141 "5" |
| 81 |
d G "T1_DIV_BY_1" 2 135 "0" |
81 |
d G "CCP_CAPTURE_DIV_4" 2 142 "6" |
| 82 |
d G "T1_DIV_BY_2" 2 136 "0x10" |
82 |
d G "CCP_CAPTURE_DIV_16" 2 143 "7" |
| 83 |
d G "T1_DIV_BY_4" 2 137 "0x20" |
83 |
d G "CCP_COMPARE_SET_ON_MATCH" 2 144 "8" |
| 84 |
d G "T1_DIV_BY_8" 2 138 "0x30" |
84 |
d G "CCP_COMPARE_CLR_ON_MATCH" 2 145 "9" |
| 85 |
d G "T2_DISABLED" 2 143 "0" |
85 |
d G "CCP_COMPARE_INT" 2 146 "0xA" |
| 86 |
d G "T2_DIV_BY_1" 2 144 "4" |
86 |
d G "CCP_COMPARE_RESET_TIMER" 2 147 "0xB" |
| 87 |
d G "T2_DIV_BY_4" 2 145 "5" |
87 |
d G "CCP_PWM" 2 148 "0xC" |
| 88 |
d G "T2_DIV_BY_16" 2 146 "6" |
88 |
d G "CCP_PWM_PLUS_1" 2 149 "0x1c" |
| 89 |
d G "CCP_OFF" 2 152 "0" |
89 |
d G "CCP_PWM_PLUS_2" 2 150 "0x2c" |
| 90 |
d G "CCP_CAPTURE_FE" 2 153 "4" |
90 |
d G "CCP_PWM_PLUS_3" 2 151 "0x3c" |
| 91 |
d G "CCP_CAPTURE_RE" 2 154 "5" |
91 |
v G "CCP_1" 2 152 "int16" |
| 92 |
d G "CCP_CAPTURE_DIV_4" 2 155 "6" |
92 |
v G "CCP_2" 2 156 "int16" |
| 93 |
d G "CCP_CAPTURE_DIV_16" 2 156 "7" |
93 |
d G "SPI_MASTER" 2 163 "0x20" |
| 94 |
d G "CCP_COMPARE_SET_ON_MATCH" 2 157 "8" |
94 |
d G "SPI_SLAVE" 2 164 "0x24" |
| 95 |
d G "CCP_COMPARE_CLR_ON_MATCH" 2 158 "9" |
95 |
d G "SPI_L_TO_H" 2 165 "0" |
| 96 |
d G "CCP_COMPARE_INT" 2 159 "0xA" |
96 |
d G "SPI_H_TO_L" 2 166 "0x10" |
| 97 |
d G "CCP_COMPARE_RESET_TIMER" 2 160 "0xB" |
97 |
d G "SPI_CLK_DIV_4" 2 167 "0" |
| 98 |
d G "CCP_PWM" 2 161 "0xC" |
98 |
d G "SPI_CLK_DIV_16" 2 168 "1" |
| 99 |
d G "CCP_PWM_PLUS_1" 2 162 "0x1c" |
99 |
d G "SPI_CLK_DIV_64" 2 169 "2" |
| 100 |
d G "CCP_PWM_PLUS_2" 2 163 "0x2c" |
100 |
d G "SPI_CLK_T2" 2 170 "3" |
| 101 |
d G "CCP_PWM_PLUS_3" 2 164 "0x3c" |
101 |
d G "SPI_SS_DISABLED" 2 171 "1" |
| 102 |
v G "CCP_1" 2 165 "int16" |
102 |
d G "SPI_SAMPLE_AT_END" 2 173 "0x8000" |
| 103 |
v G "CCP_2" 2 169 "int16" |
103 |
d G "SPI_XMIT_L_TO_H" 2 174 "0x4000" |
| 104 |
d G "PSP_ENABLED" 2 178 "0x10" |
104 |
d G "UART_ADDRESS" 2 180 "2" |
| 105 |
d G "PSP_DISABLED" 2 179 "0" |
105 |
d G "UART_DATA" 2 181 "4" |
| 106 |
d G "SPI_MASTER" 2 186 "0x20" |
106 |
d G "A0_A3_A1_A3" 2 185 "0xfff04" |
| 107 |
d G "SPI_SLAVE" 2 187 "0x24" |
107 |
d G "A0_A3_A1_A2_OUT_ON_A4_A5" 2 186 "0xfcf03" |
| 108 |
d G "SPI_L_TO_H" 2 188 "0" |
108 |
d G "A0_A3_A1_A3_OUT_ON_A4_A5" 2 187 "0xbcf05" |
| 109 |
d G "SPI_H_TO_L" 2 189 "0x10" |
109 |
d G "NC_NC_NC_NC" 2 188 "0x0ff07" |
| 110 |
d G "SPI_CLK_DIV_4" 2 190 "0" |
110 |
d G "A0_A3_A1_A2" 2 189 "0xfff02" |
| 111 |
d G "SPI_CLK_DIV_16" 2 191 "1" |
111 |
d G "A0_A3_NC_NC_OUT_ON_A4" 2 190 "0x9ef01" |
| 112 |
d G "SPI_CLK_DIV_64" 2 192 "2" |
112 |
d G "A0_VR_A1_VR" 2 191 "0x3ff06" |
| 113 |
d G "SPI_CLK_T2" 2 193 "3" |
113 |
d G "A3_VR_A2_VR" 2 192 "0xcff0e" |
| 114 |
d G "SPI_SS_DISABLED" 2 194 "1" |
114 |
d G "CP1_INVERT" 2 193 "0x0000010" |
| 115 |
d G "SPI_SAMPLE_AT_END" 2 196 "0x8000" |
115 |
d G "CP2_INVERT" 2 194 "0x0000020" |
| 116 |
d G "SPI_XMIT_L_TO_H" 2 197 "0x4000" |
116 |
d G "VREF_LOW" 2 202 "0xa0" |
| 117 |
d G "UART_ADDRESS" 2 203 "2" |
117 |
d G "VREF_HIGH" 2 203 "0x80" |
| 118 |
d G "UART_DATA" 2 204 "4" |
118 |
d G "VREF_A2" 2 205 "0x40" |
| 119 |
d G "A0_A3_A1_A3" 2 208 "0xfff04" |
119 |
d G "ADC_OFF" 2 213 "0" "ADC Off" |
| 120 |
d G "A0_A3_A1_A2_OUT_ON_A4_A5" 2 209 "0xfcf03" |
120 |
d G "ADC_CLOCK_DIV_2" 2 214 "0x10000" |
| 121 |
d G "A0_A3_A1_A3_OUT_ON_A4_A5" 2 210 "0xbcf05" |
121 |
d G "ADC_CLOCK_DIV_4" 2 215 "0x4000" |
| 122 |
d G "NC_NC_NC_NC" 2 211 "0x0ff07" |
122 |
d G "ADC_CLOCK_DIV_8" 2 216 "0x0040" |
| 123 |
d G "A0_A3_A1_A2" 2 212 "0xfff02" |
123 |
d G "ADC_CLOCK_DIV_16" 2 217 "0x4040" |
| 124 |
d G "A0_A3_NC_NC_OUT_ON_A4" 2 213 "0x9ef01" |
124 |
d G "ADC_CLOCK_DIV_32" 2 218 "0x0080" |
| 125 |
d G "A0_VR_A1_VR" 2 214 "0x3ff06" |
125 |
d G "ADC_CLOCK_DIV_64" 2 219 "0x4080" |
| 126 |
d G "A3_VR_A2_VR" 2 215 "0xcff0e" |
126 |
d G "ADC_CLOCK_INTERNAL" 2 220 "0x00c0" "Internal 2-6us" |
| 127 |
d G "CP1_INVERT" 2 216 "0x0000010" |
127 |
d G "NO_ANALOGS" 2 223 "7" "None" |
| 128 |
d G "CP2_INVERT" 2 217 "0x0000020" |
128 |
d G "ALL_ANALOG" 2 224 "0" "A0 A1 A2 A3 A4" |
| 129 |
d G "VREF_LOW" 2 225 "0xa0" |
129 |
d G "AN0_AN1_AN2_AN4_VSS_VREF" 2 225 "3" "A0 A1 A2 A4 VRefh=A3" |
| 130 |
d G "VREF_HIGH" 2 226 "0x80" |
130 |
d G "AN0_AN1_AN3" 2 226 "4" "A0 A1 A3" |
| 131 |
d G "VREF_A2" 2 228 "0x40" |
131 |
d G "AN0_AN1_VSS_VREF" 2 227 "5" "A0 A1 VRefh=A3" |
| 132 |
d G "ADC_OFF" 2 236 "0" "ADC Off" |
132 |
d G "AN0_AN1_AN4_VREF_VREF" 2 228 "0x08" "A0 A1 A4 VRefh=A3 VRefl=A2" |
| 133 |
d G "ADC_CLOCK_DIV_2" 2 237 "0x10000" |
133 |
d G "AN0_AN1_VREF_VREF" 2 229 "0x0D" "A0 A1 VRefh=A3 VRefl=A2" |
| 134 |
d G "ADC_CLOCK_DIV_4" 2 238 "0x4000" |
134 |
d G "AN0" 2 230 "0x0E" "A0" |
| 135 |
d G "ADC_CLOCK_DIV_8" 2 239 "0x0040" |
135 |
d G "AN0_VREF_VREF" 2 231 "0x0F" "A0 VRefh=A3 VRefl=A2" |
| 136 |
d G "ADC_CLOCK_DIV_16" 2 240 "0x4040" |
136 |
d G "ANALOG_RA3_REF" 2 232 "0x1" "!old only provided for compatibility" |
| 137 |
d G "ADC_CLOCK_DIV_32" 2 241 "0x0080" |
137 |
d G "RA0_RA1_RA3_ANALOG" 2 233 "0x4" "!old only provided for compatibility" |
| 138 |
d G "ADC_CLOCK_DIV_64" 2 242 "0x4080" |
138 |
d G "RA0_RA1_ANALOG_RA3_REF" 2 234 "0x5" "!old only provided for compatibility" |
| 139 |
d G "ADC_CLOCK_INTERNAL" 2 243 "0x00c0" "Internal 2-6us" |
139 |
d G "ANALOG_RA3_RA2_REF" 2 235 "0x8" "!old only provided for compatibility" |
| 140 |
d G "NO_ANALOGS" 2 246 "7" "None" |
140 |
d G "RA0_RA1_ANALOG_RA3_RA2_REF" 2 236 "0xD" "!old only provided for compatibility" |
| 141 |
d G "ALL_ANALOG" 2 247 "0" "A0 A1 A2 A3 A5 E0 E1 E2" |
141 |
d G "RA0_ANALOG" 2 237 "0xE" "!old only provided for compatibility" |
| 142 |
d G "AN0_AN1_AN2_AN4_AN5_AN6_AN7_VSS_VREF" 2 248 "1" "A0 A1 A2 A5 E0 E1 E2 VRefh=A3" |
142 |
d G "RA0_ANALOG_RA3_RA2_REF" 2 238 "0xF" "!old only provided for compatibility" |
| 143 |
d G "AN0_AN1_AN2_AN3_AN4" 2 249 "2" "A0 A1 A2 A3 A5" |
143 |
d G "ADC_START_AND_READ" 2 242 "7" "This is the default if nothing is specified" |
| 144 |
d G "AN0_AN1_AN2_AN4_VSS_VREF" 2 250 "3" "A0 A1 A2 A4 VRefh=A3" |
144 |
d G "ADC_START_ONLY" 2 243 "1" |
| 145 |
d G "AN0_AN1_AN3" 2 251 "4" "A0 A1 A3" |
145 |
d G "ADC_READ_ONLY" 2 244 "6" |
| 146 |
d G "AN0_AN1_VSS_VREF" 2 252 "5" "A0 A1 VRefh=A3" |
146 |
d G "L_TO_H" 2 256 "0x40" |
| 147 |
d G "AN0_AN1_AN4_AN5_AN6_AN7_VREF_VREF" 2 253 "0x08" "A0 A1 A5 E0 E1 E2 VRefh=A3 VRefl=A2" |
147 |
d G "H_TO_L" 2 257 "0" |
| 148 |
d G "AN0_AN1_AN2_AN3_AN4_AN5" 2 254 "0x09" "A0 A1 A2 A3 A5 E0" |
148 |
d G "GLOBAL" 2 259 "0x0BC0" |
| 149 |
d G "AN0_AN1_AN2_AN4_AN5_VSS_VREF" 2 255 "0x0A" "A0 A1 A2 A5 E0 VRefh=A3" |
149 |
d G "INT_RTCC" 2 260 "0x0B20" |
| 150 |
d G "AN0_AN1_AN4_AN5_VREF_VREF" 2 256 "0x0B" "A0 A1 A5 E0 VRefh=A3 VRefl=A2" |
150 |
d G "INT_RB" 2 261 "0xFF0B08" |
| 151 |
d G "AN0_AN1_AN4_VREF_VREF" 2 257 "0x0C" "A0 A1 A4 VRefh=A3 VRefl=A2" |
151 |
d G "INT_EXT" 2 262 "0x0B10" |
| 152 |
d G "AN0_AN1_VREF_VREF" 2 258 "0x0D" "A0 A1 VRefh=A3 VRefl=A2" |
152 |
d G "INT_AD" 2 263 "0x8C40" |
| 153 |
d G "AN0" 2 259 "0x0E" "A0" |
153 |
d G "INT_TBE" 2 264 "0x8C10" |
| 154 |
d G "AN0_VREF_VREF" 2 260 "0x0F" "A0 VRefh=A3 VRefl=A2" |
154 |
d G "INT_RDA" 2 265 "0x8C20" |
| 155 |
d G "ANALOG_RA3_REF" 2 261 "0x1" "!old only provided for compatibility" |
155 |
d G "INT_TIMER1" 2 266 "0x8C01" |
| 156 |
d G "A_ANALOG" 2 262 "0x2" "!old only provided for compatibility" |
156 |
d G "INT_TIMER2" 2 267 "0x8C02" |
| 157 |
d G "A_ANALOG_RA3_REF" 2 263 "0x3" "!old only provided for compatibility" |
157 |
d G "INT_CCP1" 2 268 "0x8C04" |
| 158 |
d G "RA0_RA1_RA3_ANALOG" 2 264 "0x4" "!old only provided for compatibility" |
158 |
d G "INT_CCP2" 2 269 "0x8D01" |
| 159 |
d G "RA0_RA1_ANALOG_RA3_REF" 2 265 "0x5" "!old only provided for compatibility" |
159 |
d G "INT_SSP" 2 270 "0x8C08" |
| 160 |
d G "ANALOG_RA3_RA2_REF" 2 266 "0x8" "!old only provided for compatibility" |
160 |
d G "INT_BUSCOL" 2 271 "0x8D08" |
| 161 |
d G "ANALOG_NOT_RE1_RE2" 2 267 "0x9" "!old only provided for compatibility" |
161 |
d G "INT_EEPROM" 2 272 "0x8D10" |
| 162 |
d G "ANALOG_NOT_RE1_RE2_REF_RA3" 2 268 "0xA" "!old only provided for compatibility" |
162 |
d G "INT_TIMER0" 2 273 "0x0B20" |
| 163 |
d G "ANALOG_NOT_RE1_RE2_REF_RA3_RA2" 2 269 "0xB" "!old only provided for compatibility" |
163 |
d G "INT_COMP" 2 274 "0x8D40" |
| 164 |
d G "A_ANALOG_RA3_RA2_REF" 2 270 "0xC" "!old only provided for compatibility" |
- |
|
| 165 |
d G "RA0_RA1_ANALOG_RA3_RA2_REF" 2 271 "0xD" "!old only provided for compatibility" |
- |
|
| 166 |
d G "RA0_ANALOG" 2 272 "0xE" "!old only provided for compatibility" |
- |
|
| 167 |
d G "RA0_ANALOG_RA3_RA2_REF" 2 273 "0xF" "!old only provided for compatibility" |
- |
|
| 168 |
d G "ADC_START_AND_READ" 2 277 "7" "This is the default if nothing is specified" |
- |
|
| 169 |
d G "ADC_START_ONLY" 2 278 "1" |
- |
|
| 170 |
d G "ADC_READ_ONLY" 2 279 "6" |
- |
|
| 171 |
d G "L_TO_H" 2 291 "0x40" |
- |
|
| 172 |
d G "H_TO_L" 2 292 "0" |
- |
|
| 173 |
d G "GLOBAL" 2 294 "0x0BC0" |
- |
|
| 174 |
d G "INT_RTCC" 2 295 "0x0B20" |
- |
|
| 175 |
d G "INT_RB" 2 296 "0xFF0B08" |
- |
|
| 176 |
d G "INT_EXT" 2 297 "0x0B10" |
- |
|
| 177 |
d G "INT_AD" 2 298 "0x8C40" |
- |
|
| 178 |
d G "INT_TBE" 2 299 "0x8C10" |
- |
|
| 179 |
d G "INT_RDA" 2 300 "0x8C20" |
- |
|
| 180 |
d G "INT_TIMER1" 2 301 "0x8C01" |
- |
|
| 181 |
d G "INT_TIMER2" 2 302 "0x8C02" |
- |
|
| 182 |
d G "INT_CCP1" 2 303 "0x8C04" |
- |
|
| 183 |
d G "INT_CCP2" 2 304 "0x8D01" |
- |
|
| 184 |
d G "INT_SSP" 2 305 "0x8C08" |
- |
|
| 185 |
d G "INT_PSP" 2 306 "0x8C80" |
- |
|
| 186 |
d G "INT_BUSCOL" 2 307 "0x8D08" |
- |
|
| 187 |
d G "INT_EEPROM" 2 308 "0x8D10" |
- |
|
| 188 |
d G "INT_TIMER0" 2 309 "0x0B20" |
- |
|
| 189 |
d G "INT_COMP" 2 310 "0x8D40" |
- |
|
| 190 |
D G "LCD_RS" 0 3 "PIN_B1" "rizeni registru LCD displeje" |
164 |
D G "LCD_RS" 0 3 "PIN_B1" "rizeni registru LCD displeje" |
| 191 |
D G "LCD_E" 0 4 "PIN_B0" "enable LCD displeje" |
165 |
D G "LCD_E" 0 4 "PIN_B0" "enable LCD displeje" |
| 192 |
D G "LCD_DATA_LSB" 0 5 "PIN_C0" "pripojeni LSB bitu datoveho portu LCD displeje (celkem 4 bity vzestupne za sebou)" |
166 |
D G "LCD_DATA_LSB" 0 5 "PIN_C0" "pripojeni LSB bitu datoveho portu LCD displeje (celkem 4 bity vzestupne za sebou)" |
| 193 |
D G "zar1" 0 6 "PIN_A3" |
167 |
D G "zar1" 0 6 "PIN_A3" |
| 194 |
D G "LCD_SHIFT" 3 52 " (LCD_DATA_LSB&7)" "pocet bitu posuvu dataoveho kanalu v datovem portu" |
168 |
D G "LCD_SHIFT" 3 52 " (LCD_DATA_LSB&7)" "pocet bitu posuvu dataoveho kanalu v datovem portu" |
| Line 289... |
Line 263... |
| 289 |
D G "LCD_CHAR_LUY" 3 259 ""\x02\x15\x11\x0A\x04\x04\x04\x80"" "Y s carkou" |
263 |
D G "LCD_CHAR_LUY" 3 259 ""\x02\x15\x11\x0A\x04\x04\x04\x80"" "Y s carkou" |
| 290 |
D G "LCD_CHAR_LLY" 3 260 ""\x02\x04\x11\x11\x0F\x01\x0E\x80"" "y s carkou" |
264 |
D G "LCD_CHAR_LLY" 3 260 ""\x02\x04\x11\x11\x0F\x01\x0E\x80"" "y s carkou" |
| 291 |
D G "LCD_CHAR_HUZ" 3 261 ""\x0A\x1F\x01\x02\x04\x08\x1F\x80"" "Z s hackem" |
265 |
D G "LCD_CHAR_HUZ" 3 261 ""\x0A\x1F\x01\x02\x04\x08\x1F\x80"" "Z s hackem" |
| 292 |
D G "LCD_CHAR_HLZ" 3 262 ""\x0A\x04\x1F\x02\x04\x08\x1F\x80"" "z s hackem" |
266 |
D G "LCD_CHAR_HLZ" 3 262 ""\x0A\x04\x1F\x02\x04\x08\x1F\x80"" "z s hackem" |
| 293 |
C L "MAIN" 3 1 10 "FUNCTION" |
267 |
C L "MAIN" 3 1 10 "FUNCTION" |
| 294 |
F G "MAIN" 0 11 "void()" |
268 |
F G "MAIN" 0 14 "void()" |
| 295 |
V L "odp" 0 12 "int8[96]" |
269 |
V L "odp" 0 15 "int8[96]" |
| 296 |
V L "pom" 0 13 "int8" |
270 |
V L "pom" 0 16 "int8" |
| 297 |
V L "pom2" 0 13 "int8" |
271 |
V L "pom2" 0 16 "int8" |
| 298 |
V L "pom3" 0 13 "int8" |
272 |
V L "pom3" 0 16 "int8" |
| 299 |
V L "odkl" 0 13 "int8" |
273 |
V L "odkl" 0 16 "int8" |
| 300 |
V L "odkl2" 0 13 "int8" |
274 |
V L "odkl2" 0 16 "int8" |
| 301 |
V L "maskovadlo" 0 13 "int8" |
275 |
V L "maskovadlo" 0 16 "int8" |
| 302 |
V L "status" 0 13 "int8" |
276 |
V L "status" 0 16 "int8" |
| 303 |
C L "MAIN" 0 27 10 "FUNCTION" |
277 |
C L "MAIN" 0 29 10 "FUNCTION" |
| - |
|
278 |
C L "MAIN" 0 29 16 "FUNCTION" |
| - |
|
279 |
C L "MAIN" 0 29 2 "FUNCTION" |
| - |
|
280 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 304 |
C L "MAIN" 0 27 1 "FUNCTION" |
281 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 305 |
C L "MAIN" 0 27 1 "FUNCTION" |
282 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 306 |
C L "MAIN" 0 27 1 "FUNCTION" |
283 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 307 |
C L "MAIN" 0 27 1 "FUNCTION" |
284 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 308 |
C L "MAIN" 0 27 1 "FUNCTION" |
285 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 309 |
C L "MAIN" 0 27 1 "FUNCTION" |
286 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 310 |
C L "MAIN" 0 27 1 "FUNCTION" |
287 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 311 |
C L "MAIN" 0 27 2 "FUNCTION" |
288 |
C L "MAIN" 0 29 2 "FUNCTION" |
| 312 |
C L "MAIN" 0 27 1 "FUNCTION" |
289 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 313 |
C L "MAIN" 0 27 2 "FUNCTION" |
290 |
C L "MAIN" 0 29 2 "FUNCTION" |
| 314 |
C L "MAIN" 0 27 1 "FUNCTION" |
291 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 315 |
C L "MAIN" 0 27 1 "FUNCTION" |
292 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 316 |
C L "MAIN" 0 27 1 "FUNCTION" |
293 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 317 |
C L "MAIN" 0 27 1 "FUNCTION" |
294 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 318 |
C L "MAIN" 0 27 1 "FUNCTION" |
295 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 319 |
C L "MAIN" 0 27 1 "FUNCTION" |
296 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 320 |
C L "MAIN" 0 27 1 "FUNCTION" |
297 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 321 |
C L "MAIN" 0 27 1 "FUNCTION" |
298 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 322 |
C L "MAIN" 0 27 1 "FUNCTION" |
299 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 323 |
C L "MAIN" 0 27 1 "FUNCTION" |
300 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 324 |
C L "MAIN" 0 27 1 "FUNCTION" |
301 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 325 |
C L "MAIN" 0 27 1 "FUNCTION" |
302 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 326 |
C L "MAIN" 0 27 2 "FUNCTION" |
303 |
C L "MAIN" 0 29 2 "FUNCTION" |
| - |
|
304 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 327 |
C L "MAIN" 0 27 1 "FUNCTION" |
305 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 328 |
C L "MAIN" 0 27 1 "FUNCTION" |
306 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 329 |
C L "MAIN" 0 27 1 "FUNCTION" |
307 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 330 |
C L "MAIN" 0 27 1 "FUNCTION" |
308 |
C L "MAIN" 0 29 1 "FUNCTION" |
| 331 |
F B "reset_cpu" 0 0 |
309 |
F B "reset_cpu" 0 0 |
| 332 |
F B "abs" 1 0 |
310 |
F B "abs" 1 0 |
| 333 |
F B "sleep" 0 0 |
311 |
F B "sleep" 0 0 |
| 334 |
F B "delay_cycles" 1 0 |
312 |
F B "delay_cycles" 1 0 |
| 335 |
F B "read_bank" 2 0 |
313 |
F B "read_bank" 2 0 |
| Line 383... |
Line 361... |
| 383 |
F B "output_bit" 1 1 |
361 |
F B "output_bit" 1 1 |
| 384 |
F B "output_toggle" 1 0 |
362 |
F B "output_toggle" 1 0 |
| 385 |
F B "output_a" 1 0 |
363 |
F B "output_a" 1 0 |
| 386 |
F B "output_b" 1 0 |
364 |
F B "output_b" 1 0 |
| 387 |
F B "output_c" 1 0 |
365 |
F B "output_c" 1 0 |
| 388 |
F B "output_d" 1 0 |
- |
|
| 389 |
F B "output_e" 1 0 |
- |
|
| 390 |
F B "input_a" 0 0 |
366 |
F B "input_a" 0 0 |
| 391 |
F B "input_b" 0 0 |
367 |
F B "input_b" 0 0 |
| 392 |
F B "input_c" 0 0 |
368 |
F B "input_c" 0 0 |
| 393 |
F B "input_d" 0 0 |
- |
|
| 394 |
F B "input_e" 0 0 |
- |
|
| 395 |
F B "set_tris_a" 1 0 |
369 |
F B "set_tris_a" 1 0 |
| 396 |
F B "set_tris_b" 1 0 |
370 |
F B "set_tris_b" 1 0 |
| 397 |
F B "set_tris_c" 1 0 |
371 |
F B "set_tris_c" 1 0 |
| 398 |
F B "set_tris_d" 1 0 |
- |
|
| 399 |
F B "set_tris_e" 1 0 |
- |
|
| 400 |
F B "get_tris_a" 0 0 |
372 |
F B "get_tris_a" 0 0 |
| 401 |
F B "get_tris_b" 0 0 |
373 |
F B "get_tris_b" 0 0 |
| 402 |
F B "get_tris_c" 0 0 |
374 |
F B "get_tris_c" 0 0 |
| 403 |
F B "get_tris_d" 0 0 |
- |
|
| 404 |
F B "get_tris_e" 0 0 |
- |
|
| 405 |
F B "port_b_pullups" 1 0 |
375 |
F B "port_b_pullups" 1 0 |
| 406 |
F B "setup_counters" 2 0 |
376 |
F B "setup_counters" 2 0 |
| 407 |
F B "setup_wdt" 1 0 |
377 |
F B "setup_wdt" 1 0 |
| 408 |
F B "restart_cause" 0 0 |
378 |
F B "restart_cause" 0 0 |
| 409 |
F B "restart_wdt" 0 0 |
379 |
F B "restart_wdt" 0 0 |
| Line 428... |
Line 398... |
| 428 |
F B "setup_ccp1" 1 0 |
398 |
F B "setup_ccp1" 1 0 |
| 429 |
F B "set_pwm1_duty" 1 0 |
399 |
F B "set_pwm1_duty" 1 0 |
| 430 |
F B "setup_ccp2" 1 0 |
400 |
F B "setup_ccp2" 1 0 |
| 431 |
F B "set_pwm2_duty" 1 0 |
401 |
F B "set_pwm2_duty" 1 0 |
| 432 |
F B "setup_vref" 1 0 |
402 |
F B "setup_vref" 1 0 |
| 433 |
F B "setup_psp" 1 0 |
- |
|
| 434 |
F B "psp_output_full" 0 0 |
- |
|
| 435 |
F B "psp_input_full" 0 0 |
- |
|
| 436 |
F B "psp_overflow" 0 0 |
- |
|
| 437 |
F B "setup_spi" 1 0 |
403 |
F B "setup_spi" 1 0 |
| 438 |
F B "spi_read" 0 1 |
404 |
F B "spi_read" 0 1 |
| 439 |
F B "spi_write" 1 0 |
405 |
F B "spi_write" 1 0 |
| 440 |
F B "spi_data_is_in" 0 0 |
406 |
F B "spi_data_is_in" 0 0 |
| 441 |
F B "setup_spi2" 1 0 |
407 |
F B "setup_spi2" 1 0 |
| Line 447... |
Line 413... |
| 447 |
F B "putchar" 1 2 |
413 |
F B "putchar" 1 2 |
| 448 |
F B "puts" 1 2 |
414 |
F B "puts" 1 2 |
| 449 |
F B "getch" 0 1 |
415 |
F B "getch" 0 1 |
| 450 |
F B "gets" 1 3 |
416 |
F B "gets" 1 3 |
| 451 |
F B "kbhit" 0 1 |
417 |
F B "kbhit" 0 1 |
| 452 |
F B "set_uart_speed" 1 3 |
- |
|
| 453 |
F B "setup_uart" 1 3 |
- |
|