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\sec Possible software improvements
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\sec Possible software improvements
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In the future versions of the system hardware, the Xillybus IP core and driver interface should be swapped with an open-source alternative of PCIe interfacing module or PCIe might be completely avoided. In ADC configuration FPGA module, the SPI configuration data registers read back should be implemented. 
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In the future versions of the system hardware, the Xillybus IP core and driver interface should be swapped with an open-source alternative of PCIe interfacing module or PCIe might be completely avoided. In ADC configuration FPGA module, the SPI configuration data registers read back should be implemented. 
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\nonum \chap Glossary 
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\makeglos
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\bibchap
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\bibchap
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\usebbl/c mybase
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\usebbl/c mybase
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