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\enditems
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\enditems
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MiniSAS connector was chosen as the best for use in connection multiple ADC modules. This miniSAS connector is compatible with existing SATA cabling system and agregates multiple SATA cables to single connector. Translation between SATA and miniSAS is achieved by SAS to SATA adapter cable. This cable is used in servers to connecting SAS controller to multiple SATA hard disc in RAID systems thus is commercially available.
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MiniSAS connector was chosen as the best for use in connection multiple ADC modules. This miniSAS connector is compatible with existing SATA cabling system and agregates multiple SATA cables to single connector. Translation between SATA and miniSAS is achieved by SAS to SATA adapter cable. This cable is used in servers to connecting SAS controller to multiple SATA hard disc in RAID systems thus is commercially available.
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One drawback is that miniSAS PCB connectors are mainufactured in SMT versions only. But outer metal housing of connector is standard trough hole type. This mechannical design should degrade durability of this connector type.
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One drawback is that miniSAS PCB connectors are mainufactured in SMT versions only. But outer metal housing of connector is standard trough hole type. This mechannical design should degrade durability of this connector type.
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\midinsert
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\picw=10cm \cinspic ./img/miniSAS_SATA_cable.jpg
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\caption/f A type of miniSAS cable similar to used.
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\endinsert
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\secc Design of ADC modules
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\secc Design of ADC modules
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This modules have MLAB standard construction with four mounting holes in corner aligned in defined raster.
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This modules have MLAB standard construction with four mounting holes in corner aligned in defined raster.
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Data serial data output of ADC module should be connected directly to FPGA for basic primary signal processing. Used ADC chip has selectable bit width of data output bus thus output SATA connectors has signals arranged to contain a single bit from every ADC channel. This signal concept enables selection of proper bus bitwidth according to sampling rate. (Higher bus bitwidth downgrades signaling speed and vice versa.)
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Data serial data output of ADC module should be connected directly to FPGA for basic primary signal processing. Used ADC chip has selectable bit width of data output bus thus output SATA connectors has signals arranged to contain a single bit from every ADC channel. This signal concept enables selection of proper bus bitwidth according to sampling rate. (Higher bus bitwidth downgrades signaling speed and vice versa.)
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%\sec Simple passive Doppler radar
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%\sec Simple passive Doppler radar
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\chap Proposed final system
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\chap Proposed final system
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Construction of final system which should be used for real radioastronomy observations will be described. This chapter is mainly theoretical analysis of systems which should be used for data handling.
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Construction of final system which should be used for real radioastronomy observations will be described. This chapter is mainly theoretical analysis of systems which should be used for data handling. Realisation of these ideas are planed for future development after full evaluation and testing of actual functional example design.
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\sec Custom design of FPGA board
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\sec Custom design of FPGA board
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In beginning of the project coustom design of FPGA interface board was supposed. This FPGA board should include PCI express interface and should have lower price than functional example construction. This board should have MLAB compatible design which is backward compatible with existing or improved design of ADC modules. For connection of this board an another adapter board with PCIe host interface was supposed.
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Thunderbolt technology standard was supposed for use in this PC to PCIe -> FPGA module. Thunderbolt chips are currently available on the market for reasonable prices. But specification for these devices are accessible for licensed users only and Intel has mass market oriented licensing policy, which makes this technology inaccessible for low quantity product design. In consequence of this external PCI Express cabling and expansion slots should be better solution.
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But this systems and cables are still very expensive. For example (http://www.opalkelly.com/products/xem6110/) has price tag 995 USD at time of writing this thesis.
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Therefore better approach must be found.
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\sec Parralella board computer
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\sec Parralella board computer
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Parallella is gon
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Parallella is gon
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\sec GPU based computational system
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\sec GPU based computational system
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