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\Xpage{-6}
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\Xpage{1}
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\Xpage{1}
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\Xchap{1}{Testing construction }{1}
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\Xchap{1}{Testing construction }{1}
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\Xsec{1.1}{Required parameters }{1}
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\Xsec{1.1}{Required parameters }{1}
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\Xsec{1.2}{Sampling frequency }{1}
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\Xsec{1.3}{System scalability }{1}
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\Xsecc{1.3.1}{Differential signaling }{1}
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\Xsec{1.4}{System description }{1}
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\Xsec{1.2}{System description }{1}
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\Xsecc{1.4.1}{Frequency synthesis }{1}
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\Xsecc{1.4.2}{Design of ADC modules }{1}
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\Xsecc{1.2.1}{Design of ADC modules }{1}
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\Xsecc{1.4.3}{Used signal connectors }{1}
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\Xsec{1.5}{ADC modules interface }{1}
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\Xsecc{1.2.2}{ADC modules interface }{1}
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\Xsec{1.6}{Measured parameters }{1}
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\Xsec{1.7}{Future improvements }{1}
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\Xsecc{1.2.3}{Output data format }{1}
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\Xpage{2}
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\Xpage{2}
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\Xchap{2}{Example of usage }{2}
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\Xsec{2.1}{Simple polarimeter station }{2}
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\Xsec{1.3}{Achieved parameters }{2}
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\Xsec{2.2}{Basic interferometer station }{2}
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\Xsec{2.3}{Simple passive Doppler radar }{2}
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\Xsecc{1.3.1}{Data reading and recording }{2}
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\Xpage{3}
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\Xpage{3}
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\Xchap{3}{Proposed final system }{3}
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\Xsec{3.1}{Custom design of FPGA board }{3}
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\Xsec{3.2}{Parralella board computer }{3}
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\Xpage{4}
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\Xchap{4}{Conclusion }{4}
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