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Rev 471 Rev 472
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ÀÄmain
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ÀÄmain
2 
   ÃÄmain  0/65  Ram=2
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   ÀÄmain  0/217  Ram=8
3 
   ³  ÀÄ??0??
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      ÃÄ??0??
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      ÃÄds1820_read  0/62  Ram=9
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      ³  ÃÄonewire_reset  0/19  Ram=0
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      ³  ÃÄonewire_write  0/33  Ram=2
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      ³  ÃÄonewire_write  0/33  Ram=2
- 
 
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      ³  ÃÄonewire_read  0/37  Ram=2
- 
 
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      ³  ÃÄonewire_reset  0/19  Ram=0
- 
 
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      ³  ÃÄonewire_write  0/33  Ram=2
- 
 
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      ³  ÃÄonewire_write  0/33  Ram=2
- 
 
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      ³  ÃÄonewire_read  0/37  Ram=2
- 
 
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      ³  ÃÄonewire_read  0/37  Ram=2
- 
 
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      ³  ÃÄ@DIVS1616  0/64  Ram=6
- 
 
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      ³  ÀÄ@ITOF  0/31  Ram=2
4 
   ÀÄRTCC_isr  0/216  Ram=4
 16 
      ÃÄ@SFTOI  0/33  Ram=4
5 
      ÃÄ@DIV88  0/22  Ram=3
 17 
      ÃÄ@DIV88  0/22  Ram=3
6 
      ÀÄ@MUL88  0/38  Ram=2
 18 
      ÃÄ@MUL88  0/38  Ram=2
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 19 
      ÀÄ@delay_ms1  0/22  Ram=1