| Line 1... |
Line 1... |
| 1 |
D G "__PCM__" 0 0 ""4.059d"" |
1 |
D G "__PCM__" 0 26 ""4.106"" |
| 2 |
D G "__DEVICE__" 0 0 "" |
2 |
D G "__DEVICE__" 0 26 "877" |
| 3 |
D G "__DATE__" 0 0 ""02-IV-06"" |
3 |
D G "__DATE__" 0 26 ""29-IX-12"" |
| 4 |
D G "__TIME__" 0 0 ""00:43:32"" "Standard Header file for the PIC16F877A device ////////////////" |
4 |
D G "__TIME__" 0 26 ""21:44:59"" "Standard Header file for the PIC16F887 device ////////////////" |
| 5 |
d G "PIN_A0" 2 19 "40" |
5 |
d G "PIN_A0" 2 20 "40" |
| 6 |
d G "PIN_A1" 2 20 "41" |
6 |
d G "PIN_A1" 2 21 "41" |
| 7 |
d G "PIN_A2" 2 21 "42" |
7 |
d G "PIN_A2" 2 22 "42" |
| 8 |
d G "PIN_A3" 2 22 "43" |
8 |
d G "PIN_A3" 2 23 "43" |
| 9 |
d G "PIN_A4" 2 23 "44" |
9 |
d G "PIN_A4" 2 24 "44" |
| 10 |
d G "PIN_A5" 2 24 "45" |
10 |
d G "PIN_A5" 2 25 "45" |
| 11 |
d G "PIN_B0" 2 26 "48" |
11 |
d G "PIN_A6" 2 26 "46" |
| 12 |
d G "PIN_B1" 2 27 "49" |
12 |
d G "PIN_A7" 2 27 "47" |
| 13 |
d G "PIN_B2" 2 28 "50" |
13 |
d G "PIN_B0" 2 29 "48" |
| 14 |
d G "PIN_B3" 2 29 "51" |
14 |
d G "PIN_B1" 2 30 "49" |
| 15 |
d G "PIN_B4" 2 30 "52" |
15 |
d G "PIN_B2" 2 31 "50" |
| 16 |
d G "PIN_B5" 2 31 "53" |
16 |
d G "PIN_B3" 2 32 "51" |
| 17 |
d G "PIN_B6" 2 32 "54" |
17 |
d G "PIN_B4" 2 33 "52" |
| 18 |
d G "PIN_B7" 2 33 "55" |
18 |
d G "PIN_B5" 2 34 "53" |
| 19 |
d G "PIN_C0" 2 35 "56" |
19 |
d G "PIN_B6" 2 35 "54" |
| 20 |
d G "PIN_C1" 2 36 "57" |
20 |
d G "PIN_B7" 2 36 "55" |
| 21 |
d G "PIN_C2" 2 37 "58" |
21 |
d G "PIN_C0" 2 38 "56" |
| 22 |
d G "PIN_C3" 2 38 "59" |
22 |
d G "PIN_C1" 2 39 "57" |
| 23 |
d G "PIN_C4" 2 39 "60" |
23 |
d G "PIN_C2" 2 40 "58" |
| 24 |
d G "PIN_C5" 2 40 "61" |
24 |
d G "PIN_C3" 2 41 "59" |
| 25 |
d G "PIN_C6" 2 41 "62" |
25 |
d G "PIN_C4" 2 42 "60" |
| 26 |
d G "PIN_C7" 2 42 "63" |
26 |
d G "PIN_C5" 2 43 "61" |
| 27 |
d G "PIN_D0" 2 44 "64" |
27 |
d G "PIN_C6" 2 44 "62" |
| 28 |
d G "PIN_D1" 2 45 "65" |
28 |
d G "PIN_C7" 2 45 "63" |
| 29 |
d G "PIN_D2" 2 46 "66" |
29 |
d G "PIN_D0" 2 47 "64" |
| 30 |
d G "PIN_D3" 2 47 "67" |
30 |
d G "PIN_D1" 2 48 "65" |
| 31 |
d G "PIN_D4" 2 48 "68" |
31 |
d G "PIN_D2" 2 49 "66" |
| 32 |
d G "PIN_D5" 2 49 "69" |
32 |
d G "PIN_D3" 2 50 "67" |
| 33 |
d G "PIN_D6" 2 50 "70" |
33 |
d G "PIN_D4" 2 51 "68" |
| 34 |
d G "PIN_D7" 2 51 "71" |
34 |
d G "PIN_D5" 2 52 "69" |
| 35 |
d G "PIN_E0" 2 53 "72" |
35 |
d G "PIN_D6" 2 53 "70" |
| 36 |
d G "PIN_E1" 2 54 "73" |
36 |
d G "PIN_D7" 2 54 "71" |
| 37 |
d G "PIN_E2" 2 55 "74" |
37 |
d G "PIN_E0" 2 56 "72" |
| 38 |
d G "FALSE" 2 58 "0" |
38 |
d G "PIN_E1" 2 57 "73" |
| 39 |
d G "TRUE" 2 59 "1" |
39 |
d G "PIN_E2" 2 58 "74" |
| 40 |
d G "BYTE" 2 61 "int8" |
40 |
d G "PIN_E3" 2 59 "75" |
| 41 |
d G "BOOLEAN" 2 62 "int1" |
41 |
d G "FALSE" 2 62 "0" |
| 42 |
d G "getc" 2 64 "getch" |
42 |
d G "TRUE" 2 63 "1" |
| 43 |
d G "fgetc" 2 65 "getch" |
43 |
d G "BYTE" 2 65 "int8" |
| 44 |
d G "getchar" 2 66 "getch" |
44 |
d G "BOOLEAN" 2 66 "int1" |
| 45 |
d G "putc" 2 67 "putchar" |
45 |
d G "getc" 2 68 "getch" |
| 46 |
d G "fputc" 2 68 "putchar" |
46 |
d G "fgetc" 2 69 "getch" |
| 47 |
d G "fgets" 2 69 "gets" |
47 |
d G "getchar" 2 70 "getch" |
| 48 |
d G "fputs" 2 70 "puts" |
48 |
d G "putc" 2 71 "putchar" |
| 49 |
d G "WDT_FROM_SLEEP" 2 75 "3" |
49 |
d G "fputc" 2 72 "putchar" |
| 50 |
d G "WDT_TIMEOUT" 2 76 "11" |
50 |
d G "fgets" 2 73 "gets" |
| 51 |
d G "MCLR_FROM_SLEEP" 2 77 "19" |
51 |
d G "fputs" 2 74 "puts" |
| 52 |
d G "MCLR_FROM_RUN" 2 78 "27" |
52 |
d G "WDT_FROM_SLEEP" 2 79 "3" |
| 53 |
d G "NORMAL_POWER_UP" 2 79 "25" |
53 |
d G "WDT_TIMEOUT" 2 80 "11" |
| 54 |
d G "BROWNOUT_RESTART" 2 80 "26" |
54 |
d G "MCLR_FROM_SLEEP" 2 81 "19" |
| 55 |
d G "RTCC_INTERNAL" 2 88 "0" |
55 |
d G "MCLR_FROM_RUN" 2 82 "27" |
| 56 |
d G "RTCC_EXT_L_TO_H" 2 89 "32" |
56 |
d G "NORMAL_POWER_UP" 2 83 "25" |
| 57 |
d G "RTCC_EXT_H_TO_L" 2 90 "48" |
57 |
d G "BROWNOUT_RESTART" 2 84 "26" |
| 58 |
d G "RTCC_DIV_1" 2 92 "8" |
58 |
d G "T0_INTERNAL" 2 91 "0" |
| 59 |
d G "RTCC_DIV_2" 2 93 "0" |
59 |
d G "T0_EXT_L_TO_H" 2 92 "32" |
| 60 |
d G "RTCC_DIV_4" 2 94 "1" |
60 |
d G "T0_EXT_H_TO_L" 2 93 "48" |
| 61 |
d G "RTCC_DIV_8" 2 95 "2" |
61 |
d G "T0_DIV_1" 2 95 "8" |
| 62 |
d G "RTCC_DIV_16" 2 96 "3" |
62 |
d G "T0_DIV_2" 2 96 "0" |
| 63 |
d G "RTCC_DIV_32" 2 97 "4" |
63 |
d G "T0_DIV_4" 2 97 "1" |
| 64 |
d G "RTCC_DIV_64" 2 98 "5" |
64 |
d G "T0_DIV_8" 2 98 "2" |
| 65 |
d G "RTCC_DIV_128" 2 99 "6" |
65 |
d G "T0_DIV_16" 2 99 "3" |
| 66 |
d G "RTCC_DIV_256" 2 100 "7" |
66 |
d G "T0_DIV_32" 2 100 "4" |
| 67 |
d G "RTCC_8_BIT" 2 103 "0" |
67 |
d G "T0_DIV_64" 2 101 "5" |
| 68 |
d G "WDT_18MS" 2 115 "0x8008" |
68 |
d G "T0_DIV_128" 2 102 "6" |
| 69 |
d G "WDT_36MS" 2 116 "9" |
69 |
d G "T0_DIV_256" 2 103 "7" |
| 70 |
d G "WDT_72MS" 2 117 "10" |
70 |
d G "T0_8_BIT" 2 106 "0" |
| 71 |
d G "WDT_144MS" 2 118 "11" |
71 |
d G "RTCC_INTERNAL" 2 108 "0" "The following are provided for compatibility" |
| 72 |
d G "WDT_288MS" 2 119 "12" |
72 |
d G "RTCC_EXT_L_TO_H" 2 109 "32" "with older compiler versions" |
| 73 |
d G "WDT_576MS" 2 120 "13" |
73 |
d G "RTCC_EXT_H_TO_L" 2 110 "48" |
| 74 |
d G "WDT_1152MS" 2 121 "14" |
74 |
d G "RTCC_DIV_1" 2 111 "8" |
| 75 |
d G "WDT_2304MS" 2 122 "15" |
75 |
d G "RTCC_DIV_2" 2 112 "0" |
| 76 |
d G "T1_DISABLED" 2 128 "0" |
76 |
d G "RTCC_DIV_4" 2 113 "1" |
| 77 |
d G "T1_INTERNAL" 2 129 "0x85" |
77 |
d G "RTCC_DIV_8" 2 114 "2" |
| 78 |
d G "T1_EXTERNAL" 2 130 "0x87" |
78 |
d G "RTCC_DIV_16" 2 115 "3" |
| 79 |
d G "T1_EXTERNAL_SYNC" 2 131 "0x83" |
79 |
d G "RTCC_DIV_32" 2 116 "4" |
| 80 |
d G "T1_CLK_OUT" 2 133 "8" |
80 |
d G "RTCC_DIV_64" 2 117 "5" |
| 81 |
d G "T1_DIV_BY_1" 2 135 "0" |
81 |
d G "RTCC_DIV_128" 2 118 "6" |
| 82 |
d G "T1_DIV_BY_2" 2 136 "0x10" |
82 |
d G "RTCC_DIV_256" 2 119 "7" |
| 83 |
d G "T1_DIV_BY_4" 2 137 "0x20" |
83 |
d G "RTCC_8_BIT" 2 120 "0" |
| 84 |
d G "T1_DIV_BY_8" 2 138 "0x30" |
84 |
d G "WDT_18MS" 2 132 "8" |
| 85 |
d G "T2_DISABLED" 2 143 "0" |
85 |
d G "WDT_36MS" 2 133 "9" |
| 86 |
d G "T2_DIV_BY_1" 2 144 "4" |
86 |
d G "WDT_72MS" 2 134 "10" |
| 87 |
d G "T2_DIV_BY_4" 2 145 "5" |
87 |
d G "WDT_144MS" 2 135 "11" |
| 88 |
d G "T2_DIV_BY_16" 2 146 "6" |
88 |
d G "WDT_288MS" 2 136 "12" |
| 89 |
d G "CCP_OFF" 2 152 "0" |
89 |
d G "WDT_576MS" 2 137 "13" |
| 90 |
d G "CCP_CAPTURE_FE" 2 153 "4" |
90 |
d G "WDT_1152MS" 2 138 "14" |
| 91 |
d G "CCP_CAPTURE_RE" 2 154 "5" |
91 |
d G "WDT_2304MS" 2 139 "15" |
| 92 |
d G "CCP_CAPTURE_DIV_4" 2 155 "6" |
92 |
d G "WDT_ON" 2 143 "0x4100" |
| 93 |
d G "CCP_CAPTURE_DIV_16" 2 156 "7" |
93 |
d G "WDT_OFF" 2 144 "0" |
| 94 |
d G "CCP_COMPARE_SET_ON_MATCH" 2 157 "8" |
94 |
d G "WDT_DIV_16" 2 145 "0x100" |
| 95 |
d G "CCP_COMPARE_CLR_ON_MATCH" 2 158 "9" |
95 |
d G "WDT_DIV_8" 2 146 "0x300" |
| 96 |
d G "CCP_COMPARE_INT" 2 159 "0xA" |
96 |
d G "WDT_DIV_4" 2 147 "0x500" |
| 97 |
d G "CCP_COMPARE_RESET_TIMER" 2 160 "0xB" |
97 |
d G "WDT_DIV_2" 2 148 "0x700" |
| 98 |
d G "CCP_PWM" 2 161 "0xC" |
98 |
d G "WDT_TIMES_1" 2 149 "0x900" "Default" |
| 99 |
d G "CCP_PWM_PLUS_1" 2 162 "0x1c" |
99 |
d G "WDT_TIMES_2" 2 150 "0xB00" |
| 100 |
d G "CCP_PWM_PLUS_2" 2 163 "0x2c" |
100 |
d G "WDT_TIMES_4" 2 151 "0xD00" |
| 101 |
d G "CCP_PWM_PLUS_3" 2 164 "0x3c" |
101 |
d G "WDT_TIMES_8" 2 152 "0xF00" |
| 102 |
v G "CCP_1" 2 165 "int16" |
102 |
d G "WDT_TIMES_16" 2 153 "0x1100" |
| 103 |
v G "CCP_2" 2 169 "int16" |
103 |
d G "WDT_TIMES_32" 2 154 "0x1300" |
| 104 |
d G "PSP_ENABLED" 2 178 "0x10" |
104 |
d G "WDT_TIMES_64" 2 155 "0x1500" |
| 105 |
d G "PSP_DISABLED" 2 179 "0" |
105 |
d G "WDT_TIMES_128" 2 156 "0x1700" |
| 106 |
d G "SPI_MASTER" 2 186 "0x20" |
106 |
d G "T1_DISABLED" 2 162 "0" |
| 107 |
d G "SPI_SLAVE" 2 187 "0x24" |
107 |
d G "T1_INTERNAL" 2 163 "5" |
| 108 |
d G "SPI_L_TO_H" 2 188 "0" |
108 |
d G "T1_EXTERNAL" 2 164 "7" |
| 109 |
d G "SPI_H_TO_L" 2 189 "0x10" |
109 |
d G "T1_EXTERNAL_SYNC" 2 165 "3" |
| 110 |
d G "SPI_CLK_DIV_4" 2 190 "0" |
110 |
d G "T1_CLK_OUT" 2 167 "8" |
| 111 |
d G "SPI_CLK_DIV_16" 2 191 "1" |
111 |
d G "T1_DIV_BY_1" 2 169 "0" |
| 112 |
d G "SPI_CLK_DIV_64" 2 192 "2" |
112 |
d G "T1_DIV_BY_2" 2 170 "0x10" |
| 113 |
d G "SPI_CLK_T2" 2 193 "3" |
113 |
d G "T1_DIV_BY_4" 2 171 "0x20" |
| 114 |
d G "SPI_SS_DISABLED" 2 194 "1" |
114 |
d G "T1_DIV_BY_8" 2 172 "0x30" |
| 115 |
d G "SPI_SAMPLE_AT_END" 2 196 "0x8000" |
115 |
d G "T1_GATE" 2 174 "0x40" |
| 116 |
d G "SPI_XMIT_L_TO_H" 2 197 "0x4000" |
116 |
d G "T1_GATE_INVERTED" 2 175 "0xC0" |
| 117 |
d G "UART_ADDRESS" 2 203 "2" |
117 |
d G "T2_DISABLED" 2 180 "0" |
| 118 |
d G "UART_DATA" 2 204 "4" |
118 |
d G "T2_DIV_BY_1" 2 181 "4" |
| 119 |
d G "A0_A3_A1_A3" 2 208 "0xfff04" |
119 |
d G "T2_DIV_BY_4" 2 182 "5" |
| 120 |
d G "A0_A3_A1_A2_OUT_ON_A4_A5" 2 209 "0xfcf03" |
120 |
d G "T2_DIV_BY_16" 2 183 "6" |
| 121 |
d G "A0_A3_A1_A3_OUT_ON_A4_A5" 2 210 "0xbcf05" |
121 |
d G "CCP_OFF" 2 189 "0" |
| 122 |
d G "NC_NC_NC_NC" 2 211 "0x0ff07" |
122 |
d G "CCP_CAPTURE_FE" 2 190 "4" |
| 123 |
d G "A0_A3_A1_A2" 2 212 "0xfff02" |
123 |
d G "CCP_CAPTURE_RE" 2 191 "5" |
| 124 |
d G "A0_A3_NC_NC_OUT_ON_A4" 2 213 "0x9ef01" |
124 |
d G "CCP_CAPTURE_DIV_4" 2 192 "6" |
| 125 |
d G "A0_VR_A1_VR" 2 214 "0x3ff06" |
125 |
d G "CCP_CAPTURE_DIV_16" 2 193 "7" |
| 126 |
d G "A3_VR_A2_VR" 2 215 "0xcff0e" |
126 |
d G "CCP_COMPARE_SET_ON_MATCH" 2 194 "8" |
| 127 |
d G "CP1_INVERT" 2 216 "0x0000010" |
127 |
d G "CCP_COMPARE_CLR_ON_MATCH" 2 195 "9" |
| 128 |
d G "CP2_INVERT" 2 217 "0x0000020" |
128 |
d G "CCP_COMPARE_INT" 2 196 "0xA" |
| 129 |
d G "VREF_LOW" 2 225 "0xa0" |
129 |
d G "CCP_COMPARE_RESET_TIMER" 2 197 "0xB" |
| 130 |
d G "VREF_HIGH" 2 226 "0x80" |
130 |
d G "CCP_PWM" 2 198 "0xC" |
| 131 |
d G "VREF_A2" 2 228 "0x40" |
131 |
d G "CCP_PWM_PLUS_1" 2 199 "0x1c" |
| 132 |
d G "ADC_OFF" 2 236 "0" "ADC Off" |
132 |
d G "CCP_PWM_PLUS_2" 2 200 "0x2c" |
| 133 |
d G "ADC_CLOCK_DIV_2" 2 237 "0x10000" |
133 |
d G "CCP_PWM_PLUS_3" 2 201 "0x3c" |
| 134 |
d G "ADC_CLOCK_DIV_4" 2 238 "0x4000" |
134 |
d G "CCP_PWM_H_H" 2 206 "0x0c" |
| 135 |
d G "ADC_CLOCK_DIV_8" 2 239 "0x0040" |
135 |
d G "CCP_PWM_H_L" 2 207 "0x0d" |
| 136 |
d G "ADC_CLOCK_DIV_16" 2 240 "0x4040" |
136 |
d G "CCP_PWM_L_H" 2 208 "0x0e" |
| 137 |
d G "ADC_CLOCK_DIV_32" 2 241 "0x0080" |
137 |
d G "CCP_PWM_L_L" 2 209 "0x0f" |
| 138 |
d G "ADC_CLOCK_DIV_64" 2 242 "0x4080" |
138 |
d G "CCP_PWM_FULL_BRIDGE" 2 211 "0x40" |
| 139 |
d G "ADC_CLOCK_INTERNAL" 2 243 "0x00c0" "Internal 2-6us" |
139 |
d G "CCP_PWM_FULL_BRIDGE_REV" 2 212 "0xC0" |
| 140 |
d G "NO_ANALOGS" 2 246 "7" "None" |
140 |
d G "CCP_PWM_HALF_BRIDGE" 2 213 "0x80" |
| 141 |
d G "ALL_ANALOG" 2 247 "0" "A0 A1 A2 A3 A5 E0 E1 E2" |
141 |
d G "CCP_SHUTDOWN_ON_COMP1" 2 215 "0x100000" |
| 142 |
d G "AN0_AN1_AN2_AN4_AN5_AN6_AN7_VSS_VREF" 2 248 "1" "A0 A1 A2 A5 E0 E1 E2 VRefh=A3" |
142 |
d G "CCP_SHUTDOWN_ON_COMP2" 2 216 "0x200000" |
| 143 |
d G "AN0_AN1_AN2_AN3_AN4" 2 249 "2" "A0 A1 A2 A3 A5" |
143 |
d G "CCP_SHUTDOWN_ON_COMP" 2 217 "0x300000" |
| 144 |
d G "AN0_AN1_AN2_AN4_VSS_VREF" 2 250 "3" "A0 A1 A2 A4 VRefh=A3" |
144 |
d G "CCP_SHUTDOWN_ON_INT0" 2 218 "0x400000" |
| 145 |
d G "AN0_AN1_AN3" 2 251 "4" "A0 A1 A3" |
145 |
d G "CCP_SHUTDOWN_ON_COMP1_INT0" 2 219 "0x500000" |
| 146 |
d G "AN0_AN1_VSS_VREF" 2 252 "5" "A0 A1 VRefh=A3" |
146 |
d G "CCP_SHUTDOWN_ON_COMP2_INT0" 2 220 "0x600000" |
| 147 |
d G "AN0_AN1_AN4_AN5_AN6_AN7_VREF_VREF" 2 253 "0x08" "A0 A1 A5 E0 E1 E2 VRefh=A3 VRefl=A2" |
147 |
d G "CCP_SHUTDOWN_ON_COMP_INT0" 2 221 "0x700000" |
| 148 |
d G "AN0_AN1_AN2_AN3_AN4_AN5" 2 254 "0x09" "A0 A1 A2 A3 A5 E0" |
148 |
d G "CCP_SHUTDOWN_AC_L" 2 223 "0x000000" |
| 149 |
d G "AN0_AN1_AN2_AN4_AN5_VSS_VREF" 2 255 "0x0A" "A0 A1 A2 A5 E0 VRefh=A3" |
149 |
d G "CCP_SHUTDOWN_AC_H" 2 224 "0x040000" |
| 150 |
d G "AN0_AN1_AN4_AN5_VREF_VREF" 2 256 "0x0B" "A0 A1 A5 E0 VRefh=A3 VRefl=A2" |
150 |
d G "CCP_SHUTDOWN_AC_F" 2 225 "0x080000" |
| 151 |
d G "AN0_AN1_AN4_VREF_VREF" 2 257 "0x0C" "A0 A1 A4 VRefh=A3 VRefl=A2" |
151 |
d G "CCP_SHUTDOWN_BD_L" 2 227 "0x000000" |
| 152 |
d G "AN0_AN1_VREF_VREF" 2 258 "0x0D" "A0 A1 VRefh=A3 VRefl=A2" |
152 |
d G "CCP_SHUTDOWN_BD_H" 2 228 "0x010000" |
| 153 |
d G "AN0" 2 259 "0x0E" "A0" |
153 |
d G "CCP_SHUTDOWN_BD_F" 2 229 "0x020000" |
| 154 |
d G "AN0_VREF_VREF" 2 260 "0x0F" "A0 VRefh=A3 VRefl=A2" |
154 |
d G "CCP_SHUTDOWN_RESTART" 2 231 "0x80000000" |
| 155 |
d G "ANALOG_RA3_REF" 2 261 "0x1" "!old only provided for compatibility" |
155 |
d G "CCP_PULSE_STEERING_A" 2 233 "0x01000000" |
| 156 |
d G "A_ANALOG" 2 262 "0x2" "!old only provided for compatibility" |
156 |
d G "CCP_PULSE_STEERING_B" 2 234 "0x02000000" |
| 157 |
d G "A_ANALOG_RA3_REF" 2 263 "0x3" "!old only provided for compatibility" |
157 |
d G "CCP_PULSE_STEERING_C" 2 235 "0x04000000" |
| 158 |
d G "RA0_RA1_RA3_ANALOG" 2 264 "0x4" "!old only provided for compatibility" |
158 |
d G "CCP_PULSE_STEERING_D" 2 236 "0x08000000" |
| 159 |
d G "RA0_RA1_ANALOG_RA3_REF" 2 265 "0x5" "!old only provided for compatibility" |
159 |
d G "CCP_PULSE_STEERING_SYNC" 2 237 "0x10000000" |
| 160 |
d G "ANALOG_RA3_RA2_REF" 2 266 "0x8" "!old only provided for compatibility" |
160 |
d G "SPI_MASTER" 2 245 "0x20" |
| 161 |
d G "ANALOG_NOT_RE1_RE2" 2 267 "0x9" "!old only provided for compatibility" |
161 |
d G "SPI_SLAVE" 2 246 "0x24" |
| 162 |
d G "ANALOG_NOT_RE1_RE2_REF_RA3" 2 268 "0xA" "!old only provided for compatibility" |
162 |
d G "SPI_L_TO_H" 2 247 "0" |
| 163 |
d G "ANALOG_NOT_RE1_RE2_REF_RA3_RA2" 2 269 "0xB" "!old only provided for compatibility" |
163 |
d G "SPI_H_TO_L" 2 248 "0x10" |
| 164 |
d G "A_ANALOG_RA3_RA2_REF" 2 270 "0xC" "!old only provided for compatibility" |
164 |
d G "SPI_CLK_DIV_4" 2 249 "0" |
| 165 |
d G "RA0_RA1_ANALOG_RA3_RA2_REF" 2 271 "0xD" "!old only provided for compatibility" |
165 |
d G "SPI_CLK_DIV_16" 2 250 "1" |
| 166 |
d G "RA0_ANALOG" 2 272 "0xE" "!old only provided for compatibility" |
166 |
d G "SPI_CLK_DIV_64" 2 251 "2" |
| 167 |
d G "RA0_ANALOG_RA3_RA2_REF" 2 273 "0xF" "!old only provided for compatibility" |
167 |
d G "SPI_CLK_T2" 2 252 "3" |
| 168 |
d G "ADC_START_AND_READ" 2 277 "7" "This is the default if nothing is specified" |
168 |
d G "SPI_SS_DISABLED" 2 253 "1" |
| 169 |
d G "ADC_START_ONLY" 2 278 "1" |
169 |
d G "SPI_SAMPLE_AT_END" 2 255 "0x8000" |
| 170 |
d G "ADC_READ_ONLY" 2 279 "6" |
170 |
d G "SPI_XMIT_L_TO_H" 2 256 "0x4000" |
| 171 |
d G "L_TO_H" 2 291 "0x40" |
171 |
d G "UART_ADDRESS" 2 262 "2" |
| 172 |
d G "H_TO_L" 2 292 "0" |
172 |
d G "UART_DATA" 2 263 "4" |
| 173 |
d G "GLOBAL" 2 294 "0x0BC0" |
173 |
d G "UART_AUTODETECT" 2 264 "8" |
| 174 |
d G "INT_RTCC" 2 295 "0x0B20" |
174 |
d G "UART_AUTODETECT_NOWAIT" 2 265 "9" |
| 175 |
d G "INT_RB" 2 296 "0xFF0B08" |
175 |
d G "UART_WAKEUP_ON_RDA" 2 266 "10" |
| 176 |
d G "INT_EXT" 2 297 "0x0B10" |
176 |
d G "UART_SEND_BREAK" 2 267 "13" |
| 177 |
d G "INT_AD" 2 298 "0x8C40" |
177 |
d G "NC_NC_NC_NC" 2 273 "0x00" |
| 178 |
d G "INT_TBE" 2 299 "0x8C10" |
178 |
d G "NC_NC" 2 274 "0x00" |
| 179 |
d G "INT_RDA" 2 300 "0x8C20" |
179 |
d G "CP1_A0_A3" 2 277 "0x00090080" |
| 180 |
d G "INT_TIMER1" 2 301 "0x8C01" |
180 |
d G "CP1_A1_A3" 2 278 "0x000A0081" |
| 181 |
d G "INT_TIMER2" 2 302 "0x8C02" |
181 |
d G "CP1_B3_A3" 2 279 "0x00880082" |
| 182 |
d G "INT_CCP1" 2 303 "0x8C04" |
182 |
d G "CP1_B1_A3" 2 280 "0x00280083" |
| 183 |
d G "INT_CCP2" 2 304 "0x8D01" |
183 |
d G "CP1_A0_VREF" 2 281 "0x00010084" |
| 184 |
d G "INT_SSP" 2 305 "0x8C08" |
184 |
d G "CP1_A1_VREF" 2 282 "0x00020085" |
| 185 |
d G "INT_PSP" 2 306 "0x8C80" |
185 |
d G "CP1_B3_VREF" 2 283 "0x00800086" |
| 186 |
d G "INT_BUSCOL" 2 307 "0x8D08" |
186 |
d G "CP1_B1_VREF" 2 284 "0x00200087" |
| 187 |
d G "INT_EEPROM" 2 308 "0x8D10" |
187 |
d G "CP1_OUT_ON_A4" 2 286 "0x00000020" |
| 188 |
d G "INT_TIMER0" 2 309 "0x0B20" |
188 |
d G "CP1_INVERT" 2 287 "0x00000010" |
| 189 |
d G "INT_COMP" 2 310 "0x8D40" |
189 |
d G "CP1_ABSOLUTE_VREF" 2 288 "0x20000000" |
| 190 |
F G "main" 0 5 "void()" |
190 |
d G "CP2_A0_A2" 2 291 "0x00058000" |
| - |
|
191 |
d G "CP2_A1_A2" 2 292 "0x00068100" |
| - |
|
192 |
d G "CP2_B3_A2" 2 293 "0x00848200" |
| - |
|
193 |
d G "CP2_B1_A2" 2 294 "0x00248300" |
| - |
|
194 |
d G "CP2_A0_VREF" 2 295 "0x00018400" |
| - |
|
195 |
d G "CP2_A1_VREF" 2 296 "0x00028500" |
| - |
|
196 |
d G "CP2_B3_VREF" 2 297 "0x00808600" |
| - |
|
197 |
d G "CP2_B1_VREF" 2 298 "0x00208700" |
| - |
|
198 |
d G "CP2_OUT_ON_A5" 2 300 "0x00002000" |
| - |
|
199 |
d G "CP2_INVERT" 2 301 "0x00001000" |
| - |
|
200 |
d G "CP2_ABSOLUTE_VREF" 2 302 "0x10000000" |
| - |
|
201 |
d G "CP2_T1_SYNC" 2 305 "0x01000000" |
| - |
|
202 |
d G "CP2_T1_GATE" 2 306 "0x02000000" |
| - |
|
203 |
d G "VREF_LOW" 2 315 "0xa0" |
| - |
|
204 |
d G "VREF_HIGH" 2 316 "0x80" |
| - |
|
205 |
d G "OSC_31KHZ" 2 322 "1" |
| - |
|
206 |
d G "OSC_125KHZ" 2 323 "0x11" |
| - |
|
207 |
d G "OSC_250KHZ" 2 324 "0x21" |
| - |
|
208 |
d G "OSC_500KHZ" 2 325 "0x31" |
| - |
|
209 |
d G "OSC_1MHZ" 2 326 "0x41" |
| - |
|
210 |
d G "OSC_2MHZ" 2 327 "0x51" |
| - |
|
211 |
d G "OSC_4MHZ" 2 328 "0x61" |
| - |
|
212 |
d G "OSC_8MHZ" 2 329 "0x71" |
| - |
|
213 |
d G "OSC_INTRC" 2 330 "1" |
| - |
|
214 |
d G "OSC_NORMAL" 2 331 "0" |
| - |
|
215 |
d G "OSC_STATE_STABLE" 2 333 "4" |
| - |
|
216 |
d G "OSC_31KHZ_STABLE" 2 334 "2" |
| - |
|
217 |
d G "ADC_OFF" 2 342 "0" "ADC Off" |
| - |
|
218 |
d G "ADC_CLOCK_DIV_2" 2 343 "0x100" |
| - |
|
219 |
d G "ADC_CLOCK_DIV_8" 2 344 "0x40" |
| - |
|
220 |
d G "ADC_CLOCK_DIV_32" 2 345 "0x80" |
| - |
|
221 |
d G "ADC_CLOCK_INTERNAL" 2 346 "0xc0" "Internal 2-6us" |
| - |
|
222 |
d G "sAN0" 2 350 "1" "| A0" |
| - |
|
223 |
d G "sAN1" 2 351 "2" "| A1" |
| - |
|
224 |
d G "sAN2" 2 352 "4" "| A2" |
| - |
|
225 |
d G "sAN3" 2 353 "8" "| A3" |
| - |
|
226 |
d G "sAN4" 2 354 "16" "| A5" |
| - |
|
227 |
d G "sAN5" 2 355 "32" "| E0" |
| - |
|
228 |
d G "sAN6" 2 356 "64" "| E1" |
| - |
|
229 |
d G "sAN7" 2 357 "128" "| E2" |
| - |
|
230 |
d G "sAN8" 2 358 "0x10000" "| B2" |
| - |
|
231 |
d G "sAN9" 2 359 "0x20000" "| B3" |
| - |
|
232 |
d G "sAN10" 2 360 "0x40000" "| B1" |
| - |
|
233 |
d G "sAN11" 2 361 "0x80000" "| B4" |
| - |
|
234 |
d G "sAN12" 2 362 "0x100000" "| B0" |
| - |
|
235 |
d G "sAN13" 2 363 "0x200000" "| B5" |
| - |
|
236 |
d G "NO_ANALOGS" 2 364 "0" "None" |
| - |
|
237 |
d G "ALL_ANALOG" 2 365 "0x1F00FF" "A0 A1 A2 A3 A5 E0 E1 E2 B0 B1 B2 B3 B4 B5" |
| - |
|
238 |
d G "VSS_VDD" 2 368 "0x0000" "| Range 0-Vdd" |
| - |
|
239 |
d G "VSS_VREF" 2 369 "0x1000" "| Range 0-Vref" |
| - |
|
240 |
d G "VREF_VREF" 2 370 "0x3000" "| Range Vref-Vref" |
| - |
|
241 |
d G "VREF_VDD" 2 371 "0x2000" "| Range Vref-Vdd" |
| - |
|
242 |
d G "ADC_START_AND_READ" 2 375 "7" "This is the default if nothing is specified" |
| - |
|
243 |
d G "ADC_START_ONLY" 2 376 "1" |
| - |
|
244 |
d G "ADC_READ_ONLY" 2 377 "6" |
| - |
|
245 |
d G "L_TO_H" 2 389 "0x40" |
| - |
|
246 |
d G "H_TO_L" 2 390 "0" |
| - |
|
247 |
d G "GLOBAL" 2 392 "0x0BC0" |
| - |
|
248 |
d G "INT_RTCC" 2 393 "0x000B20" |
| - |
|
249 |
d G "INT_RB" 2 394 "0x01FF0B08" |
| - |
|
250 |
d G "INT_EXT_L2H" 2 395 "0x50000B10" |
| - |
|
251 |
d G "INT_EXT_H2L" 2 396 "0x60000B10" |
| - |
|
252 |
d G "INT_EXT" 2 397 "0x000B10" |
| - |
|
253 |
d G "INT_AD" 2 398 "0x008C40" |
| - |
|
254 |
d G "INT_TBE" 2 399 "0x008C10" |
| - |
|
255 |
d G "INT_RDA" 2 400 "0x008C20" |
| - |
|
256 |
d G "INT_TIMER1" 2 401 "0x008C01" |
| - |
|
257 |
d G "INT_TIMER2" 2 402 "0x008C02" |
| - |
|
258 |
d G "INT_CCP1" 2 403 "0x008C04" |
| - |
|
259 |
d G "INT_CCP2" 2 404 "0x008D01" |
| - |
|
260 |
d G "INT_SSP" 2 405 "0x008C08" |
| - |
|
261 |
d G "INT_BUSCOL" 2 406 "0x008D08" |
| - |
|
262 |
d G "INT_EEPROM" 2 407 "0x008D10" |
| - |
|
263 |
d G "INT_TIMER0" 2 408 "0x000B20" |
| - |
|
264 |
d G "INT_OSC_FAIL" 2 409 "0x008D80" |
| - |
|
265 |
d G "INT_COMP" 2 410 "0x008D20" |
| - |
|
266 |
d G "INT_COMP2" 2 411 "0x008D40" |
| - |
|
267 |
d G "INT_ULPWU" 2 412 "0x008D04" |
| - |
|
268 |
d G "INT_RB0" 2 413 "0x0010B08" |
| - |
|
269 |
d G "INT_RB1" 2 414 "0x0020B08" |
| - |
|
270 |
d G "INT_RB2" 2 415 "0x0040B08" |
| - |
|
271 |
d G "INT_RB3" 2 416 "0x0080B08" |
| - |
|
272 |
d G "INT_RB4" 2 417 "0x0100B08" |
| - |
|
273 |
d G "INT_RB5" 2 418 "0x0200B08" |
| - |
|
274 |
d G "INT_RB6" 2 419 "0x0400B08" |
| - |
|
275 |
d G "INT_RB7" 2 420 "0x0800B08" |
| - |
|
276 |
F G "main" 0 4 "void()" |
| 191 |
V L "delay" 0 6 "int8" |
277 |
V L "delay" 0 6 "int8" |
| 192 |
F B "reset_cpu" 0 0 |
278 |
F B "reset_cpu" 0 0 |
| 193 |
F B "abs" 1 0 |
279 |
F B "abs" 1 0 |
| - |
|
280 |
F B "sleep_ulpwu" 1 0 |
| 194 |
F B "sleep" 0 0 |
281 |
F B "sleep" 0 0 |
| 195 |
F B "delay_cycles" 1 0 |
282 |
F B "delay_cycles" 1 0 |
| 196 |
F B "read_bank" 2 0 |
283 |
F B "read_bank" 2 0 |
| 197 |
F B "write_bank" 3 0 |
284 |
F B "write_bank" 3 0 |
| 198 |
F B "shift_left" 2 2 |
285 |
F B "shift_left" 2 2 |
| 199 |
F B "shift_right" 2 2 |
286 |
F B "shift_right" 2 2 |
| 200 |
F B "rotate_left" 2 0 |
287 |
F B "rotate_left" 2 0 |
| 201 |
F B "rotate_right" 2 0 |
288 |
F B "rotate_right" 2 0 |
| 202 |
F B "_mul" 2 0 |
289 |
F B "_mul" 2 0 |
| 203 |
F B "strcpy" 2 0 |
- |
|
| 204 |
F B "memset" 3 0 |
290 |
F B "memset" 3 0 |
| 205 |
F B "memcpy" 3 0 |
- |
|
| 206 |
F B "isamoung" 2 0 |
291 |
F B "isamoung" 2 0 |
| 207 |
F B "isamong" 2 0 |
292 |
F B "isamong" 2 0 |
| 208 |
F B "bit_set" 2 0 |
293 |
F B "bit_set" 2 0 |
| 209 |
F B "bit_clear" 2 0 |
294 |
F B "bit_clear" 2 0 |
| 210 |
F B "bit_test" 2 0 |
295 |
F B "bit_test" 2 0 |
| Line 233... |
Line 318... |
| 233 |
F B "write_program_eeprom" 2 0 |
318 |
F B "write_program_eeprom" 2 0 |
| 234 |
F B "write_program_memory" 4 0 |
319 |
F B "write_program_memory" 4 0 |
| 235 |
F B "write_program_memory8" 4 0 |
320 |
F B "write_program_memory8" 4 0 |
| 236 |
F B "read_program_memory" 4 0 |
321 |
F B "read_program_memory" 4 0 |
| 237 |
F B "read_program_memory8" 4 0 |
322 |
F B "read_program_memory8" 4 0 |
| - |
|
323 |
F B "erase_program_eeprom" 1 0 |
| - |
|
324 |
F B "strcpy" 2 0 |
| - |
|
325 |
F B "memcpy" 3 0 |
| - |
|
326 |
F B "strstr100" 2 0 |
| 238 |
F B "output_high" 1 0 |
327 |
F B "output_high" 1 0 |
| 239 |
F B "output_low" 1 0 |
328 |
F B "output_low" 1 0 |
| 240 |
F B "input" 1 0 |
329 |
F B "input" 1 0 |
| 241 |
F B "input_state" 1 0 |
330 |
F B "input_state" 1 0 |
| 242 |
F B "output_float" 1 0 |
331 |
F B "output_float" 1 0 |
| Line 261... |
Line 350... |
| 261 |
F B "get_tris_a" 0 0 |
350 |
F B "get_tris_a" 0 0 |
| 262 |
F B "get_tris_b" 0 0 |
351 |
F B "get_tris_b" 0 0 |
| 263 |
F B "get_tris_c" 0 0 |
352 |
F B "get_tris_c" 0 0 |
| 264 |
F B "get_tris_d" 0 0 |
353 |
F B "get_tris_d" 0 0 |
| 265 |
F B "get_tris_e" 0 0 |
354 |
F B "get_tris_e" 0 0 |
| - |
|
355 |
F B "input_change_a" 0 0 |
| - |
|
356 |
F B "input_change_b" 0 0 |
| - |
|
357 |
F B "input_change_c" 0 0 |
| - |
|
358 |
F B "input_change_d" 0 0 |
| - |
|
359 |
F B "input_change_e" 0 0 |
| 266 |
F B "port_b_pullups" 1 0 |
360 |
F B "port_b_pullups" 1 0 |
| 267 |
F B "setup_counters" 2 0 |
361 |
F B "setup_counters" 2 0 |
| 268 |
F B "setup_wdt" 1 0 |
362 |
F B "setup_wdt" 1 0 |
| 269 |
F B "restart_cause" 0 0 |
363 |
F B "restart_cause" 0 0 |
| 270 |
F B "restart_wdt" 0 0 |
364 |
F B "restart_wdt" 0 0 |
| Line 278... |
Line 372... |
| 278 |
F B "setup_adc" 1 0 |
372 |
F B "setup_adc" 1 0 |
| 279 |
F B "set_adc_channel" 1 0 |
373 |
F B "set_adc_channel" 1 0 |
| 280 |
F B "read_adc" 0 1 |
374 |
F B "read_adc" 0 1 |
| 281 |
F B "adc_done" 0 0 |
375 |
F B "adc_done" 0 0 |
| 282 |
F B "setup_timer_0" 1 0 |
376 |
F B "setup_timer_0" 1 0 |
| - |
|
377 |
F B "setup_vref" 1 0 |
| 283 |
F B "setup_timer_1" 1 0 |
378 |
F B "setup_timer_1" 1 0 |
| 284 |
F B "get_timer1" 0 0 |
379 |
F B "get_timer1" 0 0 |
| 285 |
F B "set_timer1" 1 0 |
380 |
F B "set_timer1" 1 0 |
| 286 |
F B "setup_timer_2" 3 0 |
381 |
F B "setup_timer_2" 3 0 |
| 287 |
F B "get_timer2" 0 0 |
382 |
F B "get_timer2" 0 0 |
| 288 |
F B "set_timer2" 1 0 |
383 |
F B "set_timer2" 1 0 |
| 289 |
F B "setup_ccp1" 1 0 |
384 |
F B "setup_ccp1" 1 2 |
| 290 |
F B "set_pwm1_duty" 1 0 |
385 |
F B "set_pwm1_duty" 1 0 |
| 291 |
F B "setup_ccp2" 1 0 |
386 |
F B "setup_ccp2" 1 0 |
| 292 |
F B "set_pwm2_duty" 1 0 |
387 |
F B "set_pwm2_duty" 1 0 |
| 293 |
F B "setup_vref" 1 0 |
- |
|
| 294 |
F B "setup_psp" 1 0 |
388 |
F B "setup_oscillator" 1 2 |
| 295 |
F B "psp_output_full" 0 0 |
- |
|
| 296 |
F B "psp_input_full" 0 0 |
- |
|
| 297 |
F B "psp_overflow" 0 0 |
- |
|
| 298 |
F B "setup_spi" 1 0 |
389 |
F B "setup_spi" 1 0 |
| 299 |
F B "spi_read" 0 1 |
390 |
F B "spi_read" 0 1 |
| 300 |
F B "spi_write" 1 0 |
391 |
F B "spi_write" 1 0 |
| 301 |
F B "spi_data_is_in" 0 0 |
392 |
F B "spi_data_is_in" 0 0 |
| 302 |
F B "setup_spi2" 1 0 |
393 |
F B "setup_spi2" 1 0 |
| 303 |
F B "spi_read2" 0 1 |
394 |
F B "spi_read2" 0 1 |
| 304 |
F B "spi_write2" 1 0 |
395 |
F B "spi_write2" 1 0 |
| 305 |
F B "spi_data_is_in2" 0 0 |
396 |
F B "spi_data_is_in2" 0 0 |
| - |
|
397 |
F B "brownout_enable" 1 0 |
| 306 |
F B "delay_ms" 1 0 |
398 |
F B "delay_ms" 1 0 |
| 307 |
F B "delay_us" 1 0 |
399 |
F B "delay_us" 1 0 |
| 308 |
F B "putchar" 1 2 |
400 |
F B "putchar" 1 2 |
| 309 |
F B "puts" 1 2 |
401 |
F B "puts" 1 2 |
| 310 |
F B "getch" 0 1 |
402 |
F B "getch" 0 1 |